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flight computer Design Analysis

1 Design Summary

77
out of 100
Depth of review, as a baseline: 434 verified datasheet parameters applied across 11 devices, 578 schematic pin connections resolved, and 291 automated circuit checks performed. Additional checks that are not as easily quantifiable are also made.
Design TypeFlat (5 sheets)
Total Components158
Total Pins685
Total Nets125
Total Test Points0
Improve your score:
Points deducted for open High/Medium AI findings:
AI findings to review:
AI assistance is enabled for this report. Each section marked "AI-Assisted" contains AI-generated engineering observations produced during schematic-phase design review. Findings are based solely on connectivity, component values, and net annotations present in the schematic data at the time of analysis. The AI has no access to PCB layout, routing, thermal data, BOM pricing or availability, assembly constraints, or any information outside the schematic. Findings are observations to investigate, not pass/fail judgments. The absence of a finding for a given device or net does not constitute a clearance. ECONOMY MODE — review needed: this cost-reduced analysis tier can produce misjudgements compared to standard mode.

1.1 Design Overview

AI-Assisted — This is a flat, five-sheet flight computer design (sheets: flight computer, interfaces, power, pyros_&_motor, sensors_&_communication) comprising 158 components across 685 pins and 125 nets. The architecture centers on a dual-core RP2350B microcontroller (U1) as the primary processor, supported by a dedicated NOR flash device, a LoRa radio module, a GNSS receiver, a multi-sensor inertial/environmental suite, motor/pyro drive electronics, and a USB Type-C interface.

Processing and memory. U1 is a Raspberry Pi RP2350B in QFN-80 package, a dual-CPU microcontroller with an integrated switched-mode buck/LDO core regulator, QSPI-capable execute-in-place flash interface, native USB controller, and a crystal oscillator input (Y1) for its system clock. Program and data storage is provided by IC1, an AT25SF128A 128 Mbit SPI NOR flash. Removable mass storage is available through J10, a Micro SD card socket operating in 4-bit mode. Debug access is exposed at J1 via SWD.

Wireless and navigation. IC2 is a Wio-SX1262 LoRa RF module bridged to the host over an SPI-style interface (MOSI/MISO/SCK/NSS) with RF switch control, using antenna connector J22 or J23. U10 is a MAX-M10S GNSS receiver module with UART (TXD/RXD) and I2C interfaces, using the remaining SMA antenna port. USB connectivity is provided at J8, a USB 2.0-only Type-C receptacle carrying D+/D-, CC, and SBU lines.

Sensing. IC3 is an ADXL375 triple-axis accelerometer rated to ±200 g full-scale with I2C/SPI host access, operating -40°C to +85°C. U8 is a BMP581 barometric pressure and temperature sensor in a compact 10-pin LGA, supporting I2C/SPI/I3C, rated -40°C to +85°C. U9 is a BNO086 nine-axis sensor-fusion IMU (accelerometer, gyroscope, magnetometer) with a host interface configurable for SPI, I2C, or UART.

Motor and pyrotechnic drive. U7 is a BTM9011EP dual half-bridge driver for brushed DC motors with SPI-based configuration, diagnostics, and analog current-sense/fault reporting on its IS pin, rated -40°C to +150°C junction. U6 and U11 are SISS65DN-T1-GE3 power MOSFETs, and Q4-Q7 are SIA440DJ-T1-GE3 MOSFETs, supporting switched load and pyro-channel drive. Four servo headers (J18-J21) provide actuator connections.

Protection and user I/O. Transient protection is implemented with TVS diodes D1, D2 and SMBJ15A (CR1), a zener D4 (8.7V), and Schottky diode D5. User interface elements include three switches (S1, S2 tactile; S3 slide) and four addressable LED indicators (LED1-4).

Power tree. U1 hosts an on-chip regulator producing the +1.1V core rail (9 pins) from its VREG_FB node; the +3.3V rail (57 pins) is associated with U1's VREG_VIN pin. U5, a TPS56A37 synchronous buck converter (10 A capable, 4.5V-28V input range per the TI datasheet), generates the +5V rail (18 pins) at its SW pin through inductor L2. U4, an AZ1117CH-3.3TRG1 linear regulator, provides supplementary 3.3V regulation. Additional rails present are +VBAT (5 pins), +VBAT safe (7 pins), +12V (20 pins), +12V pyro (5 pins), and a common GND (132 pins).

Interfaces. Two SWD instances are present (one complete through J1, one incomplete), a shared I2C bus links IC2, IC3, U1, U7, U8, and U9, and the high-speed interface set comprises two USB differential pairs and two additional differential pairs for other high-speed signaling.

1.2 Processed Sheets

#Sheet Name
1flight computer.kicad_sch
2interfaces.kicad_sch
3power.kicad_sch
4pyros_&_motor.kicad_sch
5sensors_&_communication.kicad_sch

1.3 Footprint Compliance

Production pick-n-place, AOI, AXI, ATE and Design Quality tools rely on proper descriptions of component footprints.

Footprint NamingStatus
1 of 33 unique footprints are IPC-7351B or IPC-7251✓
24 SMT footprints do not follow IPC-7351B naming
6 footprints (connectors, specialty) — compliance unknown
2 footprints could not be classified for inspection

1.4 Invalid Placements

SheetComponentsObservation
pyros_&_motor.kicad_schR52 / R48Overlapping symbols
pyros_&_motor.kicad_schR34 / R33Overlapping symbols
pyros_&_motor.kicad_schR29 / R30Overlapping symbols
pyros_&_motor.kicad_schR47 / R51Overlapping symbols
pyros_&_motor.kicad_schR53 / R49Overlapping symbols
pyros_&_motor.kicad_schR50 / R46Overlapping symbols

2 Component Value Properties

Component values should be in the VALUE property, either as a direct value (e.g. 100nF) or as a formula reference (e.g. =Capacitance). The typed property (Resistance, Capacitance, Inductance, Impedance, etc.) holds the actual electrical value; VALUE should point to it or contain the same data.

Value Property Check
TypeCheckCountComponentsStatus
CapacitorsValues in VALUE or Capacitance48C19, C4, C1, C11, C3, C8, C12, C13 (+40 more)✓
ResistorsValues in VALUE or Resistance46R11, R5, R3, R6, R4, R7, R12, R19 (+38 more)✓
InductorsValues in VALUE or Inductance4L1, L2, L4, L3✓
FusesVALUE has no usable electrical value — it is blank or a placeholder symbol letter ("C", "R"). Set VALUE to just the magnitude and units (e.g. 10k, 100nF, 10uH) or a =Property formula pointing at the typed value (e.g. =Resistance). Keep wattage, current, tolerance and voltage ratings out of VALUE, each in its own named property (Power, Current, Tolerance, Voltage) — not the Description, which is another free-form field. Without a magnitude, BOM queries, value parsing, and AI analysis cannot use it. (F3 currently has VALUE="Fuse")4F3, F4, F2, F1
CrystalsValues in VALUE or Frequency1Y1✓

3 Pin Connectivity Report

3.1 Unconnected Pins

Unconnected pins that are not marked NO_ERC.

6 unconnected pin(s) found:
6 unconnected pin(s) — all are electrical types that are safe to leave open (Bidirectional, Output, Passive, High-Impedance, or Unspecified). Common on partially-populated bus connectors (VME, backplanes, expansion headers) and on outputs whose consumer was omitted. Review to confirm intent, but no action is required by default.
Refdes_PinPin FunctionPin PropertyDevice TypeNet NameNotes
IC3_8INT1PassiveADXL375BCCZ-RLNet-(IC3-INT1)
IC3_9INT2PassiveADXL375BCCZ-RLNet-(IC3-INT2)
IC3_10NCUnknownADXL375BCCZ-RL-No net
IC3_11RESERVED_2PassiveADXL375BCCZ-RLNet-(IC3-RESERVED_2)
J8_A8SBU1BidirectionalUSB_C_Receptacle_USB2.0_16PNet-(J8-SBU1)
J8_B8SBU2BidirectionalUSB_C_Receptacle_USB2.0_16PNet-(J8-SBU2)

3.2 Implied/Hidden Net Connections

No components with implied/hidden net connections found.

3.3 Open-Collector Pull-up Audit

Examined 2 candidate pin(s) on 2 net(s). 1 to verify with destination IC. 1 passing.
Open-collector / open-drain outputs need an external pull-up resistor to a power rail to function. This audit lists pins where a pull-up appears to be missing or where the pin type may not match the schematic library.
FindingRecommended ActionSeverity
U7_2 (SDI) on MOSI
U7 (BTM9011EP)
MOTIX Full-Bridge ICs for BDC Motors
on-board only · library: Open Collector
Information: this net may be missing a pull-up. The destination IC (MCU/FPGA/other) may enable a configurable internal pull-up — verify its datasheet/BSDL. If none, add an external pull-up to a power rail.Review
These open-collector / open-drain outputs have a resistor pull-up to a power rail. The pull-up resistor and rail are shown for reference.
NetOC Pin(s)Pull-upRailStatus
Net-(U5-PG)U5_4 (PG)R23+5V✓

3.4 Diode Polarity / Orientation

Diode polarity and orientation are read from the schematic. IPC-7351B (surface mount) / IPC-7251 (through-hole) Zero Component Orientation (ZCO) requires that pin 1, the cathode, is on the left with the footprint at zero rotation. Tomachie will call out schematic-symbol problems that do not meet ZCO because the PCB layout may have an error, assembly may insert the part backwards, or a novice may wrongly indict a correct part — keeping consistent is the least-expensive path for everyone who handles the PCB.
DiodeConnectionsOrientationSeverity
D5
D_Schottky
unidirectional · pin_names · Schottky Rectifier
Pin 2 (A): Net-(D5-A)
Pin 1 (K): +5V
Consistent
CR1
SMBJ15A
unidirectional · symbol_graphic
Pin 1 (K): +12V
Pin 2 (A): GND
Consistent
D4
8.7V
unidirectional · pin_names
Pin 1 (K): +12V
Pin 2 (A): power signal
Consistent
D1
D_TVS
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): Net-(D1-A2)
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D2
D_TVS
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): Net-(D2-A2)
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information

3.5 Polarized Capacitor Orientation

Aluminum-electrolytic, tantalum, and polymer capacitors are polarized: pin 1 is the positive (+) terminal. IPC-7351B (surface-mount) and IPC-7251 (through-hole) fix pin 1 as positive in the land pattern — the square pad, the silkscreen "+", and (through-hole) the notch or plated hole all mark it. Footprint selection, pick-and-place assembly, and in-circuit / flying-probe test all reference pin 1, so the schematic symbol's pin 1 MUST match: pin 1 = positive. If a symbol instead draws "+" on pin 2, pin 1 — the footprint's positive pad — is wired to the wrong net and the assembled part sits backwards. (The part's own body marking is not a reliable guide: aluminum electrolytics stripe the NEGATIVE lead, tantalums mark the POSITIVE — so the land-pattern pin 1 = positive is the fixed reference.) Each polarized capacitor below is checked against this convention.
CapacitorConnectionsPolaritySeverity
C41
3
Pin 1 (+): +12V
Pin 2: GND

3.6 Summary

Total NO_ERC markers in design25
Pins needing attention (warnings)6
Pins for information only0

4 Power Overview

Power rails8
Power management sources identified2
Analysis of passive component footprint suitability, voltage ratings, and power dissipation is not performed in this revision.
Power architecture overview. For test point coverage, see Design-for-Test section.

4.1 Power Rail Analysis

2 power rail(s) do not state a voltage in their name. The analysis and AI cannot judge them against an intended level, and a name like VBUS, VSYS or VBAT is not assumed to be 5 V. Annotate each with its expected voltage or range so it is machine-readable.
Power Rails
RailVoltageSourceConsumers
+12V12.00VJ4
External
U5 (TPS56A37RPAR),
U6 (SISS65DN-T1-GE3),
U7 (BTM9011EP)
+12V pyro12.00VJ4
External
-
+5V5.00VU5
TPS56A37RPAR
U4 (AZ1117CH-3.3TRG1)
+3.3V3.30VU1
RP2350B
IC1 (988-AT25SF128A-SHB-T),
IC2 (713-114993390),
IC3 (ADXL375BCCZ-RL),
U4 (AZ1117CH-3.3TRG1),
U8 (BMP581),
U9 (v1.17)
+1.1V1.10VU1
RP2350B
-
+VBAT-J2
External
U11 (SISS65DN-T1-GE3)
+VBAT safe--U11 (SISS65DN-T1-GE3),
U6 (SISS65DN-T1-GE3)
GND-J1
External
-
RailRecommended annotation
+VBATAdd a net class naming the voltage (e.g. "3.3V", or a range "3.0-4.2V" for a battery), or a net-label alias, so downstream tools and the AI use the intended level.
+VBAT safeAdd a net class naming the voltage (e.g. "3.3V", or a range "3.0-4.2V" for a battery), or a net-label alias, so downstream tools and the AI use the intended level.

4.2 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. ECONOMY MODE — review needed: this cost-reduced analysis tier can produce misjudgements compared to standard mode.

4.2.1 Power Tree Overview

AI-Assisted — Primary power enters through J4 (external, +12V), split into two independent feeds: pin 1 to the main +12V rail, pin 2 to +12V pyro through fuses F1-F4 to the four pyro channels. The main +12V rail feeds U5 (TPS56A37RPAR), a synchronous buck converter producing +5V. +5V feeds U4 (AZ1117CH-3.3TRG1), a linear regulator producing +3.3V. +3.3V feeds VREG_VIN of U1 (RP2350B), whose on-chip switch-mode/LDO core regulator produces the +1.1V DVDD core rail through external inductor L1. The rail summary lists U1 as the +3.3V source; the net data shows the true source is U4's OUTPUT pin, with U1_64 VREG_VIN acting as a load on that rail - U1 only sources +1.1V. A second, independent path brings the battery (+VBAT, J2, voltage not specified in the schematic) through P-channel MOSFET U11, default-on via a 100kΩ gate pull-down (R9), into +VBATsafe; a second P-channel MOSFET U6 ORs the +12V rail into the same +VBATsafe node when closed by slide switch S3 or connector J3, its gate held off by default through a 100kΩ pull-up (R8). No consumer of +VBATsafe appears in the data provided for this sheet. Sequencing is passive: U5 self-enables once +12V rises above a threshold set by zener D4 and pull-down R16 (see following section); U4 and U1's core regulator have no interlocking enable logic and simply follow their respective input rails.

4.2.2 +12V Input Protection and Battery/Source Selection

AI-Assisted — CR1 (SMBJ15A) is a unidirectional TVS across +12V/GND, cathode on +12V per the schematic symbol (construction-derived, authoritative). Per the Littelfuse SMBJ15AHE3-BH datasheet, standoff is 15.0V versus a nominal 12.00V rail (25% margin), with clamp voltage 24.4V at Ipp=24.6A. Downstream devices on +12V: U5 VIN abs-max 32V, U6/U11 (SiSS65DN) VDS -30V, U7 (BTM9011EP) VS abs-max 40V - all clear the 24.4V clamp, so CR1 adequately protects the rail. D4 (8.7V zener, cathode on +12V, anode on net 'power signal') forms an auto-enable/UVLO network for U5's EN pin together with pull-down R16 (100kΩ): once +12V exceeds Vz+VEN_on = 8.7V + 1.18V (TI TPS56A37 datasheet, VEN rising typ, page 5) ≈ 9.88V, the EN node clears threshold and U5 begins switching; below that, R16 holds EN near 0V. The same node feeds U1 GPIO41/ADC1 as a +12V presence monitor - see Findings for margin. U11 (SiSS65DN, default-on, gate pulled to GND via R9=100kΩ) passes battery through to +VBATsafe continuously; U6 (same part, default-off, gate pulled to +VBATsafe via R8=100kΩ) passes +12V through when S3 or J3 pulls its gate to GND - an OR-ing front end allowing either source to supply +VBATsafe. Both MOSFETs are rated far above any plausible load current (Id -94A package-limited, Vishay SiSS65DN datasheet) - benign oversizing, not a defect.

4.2.3 U5 TPS56A37RPAR Buck Regulator (+12V to +5V)

AI-Assisted — U5 converts +12V to +5V at TI's recommended 500kHz. MODE is set by R10=52.3kΩ to AGND, matching the TI datasheet's 1% 52.3kΩ recommendation for the fixed-frequency table (page 3/11). FB divider: R14(73.2kΩ)+R13(49.9Ω) top, R15(10kΩ) bottom, ratio 0.120; with VREF=0.600V this gives VOUT=5.000V, matching TI's Table 7-2 5V/500kHz reference design. A 150pF feed-forward capacitor (C29) bridges FB to the R13/R14 junction for transient response - standard practice. SS is programmed by C25=47nF to AGND: Tss = Css x VREF / Iss = 47nF x 0.6V / 6µA (TI datasheet page 6) = 4.7ms, longer than the 1.8ms default - a deliberate soft-start extension. BOOT is decoupled to SW through C28=0.1µF (with R25=0Ω as a routing link), matching the datasheet's BOOT-SW capacitor requirement (page 17). PG is pulled up 100kΩ to +5V via R23 (TI recommends 100kΩ to a rail ≤5.5V, page 13) - riding on the regulator's own output is correct since the open-drain sink pulls low on any fault regardless of rail state. Output capacitance on +5V totals 54µF (2x22µF C30/C31 + 10µF C20); input-side +12V bulk totals 240.3µF (220µF C41 + 2x10µF + 3x0.1µF), ample for a 10A-capable converter (TI iout_max, page 1). AGND and PGND both land on the GND net directly, not merely through capacitors.

4.2.4 U4 LDO and U1 On-Chip Regulator Cascade (+5V to +3.3V to +1.1V)

AI-Assisted — U4 (AZ1117CH-3.3TRG1) is a fixed 3.3V LDO; ADJ/GND (pin1) ties directly to GND, consistent with the fixed-output configuration (Diodes Inc. datasheet page 3). INPUT is on +5V, OUTPUT drives +3.3V directly - the actual source of the +3.3V rail. Dropout headroom: 5V-3.3V=1.7V, within the 1.5V-10V window (page 7). Output decoupling on +3.3V totals 39.9µF, far exceeding the 10µF/ESR<20Ω minimum from the typical application (page 3). U1's on-chip regulator (VREG_VIN on +3.3V, within the RP2350 2.7V-5.5V input range, datasheet page 442) produces +1.1V DVDD through external inductor L1 (3.3µH), with VREG_FB sensing the +1.1V rail directly - no external divider, consistent with the fixed 1.1V DVDD architecture (datasheet page 442). DVDD decoupling totals 9.6µF (2x4.7µF+2x0.1µF) across three DVDD pins, exceeding the datasheet's minimum of two 100nF plus one 4.7µF (page 441). VREG_AVDD is isolated from the digital +3.3V rail by an RC filter (R3=33Ω, C4=4.7µF), cutoff ≈1/(2π×33×4.7µF)≈1.0kHz, suppressing switching noise into the analog reference - sound practice.

4.2.5 Pyro Power Rail and Fuse Coordination

AI-Assisted — +12V pyro is a second feed from J4 (pin 2), independent of the main +12V rail, distributed through four fuses F1-F4, one per pyro channel, each into a MOSFET switch (Q4-Q7, SIA440DJ-T1-GE3) with 100kΩ gate pull-downs (R50-R53) to GND holding channels off by default. Continuity-sense resistors R28/R30/R32/R34 (27kΩ each) tie each pyro-side continuity net to GND for squib-continuity monitoring. The fuse entry for F1-F4 carries no current-rating value (footprint and generic 'Fuse' description only) - coordination against the downstream switches cannot be verified: Q4-Q7 (Vishay SIA440DJ, Id=8.6A board-mounted, page 1) would need a fuse rated at or below that figure to be protected, but the rating is absent from the schematic data. As protective parts, unrated fuses leave the switch FETs and squib wiring without a defined overcurrent limit.

4.3 Observations

AI-Assisted — The 'power signal' node (D4 zener output, feeding U1 GPIO41/ADC1 as a +12V presence monitor) computes to +12V(nominal 12.00V) - Vz(8.7V) = 3.3V, essentially equal to the RP2350's IOVDD/ADC_AVDD maximum of 3.3V (datasheet page 442) with zero margin - any positive tolerance on the +12V rail or the zener pushes the ADC input over its rated supply. +VBAT and +VBATsafe carry no stated voltage in the schematic (no net-class or annotation); MOSFET Vgs (SiSS65DN, ±20V max) and any downstream part ratings on these rails cannot be checked against the real battery voltage. L2 (3.3µH, U5's output inductor) carries no stated current rating despite feeding a converter capable of 10A output with a 15A typical high-side peak current limit (TI datasheet page 5) - saturation margin is unverifiable. L1 (3.3µH, U1's core inductor) also lacks a stated current rating, but the on-chip regulator's buck output is capped at 200mA (RP2350 datasheet page 16), so risk is low. C41 (220µF, +12V bulk) carries no voltage-rating property in the schematic; on a 12V rail this needs a rating comfortably above 12V, confirmed against the fitted part's datasheet.

4.4 Findings

AI-Assisted —
DeviceRailObservationSeverity
+VBAT / +VBAT safe-No net-class or annotation states the battery voltage; MOSFET Vgs (±20V max, Vishay SiSS65DN datasheet) and any downstream ratings on these rails cannot be checked against the actual battery voltage. Recommend annotating the net with a voltage net class.Medium
U1 [RP2350B]power signal (ADC monitor)GPIO41/ADC1 monitor node = +12V(nominal 12.00V) - Vz(8.7V) = 3.3V, equal to the RP2350's IOVDD/ADC_AVDD max of 3.3V (datasheet page 442) with zero margin against rail or zener tolerance.Medium
L2+5V / Net-(U5-SW)Output inductor (3.3µH) carries no stated current rating in the schematic although U5 supports up to 10A output and a 15A typical high-side peak current limit (TI datasheet page 5) - saturation margin cannot be verified.Medium
C41+12V220µF bulk capacitor carries no voltage-rating property in the schematic; on a 12V rail this needs to be confirmed against the fitted part's datasheet rating.Medium
F1-F4 [Fuse]+12V pyroNo current-rating value present in the schematic data for the fitted fuses; coordination against downstream switch FETs (Q4-Q7, SIA440DJ-T1-GE3, Id=8.6A board-mounted, Vishay datasheet page 1) cannot be verified.Medium
L1+1.1V / Net-(U1-VREG_LX)Core inductor (3.3µH) carries no stated current rating; RP2350 buck output is capped at 200mA (datasheet page 16), so risk from an unrated part is low.Low
U1 [RP2350B]+3.3VRail source correction: the +3.3V rail is actually sourced by U4's OUTPUT pin, not U1 - U1's VREG_VIN(64) is a load on this rail feeding its own core regulator.Review
U11 / U6 [SISS65DN-T1-GE3]+VBAT / +VBAT safeBattery/12V OR-ing front end: U11 default-on (gate pulled to GND via R9=100kΩ) passes battery through continuously; U6 default-off (gate pulled to +VBATsafe via R8=100kΩ) passes +12V when S3/J3 pulls its gate low. Both MOSFETs rated far above plausible load current (Id -94A package-limited, Vishay datasheet) - benign oversizing.Review
U5 [TPS56A37RPAR]+5VMODE resistor R10=52.3kΩ to AGND matches TI's 1% 52.3kΩ recommendation for fixed-frequency setting (TI datasheet page 3/11).✓
U5 [TPS56A37RPAR]+5VFB divider (R14 73.2kΩ + R13 49.9Ω top / R15 10kΩ bottom, ratio 0.120) with VREF 0.600V computes VOUT=5.000V, matching TI Table 7-2 5V/500kHz reference design.✓
U5 [TPS56A37RPAR]+5VSoft-start capacitor C25=47nF on SS gives Tss=Css×VREF/Iss=47nF×0.6V/6µA=4.7ms (TI datasheet page 6), longer than the 1.8ms default - deliberate extension, no issue.✓
U5 [TPS56A37RPAR]+5VBOOT-SW bootstrap capacitor C28=0.1µF (via 0Ω link R25) matches TI's BOOT-to-SW capacitor requirement (datasheet page 17).✓
U5 [TPS56A37RPAR]+5VPG open-drain pulled up 100kΩ (R23) to the regulator's own +5V output, correct per TI's recommended ≤5.5V pull-up rail (datasheet page 13); a fault still sinks the pin low regardless of rail state.✓
U5 [TPS56A37RPAR]+5V / +12VOutput-side capacitance on +5V totals 54µF; input-side bulk on +12V totals 240.3µF - ample for a 10A-capable converter (TI iout_max, datasheet page 1).✓
U5 [TPS56A37RPAR]+12VEN auto-enable network: zener D4 (8.7V, cathode on +12V) plus pull-down R16 (100kΩ) computes a turn-on threshold of Vz+VEN_on ≈ 8.7V+1.18V = 9.88V (TI datasheet page 5) - verified auto-enable/UVLO network.✓
CR1 [SMBJ15A]+12VTVS clamp 24.4V at Ipp=24.6A (Littelfuse datasheet) stays below the VIN abs-max of downstream parts (U5 32V, U6/U11 VDS -30V, U7 VS 40V); standoff 15.0V exceeds the nominal 12.00V rail by 25%.✓
U4 [AZ1117CH-3.3TRG1]+3.3VFixed-output LDO: ADJ/GND tied to GND per fixed-part configuration (Diodes Inc. datasheet page 3); INPUT on +5V gives 1.7V dropout headroom, within the 1.5V-10V window. Output decoupling on +3.3V totals 39.9µF vs 10µF minimum (datasheet page 3).✓
U1 [RP2350B]+1.1VDVDD decoupling totals 9.6µF (2x4.7µF+2x0.1µF) across 3 DVDD pins, exceeding the datasheet's recommended two 100nF + one 4.7µF (page 441).✓
U1 [RP2350B]Net-(U1-VREG_AVDD)VREG_AVDD isolated from +3.3V by RC filter R3(33Ω)/C4(4.7µF), cutoff ≈1.0kHz, suppressing switching noise into the analog reference.✓
Q4-Q7 [SIA440DJ-T1-GE3]+12V pyroGate pull-downs (R50-R53, 100kΩ) hold pyro-channel switches off by default; VDS rating (40V) comfortably exceeds the 12V pyro rail.✓

4.5 Citations

AI-Assisted —
References
AT25SF128A (Renesas Electronics) — datasheet
www.renesas.com/en/document/dst/at25sf128aat25qf128a-data...
ABM8-272 (Abracon) — datasheet
datasheet.lcsc.com/datasheet/pdf/d5520a242c89eeaef42f6496...
ADXL375 (Analog Devices) — datasheet
ADXL375BCCZ.pdf
AZ1117C-3.3 (Diodes Incorporated) — datasheet
www.diodes.com/datasheet/download/AZ1117C.pdf
BMP581 (Bosch Sensortec) — datasheet, cited pages 2,19,46,51
www.bosch-sensortec.com/media/boschsensortec/downloads/da...
BTM9011EP (Infineon) — datasheet
www.infineon.com/dgdl/Infineon-Infineon-BTM901xEP-DS-v01_...
RP2350 (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf
SiA440DJ (Vishay Siliconix) — datasheet
www.vishay.com/docs/64138/sia440dj.pdf
SiSS65DN (Vishay Siliconix) — datasheet
www.vishay.com/doc?76297
SMBJ15A (Littelfuse) — datasheet
SMBJ15AHE3-BH.pdf
TPS56A37 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tps56a37.pdf

5 Connector Pinouts

Total connectors23

5.1 J1 JST (SWD)

J1 - JST (SWD)
PinPin NameNetNotes
1Pin_1SWCLK
2Pin_2GND
3Pin_3SWDIO

5.2 J2 5452257

J2 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11+VBAT
22GND

5.3 J3 5452257

J3 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11gate
22GND

5.4 J4 5452257

J4 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11+12V
22+12V pyro

5.5 J5 5452257

J5 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11+12V
22GND

5.6 J6 5452257

J6 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11+5V
22GND

5.7 J7 5452257

J7 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11+3.3V
22GND

5.8 J8 USB_C_Receptacle_USB2.0_16P

J8 - USB_C_Receptacle_USB2.0_16P
PinPin NameNetNotes
A1GNDGND
A4VBUSNet-(D5-A)
A5CC1Net-(J8-CC1)
A6D+USB_DP
A7D-USB_DN
A8SBU1Net-(J8-SBU1)
A9VBUSNet-(D5-A)
A12GNDGND
B1GNDGND
B4VBUSNet-(D5-A)
B5CC2Net-(J8-CC2)
B6D+USB_DP
B7D-USB_DN
B8SBU2Net-(J8-SBU2)
B9VBUSNet-(D5-A)
B12GNDGND
SHSHIELDGND

5.9 J9 5452257

J9 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11pin out 1
22pin out 2

5.10 J10 Micro_SD_Card

J10 - Micro_SD_Card
PinPin NameNetNotes
1DAT2SD DAT2
2DAT3/CDSD DAT3
3CMDSD CMD
4VDD+3.3V
5CLKSD CLK
6VSSGND
7DAT0SD DAT0
8DAT1SD DAT1
SHSHIELDNC

5.11 J11 5452257

J11 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11Net-(F1-Pad2)
22pyro 1 drain

5.12 J12 5452257

J12 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11Net-(F2-Pad2)
22pyro 2 drain

5.13 J13 5452257

J13 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11Net-(F3-Pad2)
22pyro 3 drain

5.14 J14 5452257

J14 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11Net-(F4-Pad2)
22pyro 4 drain

5.15 J15 5452257

J15 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11motor out a
22motor out b

5.16 J16 5452257

J16 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11+5V
22GND

5.17 J17 5452257

J17 - 5452257 (5452257) [5452257]
PinPin NameNetNotes
11motor in a
22motor in b

5.18 J18 servo 1

J18 - servo 1
PinPin NameNetNotes
1Pin_1Net-(J18-Pin_1)
2Pin_2+5V
3Pin_3GND

5.19 J19 servo 2

J19 - servo 2
PinPin NameNetNotes
1Pin_1Net-(J19-Pin_1)
2Pin_2+5V
3Pin_3GND

5.20 J20 servo 3

J20 - servo 3
PinPin NameNetNotes
1Pin_1Net-(J20-Pin_1)
2Pin_2+5V
3Pin_3GND

5.21 J21 servo 4

J21 - servo 4
PinPin NameNetNotes
1Pin_1Net-(J21-Pin_1)
2Pin_2+5V
3Pin_3GND

5.22 J22 SMA-J-P-H-ST-EM1

J22 - SMA-J-P-H-ST-EM1
PinPin NameNetNotes
1Net-(D2-A2)
2_1GND
2_2GND
3_1GND
3_2GND

5.23 J23 SMA-J-P-H-ST-EM1

J23 - SMA-J-P-H-ST-EM1
PinPin NameNetNotes
1Net-(D1-A2)
2_1GND
2_2GND
3_1GND
3_2GND

6 Indicator Documentation

4 indicator device(s) found.

6.1 Indicator Assignments

Indicators
RefDesTypeColorSignalSheetNotes
LED4COM-16347-Net-(LED3-DOUT)interfaces.kicad_schSmart LED (serial), chain LED1 -> LED4, position 4 of 4
LED2COM-16347-Net-(LED1-DOUT)interfaces.kicad_schSmart LED (serial), chain LED1 -> LED4, position 2 of 4
LED3COM-16347-Net-(LED2-DOUT)interfaces.kicad_schSmart LED (serial), chain LED1 -> LED4, position 3 of 4
LED1COM-16347-LED controllerinterfaces.kicad_schSmart LED (serial), chain LED1 -> LED4, position 1 of 4

6.2 Indicator Testability

Bed-of-nails or flying probe access was not selected. Test point recommendations for indicators will not be applied.

7 Switch Documentation

3 switch(es) found in design.

7.1 Switch Configurations

A B
S1 Contact Pairs (PTS647SM38SMTR2_LFS)
ContactPin ANet APin BNet BWhen OpenWhen ClosedNotes
13GND4GNDOPENSHORTED
22Net-(S1-NO_2)1(not connected)SIGNALNC
S1 All Pins
Pin #Pin NameNetPaired WithType
3COM_1GND4CONTACT
2NO_2Net-(S1-NO_2)1CONTACT
4COM_2GND3CONTACT
1NO_1(not connected)2CONTACT
S2 Contact Pairs (PTS647SM38SMTR2_LFS)
ContactPin ANet APin BNet BWhen OpenWhen ClosedNotes
13GND1Net-(S2-NO_1)SIGNALLOW
22(not connected)4GNDOPENSHORTED
S2 All Pins
Pin #Pin NameNetPaired WithType
3COM_1GND1CONTACT
2NO_2(not connected)4CONTACT
4COM_2GND2CONTACT
1NO_1Net-(S2-NO_1)3CONTACT
S3 Contact Pairs (JS202011SCQN)
ContactPin ANet APin BNet BWhen OpenWhen ClosedNotes
14(not connected)1GNDOPENSHORTED
23(not connected)6(not connected)OPENSHORTED
32gate5(not connected)SIGNALNC
S3 All Pins
Pin #Pin NameNetPaired WithType
44(not connected)1CONTACT
33(not connected)6CONTACT
11GND4CONTACT
22gate5CONTACT
55(not connected)2CONTACT
66(not connected)3CONTACT

8 Low-Speed Serial Interfaces (LSSI)

Detected: 1 I2C, 1 SWD | 1 partial

8.1 I2C

I2C -> IC2, IC3, U1, U7, U8, U9
Topology: Targets (IC2, IC3, U1, U7, U8, U9)
SignalNet NameConnectorTest PointTarget Pin
SCLNet-(U9-ENV_SCL)(none)(none)U9_15 (ENV_SCL)
SDA (needs pull-up)MISO(none)(none)IC2_2 (MISO), IC3_12 (SDO/ALT_ADDRESS), U1_20 (GPIO20), U7_9 (SDO), U8_5 (SDO), U9_20 (H_SDA/H_MISO/TX)
AddressTargetIndustry TypeDescription
IC2713-114993390RF Modules Wio-SX1262 Wireless Module (Bulk),
SX1262 embedded, supports LoRa&LoRaWAN on EU868 & US915
IC3ADXL375BCCZ-RLAccelerometer Triple +/-200g 2.5V/3.3V 14-Pin LGA T/R
U1RP2350BA microcontroller by Raspberry Pi,
dual CPU architecture (ARM Cortex-M33 / RISC-V Hazard3),
150MHz, no flash, 520KB SRAM,
12 PIO state machines, VQFN-80
U7BTM9011EPMOTIX Full-Bridge ICs for BDC Motors
U8BMP581
U9BNO086Accelerometer, Gyroscope,
Magnetometer, Temperature,
9 Axis Sensor I2C, SPI Output
I2C Pull-up Check
NetComponentStatus
MISOPull-up on MISO was not detected. A pull-up for basic I2C operation would be about 4.7K ohms. Even if an IC has internal pull-ups on its inputs, they are likely just for biasing the input high (47-100K ohms) and are not sufficient for I2C. We did not consult the datasheet for IC2 but low-value resistors cost silicon area, so it is unlikely the IC has them.
Net-(U9-ENV_SCL)R43Pull-up resistor 10K (R43) found on SCL✓

8.2 SWD

SWD -> U1
Topology: Access (J1) » Targets (U1)
SignalNet NameConnectorTest PointTarget Pin
SWCLKSWCLKJ1_1(none)U1_33 (SWCLK)
SWDIOSWDIOJ1_3(none)U1_34 (SWDIO)
NRSTSX1262 reset(none)(none)U1_25 (GPIO24)
TargetIndustry TypeDescription
U1RP2350BA microcontroller by Raspberry Pi,
dual CPU architecture (ARM Cortex-M33 / RISC-V Hazard3),
150MHz, no flash, 520KB SRAM,
12 PIO state machines, VQFN-80

8.3 LSSI DFT Analysis

6 signal(s) missing test point coverage. Test points allow ATE to run tests without requiring operator intervention and setup. They should be considered mandatory for high volume products.
During test, ATE can override functional operation to explicitly test through the interface in ways that functional operation cannot, or is not available at certain test stages.
Missing Test Points
SignalNet NameConnectorInterface
NRSTSX1262 reset(none)SWD -> U1
SWCLKSWCLKJ1_1SWD -> U1
SWDIOSWDIOJ1_3SWD -> U1
SCLNet-(U9-ENV_SCL)(none)I2C -> IC2, IC3, U1, U7, U8, U9
SDAMISO(none)I2C -> IC2, IC3, U1, U7, U8, U9
SWCLKSWCLKJ1_1SWD -> U1

9 High-Speed Serial Interfaces (HSSI)

4 differential pair(s)

Differential pairs detected from _P/_N naming convention which KiCad uses for differential pair identification. Designer should consider explicit assignment to distinct net classes for each SERDES type to explicitly document layout intent.
1 USB differential pair(s) have no controlled-impedance net class assigned. Assign a 90 Ohm differential net class so the impedance intent carries into PCB layout and length tuning.

9.1 Differential Pairs

Differential pairs with designer-specified class annotations.

None of the 4 differential pairs specify a target impedance (the Impedance column is blank). Strongly suggested: put the value in the class name - e.g. 100_OHM, 90_OHM, 50_OHM. The pairs are already identified by their nets, so the ohm value is the useful part to capture for layout.
Differential Pairs
Net NameClassImpedanceNotes
MCU_DNDIFF_PAIR
MCU_DPDIFF_PAIR
USB_DNUSB
USB_DPUSB

9.2 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. ECONOMY MODE — review needed: this cost-reduced analysis tier can produce misjudgements compared to standard mode.

9.2.1 USB 2.0 Full/Low-Speed Interface (J8, U1)

AI-Assisted — J8 is a 16-pin USB Type-C receptacle (GCT USB4105-xx-A, USB2.0-only footprint) wired for USB 2.0 signaling only; no SuperSpeed TX/RX pairs appear in the data, consistent with U1 (RP2350B), whose on-chip USB controller supports only Full-Speed device and Full/Low-Speed host operation per the Raspberry Pi RP2350 datasheet, page 16. The D+/D- pair runs from J8 pins A6/B6 (D+) and A7/B7 (D-) through series resistors R5 (27 Ω) and R4 (27 Ω) to U1 pins 67 (USB_DP) and 66 (USB_DN). This exactly matches the RP2350 datasheet requirement for a series 27 Ω resistor on each of USB_DP and USB_DM (page 16); the RP2350 provides internal bus pull-ups/pull-downs, so no external biasing network is needed. No differential-impedance net-class annotation is present in the schematic data for USB_DP/USB_DN or MCU_DP/MCU_DN — USB 2.0 calls for 90 Ω nominal differential impedance, to be assigned when routing begins. No AC-coupling capacitors sit on the D+/D- path, which is correct, since USB 2.0 D+/D- is DC-coupled per spec. CC1 and CC2 are each pulled to GND through 5.1 kΩ resistors (R18, R19), the standard Type-C Rd sink-only (UFP) configuration. Separately, J8's VBUS pins feed the +5V rail through Schottky diode D5 (anode on the VBUS net, cathode on +5V), allowing USB bus-powering while blocking backfeed onto VBUS from the +5V rail (sourced by U5 from +12V); the orientation checks out consistent.

9.3 Findings

AI-Assisted —
InterfaceProtocolFindingSeverity
USB_DP/USB_DN differential impedanceUSB 2.0No controlled-impedance net class annotation present for USB_DP/USB_DN or MCU_DP/MCU_DN in the schematic data; USB 2.0 specifies 90 Ω nominal differential impedance to be applied at layoutReview
USB 2.0 D+/D- (J8 to U1)USB 2.0 Full/Low-SpeedSeries termination R4 = 27 Ω, R5 = 27 Ω on USB_DN/USB_DP matches Raspberry Pi RP2350 datasheet recommendation, page 16✓
USB_DP/USB_DN AC couplingUSB 2.0No coupling capacitors present; correct per USB 2.0 spec, which defines a DC-coupled D+/D- interface (Raspberry Pi RP2350 datasheet, page 16)✓
J8 connector typeUSB 2.0 Full/Low-Speed16-pin USB Type-C receptacle wired for USB 2.0 only (no SuperSpeed lanes populated), appropriate for the RP2350's Full-Speed/Low-Speed-only USB PHY✓
CC1/CC2 configurationUSB Type-CR18 and R19 (5.1 kΩ) pull CC1 and CC2 to GND, the standard Type-C Rd sink-only (UFP) configuration✓
VBUS power pathUSB 2.0 powerD5 Schottky diode (anode on the VBUS net, cathode on +5V rail) allows bus-powering from J8 while blocking backfeed onto VBUS; orientation verified consistent✓

9.4 Citations

AI-Assisted —
References
RP2350 (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf

10 Memory Interface Analysis

Found 1 complete memory interface(s)

10.1 J10 EMMC Connector

J10 (Micro_SD_Card) - EMMC Connector Interface [4-bit]
SignalPin NamePin #Net NameTest PointSource IC
CLOCKCLK5SD CLK-U1_40
CTRL_SD CMDCMD3SD CMD-U1_42
DATA_0DAT18SD DAT1-U1_38
DATA_1DAT3/CD2SD DAT3-U1_43
DATA_2DAT21SD DAT2-U1_44
DATA_3DAT07SD DAT0-U1_39

11 Functional Analysis

12 device(s) to review across 4 category(ies)

Device Inventory
RefDesCategoryPart NumberDescriptionInterfacesHSSI
Y1CRYSTALABM8-272-T3--
IC1DEVICE988-AT25SF128A-SHB-TThe AT25SF128A is a member of our standard class code and data storage solutions designed for 3V systems in which program code is shadowed from Flash memory into embedded or external RAM for execution.The architecture includes erase block sizes that are optimized to meet the needs of today's code and data storage applications and three security register pages for unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key storage, etc. Universally compatible pinout and comma--
U1DEVICERP2350BA microcontroller by Raspberry Pi, dual CPU architecture (ARM Cortex-M33 / RISC-V Hazard3), 150MHz, no flash, 520KB SRAM, 12 PIO state machines, VQFN-80I2C, SWD, SWD (partial)-
U10DEVICEC1--
U11DEVICESISS65DN-T1-GE3--
U4DEVICEAZ1117CH-3.3TRG1--
U6DEVICESISS65DN-T1-GE3--
U7DEVICEBTM9011EPMOTIX Full-Bridge ICs for BDC MotorsI2C-
U8DEVICEBMP581I2C-
IC3SENSORADXL375BCCZ-RLAccelerometer Triple +/-200g 2.5V/3.3V 14-Pin LGA T/RI2C-
U9SENSORv1.17Accelerometer, Gyroscope, Magnetometer, Temperature, 9 Axis Sensor I2C, SPI OutputI2C-
IC2WIRELESS713-114993390RF Modules Wio-SX1262 Wireless Module (Bulk), SX1262 embedded, supports LoRa&LoRaWAN on EU868 & US915I2C-

11.1 Functional Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. ECONOMY MODE — review needed: this cost-reduced analysis tier can produce misjudgements compared to standard mode.

11.1.1 Y1 - Crystal Oscillator (ABM8-272-T3)

AI-Assisted — Y1 provides the 12MHz reference for U1, wired to XIN and XOUT with case/ground pins 2 and 4 tied to GND. Load capacitors C16 and C17 (15pF each) form the standard two-capacitor network; combined with a few pF of pin/trace parasitic, the effective load capacitance lands close to the Abracon datasheet's 10pF typical load capacitance (Abracon datasheet, https://datasheet.lcsc.com/datasheet/pdf/d5520a242c89eeaef42f6496027f72da.pdf). R6 in series on XOUT is a standard damping resistor and does not interrupt the DC path to the crystal. The 12MHz frequency matches the RP2350B's default 12MHz OTP-configurable crystal oscillator input (Raspberry Pi Ltd datasheet, https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf). No wiring issues found.

11.1.2 IC1 - SPI/QSPI Flash Memory (AT25SF128A)

AI-Assisted — IC1 is powered from +3.3V (VCC, pin8) within the 2.7V-3.6V operating range specified by Renesas, with GND on pin4 (Renesas datasheet, https://www.renesas.com/en/document/dst/at25sf128aat25qf128a-datasheet). SCK, SI/O0, SO/O1, WP#/O2 and HOLD#/O3 connect to U1's QSPI_SCLK and QSPI_SD0-QSPI_SD3, correctly using the WP#/HOLD# pins in their alternate IO2/IO3 role for quad-SPI operation. CS is pulled high through R12 (10kΩ) to +3.3V, holding the flash deselected by default until U1 actively asserts QSPI_SS low. R7 taps the QSPI_SS net to switch S1's normally-open contact returning to GND - a BOOTSEL-style path allowing a button press to force CS low for ROM-bootloader entry, a standard and intentional RP2350 pattern rather than a defect. No violations of the datasheet's supply or interface pin requirements were found.

11.1.3 U10 - GNSS Module (MAX-M10S, marked C1)

AI-Assisted — U10's VCC and V_IO connect to +3.3V and its three GND pins return to the ground net - correct power topology at the connectivity level. No manufacturer datasheet for this specific module was supplied in this review package, so electrical thresholds (supply tolerance, I/O levels, RF matching) could not be checked against verified data; the following is limited to structural connectivity. VCC_RF feeds through R42 (10Ω) and inductor L3 into the RF_IN line, with C43 (10nF) providing an RF-frequency bypass to GND at the bias node - a bias-tee topology consistent with powering an active GNSS antenna through the RF feed. TXD/RXD cross-connect to U1 GPIO13/GPIO12, RESET to GPIO9, TIMEPULSE to GPIO11, EXTINT to GPIO10, and SAFEBOOT to GPIO14 - the UART and control interface is fully wired. V_BCKP, LNA_EN, VIO_SEL, SDA and SCL are left unconnected by design, a valid configuration if RTC battery backup and I2C are not used, though this could not be cross-checked against verified documentation.

11.1.4 U11 & U6 - Battery/Auxiliary Power Path MOSFETs (SiSS65DN-T1-GE3)

AI-Assisted — U11 and U6 are both SiSS65DN-T1-GE3 P-channel MOSFETs used as series power-path elements (Vishay datasheet, https://www.vishay.com/doc?76297). U11 sits between +VBAT (drain) and +VBAT safe (source), its gate pulled to GND through R9 (100kΩ) with no other driver on that node - a fixed always-on configuration. With source near battery potential and gate near 0V, Vgs is strongly negative, well past the -1V to -2.3V threshold and inside the ±20V gate rating, so U11 conducts continuously in normal polarity - a standard reverse-polarity protection topology. U6 sits between +12V (drain) and +VBAT safe (source), gate referenced to its own source through R8 (100kΩ), giving Vgs=0 and holding the FET off by default; closing slide switch S3 grounds the gate through its NO contact, driving Vgs strongly negative and turning U6 on - this forms the system's main manual power-admit switch for the external +12V supply. While U6 is intentionally held off, its P-channel body diode (anode at drain/+12V, cathode at source/+VBAT safe) remains available as an uncontrolled conduction path once +12V exceeds +VBAT safe by roughly 0.7V-1.2V (per the device's body-diode forward-voltage data), partially defeating the switch's blocking function when open. A dedicated Schottky diode used for this clamp/pass function, rather than relying on the MOSFET's body diode, would give a lower and more predictable forward drop and a defined blocking state when U6 is off.

11.1.5 U4 - 3.3V Linear Regulator (AZ1117CH-3.3TRG1)

AI-Assisted — U4 is the fixed-3.3V member of the AZ1117C family (Diodes Incorporated datasheet, https://www.diodes.com/datasheet/download/AZ1117C.pdf). INPUT is fed from +5V and OUTPUT drives +3.3V, a 1.7V differential that clears the 1.5V minimum used in the datasheet's output-accuracy test condition. ADJ/GND (pin1) is tied to GND, consistent with the fixed-output part's internal wiring where this pin functions as ground. EPAD (pin4) is tied to +3.3V, matching this SOT-223 device's tab-to-OUTPUT convention shown in the datasheet's typical application (page 3). Aggregate input-side capacitance (54µF from C20, C30, C31) exceeds the 10µF ceramic input requirement, and aggregate output-side capacitance (39.9µF) exceeds the 10µF/<20Ω-ESR output requirement, though both totals are shared across the whole rail rather than dedicated solely to U4. No wiring or capacitance issues found.

11.1.6 U7 - Dual Half-Bridge Motor Driver (BTM9011EP)

AI-Assisted — U7 is supplied from +12V on VS (pins11/12), inside both the 7V-18V normal and 4.5V-40V extended operating ranges, with GND (pins3/4/5) and the EDP thermal pad correctly grounded (Infineon datasheet, https://www.infineon.com/dgdl/Infineon-Infineon-BTM901xEP-DS-v01_00-EN-DataSheet-v01_00-EN.pdf?fileId=8ac78c8c90530b3a01912d365ee4326f). OUTA1/OUTA2 and OUTB1/OUTB2 are each tied together per phase for parallel higher-current operation, a supported configuration. CS is a dedicated GPIO36 line; SCLK, SDI and SDO share the board's common SPI bus with the other sensor/RF ICs, each gated by its own CS with no contention shown. The current-sense pin IS is loaded by burden resistor R22 (820Ω) to GND with C40 (1nF) filtering, feeding U1 GPIO40/ADC0. The datasheet caps IS current at 5.5mA even in normal operation (page32); at that current R22 produces 4.51V, exceeding the RP2350B's ~3.3V IOVDD/ADC input range, and fault-state current (7.2mA typical, up to 8.6mA) would produce roughly 5.9V-7.05V - a real overvoltage risk on U1's ADC input. R22 should be reduced to roughly 600Ω or below. SDO is documented as open-drain requiring an external pull-up to VDD_EXT (test condition 2.2kΩ to 5V, pages30-31), but no discrete pull-up exists on the shared MISO net; U1 GPIO20's configurable internal pull-up can substitute if enabled in firmware. SDI is typed open-collector in the schematic symbol, but the datasheet describes it as a standard input with an internal pull-down (pages12-13) - the symbol's pin type appears mistaken and no pull-up is needed.

11.1.7 U8 - Barometric Pressure Sensor (BMP581)

AI-Assisted — U8 is powered from +3.3V on VDD/VDDIO with VSS (pins3, 8, 9) tied to GND (Bosch Sensortec datasheet, https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp581-ds004.pdf). SCK/SDI/SDO sit on the shared SPI bus and CSB is a dedicated line to U1 GPIO16. The datasheet documents CSB as an interface-mode strap at power-up: pulled low keeps the part in SPI mode, while an internal pull-up (74kΩ-131kΩ typical 100kΩ, page13) defaults the node toward I2C Autoconfig mode if left undriven. No external pull-down exists on the CSB net, so before firmware actively drives GPIO16 low, U8 could power up in I2C mode instead of the intended SPI mode; an external pull-down on CSB would make the interface selection deterministic at reset. INT (pin7) is designer-marked no-connect; the datasheet recommends tying an unused INT pin to GND with INT_CONFIG.int_en disabled rather than leaving it floating (page22) - this pin should be tied to GND.

11.1.8 IC3 - High-g Accelerometer (ADXL375BCCZ-RL)

AI-Assisted — IC3 is powered from +3.3V on both VDD_I/O and VS, with GND_1/GND_2/GND_3 correctly grounded (Analog Devices datasheet, source: Tomachie). CS, SDA/SDI/SDIO, SDO/ALT_ADDRESS and SCL/SCLK are wired for 4-wire SPI, matching the shared board SPI bus with a dedicated CS line to U1 GPIO15. RESERVED_1 (pin3) is designer-marked no-connect and RESERVED_2 (pin11) is left open with no other net member - both fall within the datasheet's allowed options for these pins (tie to VS or leave open; tie to GND or leave open, respectively). NC (pin10) is also left open, consistent with the datasheet's 'Not Internally Connected' designation. INT1 and INT2 each terminate on an isolated net with no host GPIO connection; if motion interrupts are not intended to be used this is acceptable, but it is worth noting neither interrupt output is currently usable.

11.1.9 U9 - 9-Axis IMU (BNO086)

AI-Assisted — U9 is powered from +3.3V on VDD/VDDIO with GND/GNDIO correctly grounded. No manufacturer datasheet for this part was supplied in this review package, so electrical thresholds could not be checked against verified data; the following is limited to structural connectivity. BOOT, PS1 and CLKSEL0 are each pulled to +3.3V through 10kΩ resistors (R39, R40, R41), and CLKSEL1/XOUT32 is tied to GND - every configuration pin sits at a defined DC level, none floating. ENV_SCL and ENV_SDA are pulled to +3.3V through 10kΩ resistors (R43, R44), consistent with I2C pull-ups on the auxiliary environmental-sensor bus. H_CS and H_INT connect to dedicated GPIO17 and GPIO21 lines, while H_SCL/SCK/RX, H_SDA/H_MISO/TX and SA0/H_MOSI share the board's common SPI bus. CAP (pin9) is bypassed with a 0.1µF capacitor to GND. RST (pin11) and XIN32 (pin27) are designer-marked no-connect; without a datasheet for this exact part the implications of leaving these floating could not be verified.

11.1.10 IC2 - LoRa Wireless Module (Wio-SX1262)

AI-Assisted — IC2 is powered from +3.3V on VCC (pin8) with GND_1 (pin7) and GND_2 (pin10) correctly returned to the ground net. No manufacturer datasheet for this specific module was supplied in this review package, so the supply voltage tolerance and RF electrical specifications could not be checked against verified data - the following is limited to structural connectivity. MOSI, MISO and SCK sit on the board's shared SPI bus together with U7, U8, U9 and IC3, while NSS (chip select) is a dedicated line to U1 GPIO23. NRST, BUSY, DIO1 and RF_SW_ are each wired to individually dedicated GPIOs (GPIO24, GPIO27, GPIO26 and GPIO25 respectively) with no sharing or contention - correct point-to-point control topology for this device class. No external crystal is present for IC2, consistent with the module description indicating the SX1262 RF front end is embedded with its own timing reference onboard. The ANT pin (pin9) routes through a shunt element C52 (value 0, tied pin2 to GND) and a series element L4 (value 0) into a TVS diode D1, then out to SMA connector J23; D1 is a bidirectional part with no anode/cathode distinction, so there is no orientation to check. Both L4 and C52 carry a value of 0 in the matching network position - this is a common placeholder pattern for an RF pi-matching network but leaves the actual matching component values unresolved at this schematic revision. D1's clamp voltage is not stated in the schematic data, so clamping coordination between D1 and the SX1262 RF input rating could not be verified. No wiring errors were found on the digital control and SPI interface.

11.2 Findings

AI-Assisted —
DeviceFindingSeverity
U7 (BTM9011EP)IS current-sense burden resistor R22 (820Ω) produces 4.51V at the datasheet's 5.5mA max normal sense current, and roughly 5.9V-7.05V at fault current (7.2mA-8.6mA), exceeding the RP2350B's ~3.3V IOVDD/ADC input range on GPIO40/ADC0 - overvoltage riskHigh
U6 (SiSS65DN-T1-GE3)Body diode of the intentionally-off FET remains an uncontrolled conduction path from +12V to +VBAT safe; recommend a dedicated Schottky diode instead of relying on the MOSFET body diode for this clamp functionMedium
U8 (BMP581)CSB has no external pull-down; the datasheet's internal pull-up (74kΩ-131kΩ) defaults the interface toward I2C Autoconfig mode if undriven at power-up, risking wrong-mode boot before firmware asserts GPIO16 lowMedium
U8 (BMP581)INT pin (7) left floating (designer NC) instead of tied to GND as the datasheet recommends for an unused interrupt pinMedium
U7 (BTM9011EP)SDO open-drain output has no discrete external pull-up on the shared MISO net; RP2350B GPIO20 internal pull-up can substitute if enabledLow
U10 (MAX-M10S, marked C1)No manufacturer datasheet supplied for this part in this review; electrical thresholds not verifiedReview
U10 (MAX-M10S, marked C1)V_BCKP, LNA_EN, VIO_SEL, SDA, SCL left unconnected by designReview
U7 (BTM9011EP)SDI is typed open-collector in the schematic symbol but is a standard input with internal pull-down per the Infineon datasheet - symbol pin-type appears mistaken, no pull-up requiredReview
IC3 (ADXL375BCCZ-RL)INT1 and INT2 each terminate on an isolated net with no host GPIO connectionReview
U9 (BNO086)No manufacturer datasheet supplied for this part in this review; RST and XIN32 designer-marked no-connect could not be checked against verified dataReview
IC2 (Wio-SX1262)No manufacturer datasheet supplied for this module in this review; supply voltage range and RF specs not verifiedReview
IC2 (Wio-SX1262)D1 clamp voltage not stated in the schematic data; clamping coordination with the SX1262 RF input rating could not be verifiedReview
IC2 (Wio-SX1262)Matching network elements L4 and C52 both carry a value of 0 (placeholder/DNP position); RF matching network appears only partially populatedReview
Y1 (ABM8-272-T3)12MHz crystal wired to U1 XIN/XOUT with C16/C17 (15pF each) load caps; effective load capacitance close to the 10pF typical specified in the Abracon datasheet✓
Y1 (ABM8-272-T3)Case/ground pins 2 and 4 tied to GND✓
IC1 (AT25SF128A)VCC on +3.3V within the 2.7V-3.6V range per Renesas datasheet; GND correctly connected✓
IC1 (AT25SF128A)Quad-SPI wiring uses WP#/HOLD# as IO2/IO3 correctly; CS pulled high via R12 (10kΩ) to +3.3V✓
IC1 (AT25SF128A)R7/S1 form a BOOTSEL-style path grounding QSPI_SS through a button - standard RP2350 bootloader-entry pattern, not a defect✓
U10 (MAX-M10S, marked C1)VCC/V_IO on +3.3V, GND pins correctly grounded✓
U10 (MAX-M10S, marked C1)VCC_RF fed through R42 (10Ω) and choke L3 into RF_IN with C43 (10nF) bypass - bias-tee for active antenna, structurally consistent✓
U11 (SiSS65DN-T1-GE3)Reverse-polarity protection FET between +VBAT and +VBAT safe, gate pulled to GND via R9 (100kΩ) for continuous conduction in normal polarity - correct topology per Vishay datasheet✓
U6 (SiSS65DN-T1-GE3)Normally-off power-path switch between +12V and +VBAT safe, gate referenced to source via R8 (100kΩ), turned on by grounding the gate through slide switch S3 - correct topology✓
U4 (AZ1117CH-3.3TRG1)Input +5V, output +3.3V - 1.7V differential clears the datasheet's 1.5V minimum test condition✓
U4 (AZ1117CH-3.3TRG1)ADJ/GND tied to GND (fixed-output configuration) and EPAD tied to +3.3V matching this SOT-223 tab-to-OUTPUT convention✓
U4 (AZ1117CH-3.3TRG1)Input-side aggregate 54µF and output-side aggregate 39.9µF both exceed the 10µF ceramic capacitor requirements in the Diodes Incorporated datasheet✓
U7 (BTM9011EP)VS on +12V within the 7V-18V normal / 4.5V-40V extended operating range; GND and EDP correctly grounded✓
U7 (BTM9011EP)OUTA1/OUTA2 and OUTB1/OUTB2 paralleled per phase for higher current capability - supported configuration✓
U7 (BTM9011EP)CS, SCLK, SDI, SDO correctly wired on the shared SPI bus with individual chip-select lines, no contention✓
U8 (BMP581)VDD/VDDIO on +3.3V, VSS pins correctly grounded per Bosch Sensortec datasheet✓
U8 (BMP581)SCK/SDI/SDO on shared SPI bus, CSB on dedicated GPIO16 line✓
IC3 (ADXL375BCCZ-RL)VDD_I/O and VS on +3.3V, GND_1/2/3 correctly grounded✓
IC3 (ADXL375BCCZ-RL)4-wire SPI wiring (CS/SDI/SDO/SCLK) correctly configured on shared bus✓
IC3 (ADXL375BCCZ-RL)RESERVED_1/RESERVED_2 and NC pins left open, within the datasheet's allowed options✓
U9 (BNO086)VDD/VDDIO on +3.3V, GND/GNDIO correctly grounded✓
U9 (BNO086)BOOT, PS1, CLKSEL0 pulled to +3.3V via 10kΩ resistors; CLKSEL1/XOUT32 tied to GND - all configuration pins at defined levels✓
U9 (BNO086)ENV_SCL/ENV_SDA pulled to +3.3V via 10kΩ resistors for the auxiliary I2C bus✓
U9 (BNO086)H_CS/H_INT wired to dedicated GPIOs; H_SCL/H_SDA/SA0 share the common SPI bus✓
IC2 (Wio-SX1262)VCC on +3.3V, GND_1/GND_2 correctly connected to the ground net✓
IC2 (Wio-SX1262)MOSI/MISO/SCK on the shared SPI bus, NSS wired as a dedicated chip-select line to GPIO23✓
IC2 (Wio-SX1262)NRST, BUSY, DIO1 and RF_SW_ each wired to individually dedicated GPIOs (GPIO24, GPIO27, GPIO26, GPIO25) with no bus sharing✓
IC2 (Wio-SX1262)Antenna path from ANT through matching network and TVS diode D1 to SMA connector J23; D1 is bidirectional, no orientation to check✓

11.3 Citations

AI-Assisted —
References
AT25SF128A (Renesas Electronics) — datasheet
www.renesas.com/en/document/dst/at25sf128aat25qf128a-data...
ABM8-272 (Abracon) — datasheet
datasheet.lcsc.com/datasheet/pdf/d5520a242c89eeaef42f6496...
ADXL375 (Analog Devices) — datasheet
ADXL375BCCZ.pdf
AZ1117C-3.3 (Diodes Incorporated) — datasheet
www.diodes.com/datasheet/download/AZ1117C.pdf
BMP581 (Bosch Sensortec) — datasheet, cited pages 2,19,46,51
www.bosch-sensortec.com/media/boschsensortec/downloads/da...
BTM9011EP (Infineon) — datasheet
www.infineon.com/dgdl/Infineon-Infineon-BTM901xEP-DS-v01_...
RP2350 (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf
SiSS65DN (Vishay Siliconix) — datasheet
www.vishay.com/doc?76297
SMBJ15A (Littelfuse) — datasheet
SMBJ15AHE3-BH.pdf

12 Designer Annotated Nets

No designer-annotated nets found.

13 EMC & ESD Protection Checks

Checks run1
Passed0
Issues found1
EMC Check Summary
CheckIssuesStatus
Connector Shell Grounding1

13.1 Connector Shell Grounding

RefDesTypeIssueRecommendationSeverity
J8USB_C_Receptacle_USB2.0_16PJ8 (USB_C_Receptacle_USB2.0_16P): Shell pins connected directly to logic GND which masks design intent for layout.Per USB Type-C Specification R2.5, Section 3.2.1: the receptacle shell shall be connected to the PCB ground plane — this is a directive to prevent a floating shell, not a directive to ignore IEC 61000-4-2 ESD requirements and mandate a direct short. Place shell/shield tabs on a dedicated schematic net per connector (e.g. SHIELD_GND_TYPE_C, SHIELD_GND_SD). This net represents the copper pour under the shielded connector. For plastic enclosed products with no earth ground, add a schematic note for dense via stitching of the shield copper pours to the ground plane with no isolation network. For earth ground connected products, review if the product requires R||C isolation of shields from logic GND to meet ESD compliance (IEC 61000-4-2).

13.2 ESD/TVS Protection Audit

Audit of connector-facing signal nets for ESD/TVS protection presence and orientation correctness.

Connector-facing signal nets analyzed:28 connector-facing signal(s). 1 protected, 27 unprotected, 0 orientation issue(s).

13.2.1 Unprotected Signal Nets

Signal NetConnectorStatus
USB_DNJ8No ESD Protection
USB_DPJ8No ESD Protection
Net-(J8-SBU1)J8No ESD Protection
Net-(J8-SBU2)J8No ESD Protection
SD CMDJ10No ESD Protection
SD DAT1J10No ESD Protection
Net-(J8-CC1)J8No ESD Protection
SD DAT2J10No ESD Protection
SD DAT3J10No ESD Protection
SD CLKJ10No ESD Protection
SD DAT0J10No ESD Protection
Net-(J8-CC2)J8No ESD Protection
gateJ3No ESD Protection
motor out bJ15No ESD Protection
motor out aJ15No ESD Protection
motor in aJ17No ESD Protection
pyro 3 drainJ13No ESD Protection
Net-(F3-Pad2)J13No ESD Protection
pyro 2 drainJ12No ESD Protection
pyro 4 drainJ14No ESD Protection
motor in bJ17No ESD Protection
Net-(F2-Pad2)J12No ESD Protection
Net-(F4-Pad2)J14No ESD Protection
pyro 1 drainJ11No ESD Protection
Net-(F1-Pad2)J11No ESD Protection
pin out 1J9No ESD Protection
pin out 2J9No ESD Protection

13.2.2 Protected Signal Nets

Signal NetConnectorProtection DeviceDevice TypeRail ConnectionOrientationStatus
Net-(D5-A)J8D5D_Schottky+5VCorrectProtected

14 Design-for-Test

Design for Testability (DFT) analysis for ICT/bed-of-nails test coverage.

14.1 DFx Options Selected

OptionSettingDescription
Test Point Insertion
Insert on power railsNoPlace test points on power rail nets in schematic
Insert on all netsNoExtend TP insertion to signal nets beyond power rails
Exclude HSSI netsYesExclude HSSI/differential pair nets from TP insertion
Exclude DRAM netsYesExclude SDRAM/DDR nets from TP insertion
Exclude BSCAN opens (full)YesExclude nets with 100% boundary scan opens coverage
Exclude BSCAN opens (partial)NoExclude nets with partial boundary scan opens coverage
Exclude BSCAN shortsNoExclude nets with boundary scan shorts coverage
GND test points6Number of GND test points to insert for BON fixture ground connections
Target PCOLA-SOQ0%Insert TPs in priority order until this PCOLA-SOQ % is reached
Target fault coverage0%Insert TPs in priority order until this shorts/opens fault coverage % is reached
Kelvin min resistance0.000 ohmLower bound (ohms) for Kelvin 4-wire TP insertion range
Kelvin max resistance1.000 ohmUpper bound (ohms) for Kelvin 4-wire TP insertion range
Tester Styles
OpticalAOIAutomated Optical Inspection of visible solder joints
AXIYesAutomated X-ray Inspection of hidden solder joints (BGA, QFN)
ATENoneNo automated test equipment
Test Access
JTAG/LSSI ConnectorYesConnector access to JTAG, SPI, I2C buses
IO ConnectorsNoIO connectors available for external stimulus/observation
TP AccessNoneNo physical probe access to test points
LoopbackNoneNo loopback cables
Test Types
Powered-Off Shorts/OpensNoUnpowered shorts and opens detection via probe access
PassivesNoR, C, L value measurement via probe or fixture access
Active AnalogNoVoltage regulator, reference, and op-amp output verification
Non-BSCAN DigitalNoDigital ICs without boundary scan: pin observability analysis
Boundary Scan1149.1IEEE 1149.1-2013 structural boundary scan
LSSINoJTAG chain, SPI, I2C, UART bus test coverage analysis
JTAG FunctionalNoFunctional verification beyond structural scan
Require Rail TPs for Diode TestNoRequire TPs on all IO power rails for ESD diode opens test (default: basic test with GND TP only)
Capacitance Probe Plate Target Devices—Refdes or footprint patterns for capacitance probe plate targets (ICs and vertical connectors)
Use Boundary Scan for Capacitance Probe Plate StimulusNoCount boundary scan drive cells on other devices as valid stimulus for the capacitance probe plate (applicable to VTEP / IEEE 1149.8.1-capable hardware)
NVM Programming
Default MethodDirectProgram via direct pin access; TPs on flash data/control lines
Environment
Test environmentlabPrototype/NPI: manual probing, bench JTAG, longer test times acceptable

14.2 Current Test Points

Total test points0
No test points found in design.

14.3 Boundary Scan Testability

No boundary scan capable devices were found in this design.

14.4 Inspection

Total: 154 components, 560 of 578 pins with inspection coverage.

14.4.1 AOI

IPC Compliant Footprints
Visible-joint components with IPC compliant footprints. Package type structurally verified from footprint name.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
Opens only (leads visible, shorts unreliable)
Samacsys
SOP65P600X115-15NSOIC/SOPIPC-7351B115U7
Subtotal: 1 components, 15 pins
Assumed Classification (Non-IPC Footprints)
Footprint names are not IPC-7351B or IPC-7251. Package type inferred from Pkg Type property or designator prefix. Classification may be incorrect.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
Opens + Shorts (all joints visible)
Samacsys
SIA440DJT1GE3SOT (Small Outline Transistor)Designator432Q4, Q5, Q6, Q7
Snapeda
SOT-223_DIO-LSOT (Small Outline Transistor)Footprint14U4
Capacitor_SMD
C_0603_1608Metric_Pad1.08x0.95mm_HandSolderChip PassiveDesignator4386C1, C10, C11, C12, C13, C14, C15, C16 ...+35 more
C_1210_3225Metric_Pad1.33x2.70mm_HandSolderChip PassiveDesignator48C22, C23, C30, C31
Fuse
Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolderChip PassiveDesignator48F1, F2, F3, F4
Inductor_SMD
L_0603_1608Metric_Pad1.05x0.95mm_HandSolderChip PassiveDesignator24L3, L4
Resistor_SMD
R_0603_1608Metric_Pad0.98x0.95mm_HandSolderChip PassiveDesignator4692R10, R11, R12, R13, R14, R15, R16, R18 ...+38 more
Snapeda
CAPMP7343X310NChip PassiveDesignator12C41
COM-16347_SPK-LChip PassiveDesignator416LED1, LED2, LED3, LED4
IND_TAIYO_NRS4018_TAYChip PassiveDesignator12L1
L_Wurth_WE-XHMI-6030Chip PassiveDesignator12L2
Diode_SMD
D_0603_1608Metric_Pad1.05x0.95mm_HandSolderSOD (Diode Package)Designator24D1, D2
D_SOD-123SOD (Diode Package)Footprint24D4, D5
Snapeda
DO-214AASMB_J-BEND_LTF-LSOD (Diode Package)Designator12CR1
Subtotal: 116 components, 266 pins
Opens only (leads visible, shorts unreliable)
Samacsys
114993390SOIC/SOPDesignator112IC2
TPS56A37RPARSOIC/SOPDesignator113U5
Snapeda
IC8_AT25SF128A-SHB-T_ADO-LSOIC/SOPDesignator18IC1
IC_BNO086SOIC/SOPDesignator128U9
POWERPAK-1212-8S_VISSOIC/SOPDesignator216U11, U6
XCVR_MAX-M10S-00BSOIC/SOPDesignator118U10
Subtotal: 7 components, 95 pins
Presence check (manual verification)
Connector_Card
microSD_HC_Molex_47219-2001ConnectorDesignator19J10
Connector_PinHeader_2.54mm
PinHeader_1x03_P2.54mm_VerticalConnectorDesignator412J18, J19, J20, J21
PinHeader_1x03_P2.54mm_Vertical_SMD_Pin1RightConnectorDesignator13J1
Connector_USB
USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_HorizontalConnectorDesignator117J8
Samacsys
5452257ConnectorDesignator1428J11, J12, J13, J14, J15, J16, J17, J2 ...+6 more
Snapeda
SAMTEC_SMA-J-P-H-ST-EM1ConnectorDesignator210J22, J23
Subtotal: 23 components, 79 pins

14.4.2 AXI

Assumed Classification (Non-IPC Footprints)
Hidden-joint classification inferred from Pkg Type property or designator prefix. Footprint names are not IPC-7351B or IPC-7251.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
Snapeda
LGA_CC-14-1_ADI-LLGA (Land Grid Array)Footprint114IC3
Package_DFN_QFN
QFN-80-1EP_10x10mm_P0.4mm_EP3.4x3.4mm_ThermalViasQFN/DFN (No-Lead)Footprint181U1
Snapeda
QFN10_BMP581_BOS-LQFN/DFN (No-Lead)Footprint110U8
Subtotal: 3 components, 105 pins

14.4.3 Unclassified Components

These components could not be classified for inspection. The library model lacks a Pkg Type property and the footprint name is not IPC-7351B or IPC-7251.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
Snapeda
XTAL_ABM8-272-T3Oscillator / CrystalDesignator14Y1
Samacsys
JS202011SCQNUnclassifiedUnknown16S3
PTS647SM38SMTR2LFSUnclassifiedUnknown28S1, S2
Subtotal: 4 components, 18 pins

14.5 Pin Fault Coverage

Predicted status of each pin for shorts and opens based on DFx options selected in section 13.1.

14.5.1 Fault Coverage Summary

Fault Coverage Summary (578 pins)
Test MethodOpensShorts
X-ray (AXI)0 (0.0%)0 (0.0%)
Optical (AOI)15 (2.6%)0 (0.0%)
Electrical
   Powered-off Testing0 (0.0%)0 (0.0%)
   Boundary Scan0 (0.0%)0 (0.0%)
   LSSI6 (1.0%)6 (1.0%)
   Total78 (13.5%)259 (44.8%)
Total Fault Coverage89 (15.4%)259 (44.8%)
No coverage489 (84.6%)319 (55.2%)

14.5.2 Uncovered Pins (310)

These pins have no electrical, optical, or X-ray test coverage even with all available test techniques applied.
Pin ⇅Net ⇅
IC1_7QSPI_SD3
IC1_3QSPI_SD2
IC1_1QSPI_SS
IC1_6QSPI_SCLK
IC1_5QSPI_SD0
IC1_2QSPI_SD1
C4_1Net-(U1-VREG_AVDD)
R11_2Net-(U1-RUN)
R11_1Net-(S2-NO_1)
R5_2USB_DP
R5_1MCU_DP
Y1_3Net-(C17-Pad2)
Y1_1XIN
U1_47motor in b
U1_55pyro 3 continuity
U1_58servo PWM 2
U1_38SD DAT1
U1_44SD DAT2
U1_43SD DAT3
U1_39SD DAT0
U1_42SD CMD
U1_45BTM9011EP CS
U1_49BTM9011EP IS
U1_48
U1_54pyro 2 continuity
U1_40SD CLK
U1_46motor in a
U1_52power signal
U1_53pyro 1 continuity
U1_56pyro 4 continuity
U1_57servo PWM 1
U1_61Net-(U1-VREG_AVDD)
U1_17BNO086 CS
U1_16BMP581 CS
U1_12MAX M10S TX
U1_19MOSI
U1_8MAX M10S int
U1_21BNO086 int
U1_23SX1262 CS
U1_2pyro 2 gate
U1_6
U1_14ADXL375 CS
U1_4pyro 4 gate
U1_1pyro 1 gate
U1_3pyro 3 gate
U1_7MAX M10S reset
U1_9MAX M10S timepulse
U1_11MAX M10S RX
U1_13MAX M10S boot
U1_18SCK
U1_20MISO
U1_22BNO086 wake
U1_27SX1262 int
U1_28SX1262 busy
U1_30XIN
U1_31XOUT
U1_26SX1262 rf switch
U1_35Net-(U1-RUN)
U1_75QSPI_SS
U1_79pin out 2
U1_71QSPI_SCLK
U1_72QSPI_SD0
U1_66MCU_DN
U1_37LED controller
U1_77servo PWM 3
U1_67MCU_DP
U1_36
U1_70QSPI_SD3
U1_74QSPI_SD1
U1_78servo PWM 4
U1_63Net-(U1-VREG_LX)
U1_73QSPI_SD2
U1_80pin out 1
R3_1Net-(U1-VREG_AVDD)
R6_2Net-(C17-Pad2)
R6_1XOUT
R4_2USB_DN
R4_1MCU_DN
C17_2Net-(C17-Pad2)
S2_2
S2_1Net-(S2-NO_1)
R7_2Net-(S1-NO_2)
R7_1QSPI_SS
R12_1QSPI_SS
L1_2Net-(U1-VREG_LX)
C16_2XIN
S1_2Net-(S1-NO_2)
S1_1
D5_2Net-(D5-A)
LED4_2
LED4_4Net-(LED3-DOUT)
R19_1Net-(J8-CC2)
LED2_2Net-(LED2-DOUT)
LED2_4Net-(LED1-DOUT)
J9_1pin out 1
J9_2pin out 2
J10_8SD DAT1
J10_SH
J10_2SD DAT3
J10_3SD CMD
J10_5SD CLK
J10_1SD DAT2
J10_7SD DAT0
R18_1Net-(J8-CC1)
J8_A9Net-(D5-A)
J8_B4Net-(D5-A)
J8_B9Net-(D5-A)
J8_A4Net-(D5-A)
J8_B6USB_DP
J8_A8Net-(J8-SBU1)
J8_A6USB_DP
J8_A5Net-(J8-CC1)
J8_B5Net-(J8-CC2)
J8_B7USB_DN
J8_A7USB_DN
J8_B8Net-(J8-SBU2)
LED3_2Net-(LED3-DOUT)
LED3_4Net-(LED2-DOUT)
LED1_2Net-(LED1-DOUT)
LED1_4LED controller
R8_2gate
L2_1Net-(U5-SW)
R14_2Net-(R13-Pad1)
R14_1Net-(U5-FB)
R13_1Net-(R13-Pad1)
R25_2Net-(U5-BOOT)
R25_1Net-(C28-Pad2)
R16_1power signal
R24_2Net-(C29-Pad2)
R24_1Net-(R13-Pad1)
C25_2Net-(U5-SS)
U6_4gate
C28_2Net-(C28-Pad2)
C28_1Net-(U5-SW)
R15_2Net-(U5-FB)
U11_4Net-(U11-G)
C29_2Net-(C29-Pad2)
C29_1Net-(U5-FB)
R23_1Net-(U5-PG)
R10_2Net-(U5-MODE)
J3_1gate
R9_1Net-(U11-G)
S3_4
S3_3
S3_2gate
S3_5
S3_6
U5_10Net-(U5-MODE)
U5_5Net-(U5-SS)
U5_6Net-(U5-SW)
U5_7Net-(U5-BOOT)
U5_4Net-(U5-PG)
U5_1power signal
U5_2Net-(U5-FB)
D4_2power signal
R52_1Net-(Q6-G)
J14_1Net-(F4-Pad2)
J14_2pyro 4 drain
J17_1motor in a
J17_2motor in b
R34_1pyro 4 continuity
R29_2pyro 2 continuity
R29_1pyro 2 drain
R47_2Net-(Q5-G)
R47_1pyro 3 gate
R32_1pyro 3 continuity
J18_1Net-(J18-Pin_1)
R27_2pyro 1 continuity
R27_1pyro 1 drain
Q4_D1pyro 2 drain
Q4_6pyro 2 drain
Q4_2pyro 2 drain
Q4_5pyro 2 drain
Q4_1pyro 2 drain
Q4_3Net-(Q4-G)
R33_2pyro 4 continuity
R33_1pyro 4 drain
R30_1pyro 2 continuity
R36_2Net-(J19-Pin_1)
R36_1servo PWM 2
R53_1Net-(Q7-G)
C40_1BTM9011EP IS
J11_1Net-(F1-Pad2)
J11_2pyro 1 drain
Q5_D1pyro 3 drain
Q5_6pyro 3 drain
Q5_2pyro 3 drain
Q5_5pyro 3 drain
Q5_1pyro 3 drain
Q5_3Net-(Q5-G)
R48_2Net-(Q6-G)
R48_1pyro 4 gate
J13_1Net-(F3-Pad2)
J13_2pyro 3 drain
R38_2Net-(J21-Pin_1)
R38_1servo PWM 4
F3_2Net-(F3-Pad2)
R51_1Net-(Q5-G)
R28_1pyro 1 continuity
J15_1motor out a
J15_2motor out b
R50_1Net-(Q4-G)
R35_2Net-(J18-Pin_1)
R35_1servo PWM 1
J21_1Net-(J21-Pin_1)
F4_2Net-(F4-Pad2)
Q7_D1pyro 1 drain
Q7_6pyro 1 drain
Q7_2pyro 1 drain
Q7_5pyro 1 drain
Q7_1pyro 1 drain
Q7_3Net-(Q7-G)
F2_2Net-(F2-Pad2)
F1_2Net-(F1-Pad2)
R37_2Net-(J20-Pin_1)
R37_1servo PWM 3
R22_2BTM9011EP IS
R46_2Net-(Q4-G)
R46_1pyro 2 gate
J20_1Net-(J20-Pin_1)
R31_2pyro 3 continuity
R31_1pyro 3 drain
R49_2Net-(Q7-G)
R49_1pyro 1 gate
Q6_D1pyro 4 drain
Q6_6pyro 4 drain
Q6_2pyro 4 drain
Q6_5pyro 4 drain
Q6_1pyro 4 drain
Q6_3Net-(Q6-G)
J19_1Net-(J19-Pin_1)
J12_1Net-(F2-Pad2)
J12_2pyro 2 drain
U10_2MAX M10S TX
U10_9MAX M10S reset
U10_6
U10_3MAX M10S RX
U10_4MAX M10S timepulse
U10_5MAX M10S int
U10_11Net-(D2-A2)
U10_13
U10_14Net-(U10-VCC_RF)
U10_15
U10_16
U10_17
U10_18MAX M10S boot
L4_1Net-(IC2-ANT)
L4_2Net-(D1-A2)
R40_2Net-(U9-PS1)
IC2_1SX1262 rf switch
IC2_3MOSI
IC2_4SCK
IC2_2MISO
IC2_6SX1262 CS
IC2_9Net-(IC2-ANT)
IC2_11SX1262 busy
IC2_12SX1262 int
R42_2Net-(U10-VCC_RF)
R42_1Net-(C43-Pad1)
L3_2Net-(C43-Pad1)
L3_1Net-(D2-A2)
R41_2Net-(U9-CLKSEL0)
C46_1Net-(U9-CAP)
R44_1Net-(U9-ENV_SDA)
D1_2Net-(D1-A2)
J22_1Net-(D2-A2)
C54_1Net-(D1-A2)
R43_2Net-(U9-ENV_SCL)
U8_6BMP581 CS
U8_5MISO
U8_4MOSI
U8_7
U8_2SCK
C52_1Net-(IC2-ANT)
C43_1Net-(C43-Pad1)
D2_2Net-(D2-A2)
U9_4Net-(U9-BOOT)
U9_11
U9_23Net-(U9-RESV_NC)
U9_7Net-(U9-RESV_NC)
U9_5Net-(U9-PS1)
U9_6BNO086 wake
U9_13Net-(U9-RESV_NC)
U9_8Net-(U9-RESV_NC)
U9_14BNO086 int
U9_16Net-(U9-ENV_SDA)
U9_17MOSI
U9_9Net-(U9-CAP)
U9_10Net-(U9-CLKSEL0)
U9_12Net-(U9-RESV_NC)
U9_18BNO086 CS
U9_21Net-(U9-RESV_NC)
U9_24Net-(U9-RESV_NC)
U9_1Net-(U9-RESV_NC)
U9_15Net-(U9-ENV_SCL)
U9_19SCK
U9_20MISO
U9_22Net-(U9-RESV_NC)
U9_27
IC3_13MOSI
IC3_8Net-(IC3-INT1)
IC3_14SCK
IC3_10
IC3_7ADXL375 CS
IC3_3
IC3_11Net-(IC3-RESERVED_2)
IC3_9Net-(IC3-INT2)
IC3_12MISO
R39_2Net-(U9-BOOT)
J23_1Net-(D1-A2)

14.5.3 Per-Pin Coverage Matrix

● = Detected ◐ = Partially detected - = Not tested | E = Electrical (ICT/flying probe) O = Optical (AOI) X = X-ray (AXI)

Pin ⇅Net ⇅E Opens ⇅E Shorts ⇅O Opens ⇅O Shorts ⇅X Opens ⇅X Shorts ⇅
J1_3SWDIO●◐----
J1_2GND-●----
J1_1SWCLK●◐----
C19_1+3.3V-●----
C19_2GND-●----
IC1_7QSPI_SD3------
IC1_4GND-●----
IC1_3QSPI_SD2------
IC1_8+3.3V●●----
IC1_1QSPI_SS------
IC1_6QSPI_SCLK------
IC1_5QSPI_SD0------
IC1_2QSPI_SD1------
C4_1Net-(U1-VREG_AVDD)------
C4_2GND●●----
C1_1+3.3V-●----
C1_2GND-●----
C11_1+3.3V-●----
C11_2GND-●----
R11_2Net-(U1-RUN)------
R11_1Net-(S2-NO_1)------
R5_2USB_DP------
R5_1MCU_DP------
C3_1+1.1V-●----
C3_2GND-●----
Y1_2GND-●----
Y1_4GND-●----
Y1_3Net-(C17-Pad2)------
Y1_1XIN------
U1_47motor in b------
U1_55pyro 3 continuity------
U1_58servo PWM 2------
U1_62GND●●----
U1_38SD DAT1------
U1_44SD DAT2------
U1_43SD DAT3------
U1_39SD DAT0------
U1_42SD CMD------
U1_45BTM9011EP CS------
U1_51+1.1V●●----
U1_10+1.1V●●----
U1_60+3.3V●●----
U1_49BTM9011EP IS------
U1_48------
U1_54pyro 2 continuity------
U1_40SD CLK------
U1_46motor in a------
U1_52power signal------
U1_50+3.3V●●----
U1_53pyro 1 continuity------
U1_56pyro 4 continuity------
U1_57servo PWM 1------
U1_61Net-(U1-VREG_AVDD)------
U1_17BNO086 CS------
U1_69+3.3V●●----
U1_16BMP581 CS------
U1_24+3.3V●●----
U1_12MAX M10S TX------
U1_19MOSI------
U1_8MAX M10S int------
U1_21BNO086 int------
U1_23SX1262 CS------
U1_68+3.3V●●----
U1_32+1.1V●●----
U1_2pyro 2 gate------
U1_5+3.3V●●----
U1_6------
U1_15+3.3V●●----
U1_14ADXL375 CS------
U1_4pyro 4 gate------
U1_1pyro 1 gate------
U1_3pyro 3 gate------
U1_7MAX M10S reset------
U1_9MAX M10S timepulse------
U1_11MAX M10S RX------
U1_76+3.3V●●----
U1_13MAX M10S boot------
U1_18SCK------
U1_20MISO------
U1_22BNO086 wake------
U1_27SX1262 int------
U1_29+3.3V●●----
U1_28SX1262 busy------
U1_30XIN------
U1_31XOUT------
U1_26SX1262 rf switch------
U1_25SX1262 reset●◐----
U1_33SWCLK●◐----
U1_34SWDIO●◐----
U1_35Net-(U1-RUN)------
U1_75QSPI_SS------
U1_59+3.3V●●----
U1_79pin out 2------
U1_71QSPI_SCLK------
U1_72QSPI_SD0------
U1_66MCU_DN------
U1_37LED controller------
U1_77servo PWM 3------
U1_41+3.3V●●----
U1_67MCU_DP------
U1_36------
U1_70QSPI_SD3------
U1_74QSPI_SD1------
U1_78servo PWM 4------
U1_63Net-(U1-VREG_LX)------
U1_73QSPI_SD2------
U1_80pin out 1------
U1_65+1.1V●●----
U1_81GND●●----
U1_64+3.3V●●----
C8_1+3.3V-●----
C8_2GND-●----
R3_2+3.3V●●----
R3_1Net-(U1-VREG_AVDD)------
C12_1+3.3V-●----
C12_2GND-●----
C13_1+3.3V-●----
C13_2GND-●----
R6_2Net-(C17-Pad2)------
R6_1XOUT------
C6_1+1.1V-●----
C6_2GND-●----
R4_2USB_DN------
R4_1MCU_DN------
C17_1GND●●----
C17_2Net-(C17-Pad2)------
S2_3GND-●----
S2_2------
S2_4GND-●----
S2_1Net-(S2-NO_1)------
R7_2Net-(S1-NO_2)------
R7_1QSPI_SS------
R12_2+3.3V●●----
R12_1QSPI_SS------
C14_1+3.3V-●----
C14_2GND-●----
C18_1+3.3V-●----
C18_2GND-●----
C7_1+3.3V-●----
C7_2GND-●----
C10_1+3.3V-●----
C10_2GND-●----
L1_1+1.1V●●----
L1_2Net-(U1-VREG_LX)------
C15_1+3.3V-●----
C15_2GND-●----
C16_1GND●●----
C16_2XIN------
C9_1+3.3V-●----
C9_2GND-●----
S1_3GND-●----
S1_2Net-(S1-NO_2)------
S1_4GND-●----
S1_1------
C2_1+1.1V-●----
C2_2GND-●----
C5_1+1.1V-●----
C5_2GND-●----
C36_1+3.3V-●----
C36_2GND-●----
D5_2Net-(D5-A)------
D5_1+5V-●----
LED4_2------
LED4_4Net-(LED3-DOUT)------
LED4_3GND-●----
LED4_1+5V-●----
R19_1Net-(J8-CC2)------
R19_2GND-●----
LED2_2Net-(LED2-DOUT)------
LED2_4Net-(LED1-DOUT)------
LED2_3GND-●----
LED2_1+5V-●----
J9_1pin out 1------
J9_2pin out 2------
C37_1+3.3V-●----
C37_2GND-●----
J10_8SD DAT1------
J10_6GND-●----
J10_4+3.3V-●----
J10_SH------
J10_2SD DAT3------
J10_3SD CMD------
J10_5SD CLK------
J10_1SD DAT2------
J10_7SD DAT0------
R18_1Net-(J8-CC1)------
R18_2GND-●----
J8_A1GND-●----
J8_A9Net-(D5-A)------
J8_A12GND-●----
J8_B4Net-(D5-A)------
J8_B9Net-(D5-A)------
J8_A4Net-(D5-A)------
J8_B6USB_DP------
J8_A8Net-(J8-SBU1)------
J8_B1GND-●----
J8_B12GND-●----
J8_SHGND-●----
J8_A6USB_DP------
J8_A5Net-(J8-CC1)------
J8_B5Net-(J8-CC2)------
J8_B7USB_DN------
J8_A7USB_DN------
J8_B8Net-(J8-SBU2)------
LED3_2Net-(LED3-DOUT)------
LED3_4Net-(LED2-DOUT)------
LED3_3GND-●----
LED3_1+5V-●----
LED1_2Net-(LED1-DOUT)------
LED1_4LED controller------
LED1_3GND-●----
LED1_1+5V-●----
R8_2gate------
R8_1+VBAT safe●●----
J7_1+3.3V-●----
J7_2GND-●----
CR1_1+12V-●----
CR1_2GND-●----
J2_1+VBAT-●----
J2_2GND-●----
C30_2+5V-●----
C30_1GND-●----
L2_2+5V●●----
L2_1Net-(U5-SW)------
R14_2Net-(R13-Pad1)------
R14_1Net-(U5-FB)------
R13_2+5V●●----
R13_1Net-(R13-Pad1)------
R25_2Net-(U5-BOOT)------
R25_1Net-(C28-Pad2)------
R16_2GND●●----
R16_1power signal------
C20_2+5V-●----
C20_1GND-●----
R24_2Net-(C29-Pad2)------
R24_1Net-(R13-Pad1)------
C25_2Net-(U5-SS)------
C25_1GND●●----
J6_1+5V-●----
J6_2GND-●----
U6_1+VBAT safe●●----
U6_3+VBAT safe●●----
U6_4gate------
U6_5+12V-●----
U6_6+12V-●----
U6_8+12V-●----
U6_2+VBAT safe●●----
U6_7+12V-●----
C28_2Net-(C28-Pad2)------
C28_1Net-(U5-SW)------
R15_2Net-(U5-FB)------
R15_1GND●●----
U11_1+VBAT safe-●----
U11_3+VBAT safe-●----
U11_4Net-(U11-G)------
U11_5+VBAT-●----
U11_6+VBAT-●----
U11_8+VBAT-●----
U11_2+VBAT safe-●----
U11_7+VBAT-●----
J5_1+12V-●----
J5_2GND-●----
U4_3+5V-●----
U4_1GND-●----
U4_2+3.3V-●----
U4_4+3.3V-●----
C29_2Net-(C29-Pad2)------
C29_1Net-(U5-FB)------
R23_2+5V●●----
R23_1Net-(U5-PG)------
C21_2+3.3V-●----
C21_1GND-●----
R10_2Net-(U5-MODE)------
R10_1GND●●----
C24_2+12V-●----
C24_1GND-●----
C22_2+12V-●----
C22_1GND-●----
J3_1gate------
J3_2GND-●----
C23_2+12V-●----
C23_1GND-●----
R9_2GND●●----
R9_1Net-(U11-G)------
S3_4------
S3_3------
S3_1GND-●----
S3_2gate------
S3_5------
S3_6------
U5_10Net-(U5-MODE)------
U5_9GND●●----
U5_5Net-(U5-SS)------
U5_3GND●●----
U5_6Net-(U5-SW)------
U5_7Net-(U5-BOOT)------
U5_4Net-(U5-PG)------
U5_8+12V-●----
U5_1power signal------
U5_2Net-(U5-FB)------
U5_13+12V-●----
U5_11+12V-●----
U5_12+12V-●----
C31_2+5V-●----
C31_1GND-●----
D4_1+12V-●----
D4_2power signal------
J4_1+12V-●----
J4_2+12V pyro-●----
R52_2GND●●----
R52_1Net-(Q6-G)------
J14_1Net-(F4-Pad2)------
J14_2pyro 4 drain------
J17_1motor in a------
J17_2motor in b------
R34_2GND●●----
R34_1pyro 4 continuity------
R29_2pyro 2 continuity------
R29_1pyro 2 drain------
R47_2Net-(Q5-G)------
R47_1pyro 3 gate------
R32_2GND●●----
R32_1pyro 3 continuity------
J18_3GND-●----
J18_2+5V-●----
J18_1Net-(J18-Pin_1)------
R27_2pyro 1 continuity------
R27_1pyro 1 drain------
Q4_4GND-●----
Q4_D1pyro 2 drain------
Q4_D2GND-●----
Q4_6pyro 2 drain------
Q4_2pyro 2 drain------
Q4_5pyro 2 drain------
Q4_1pyro 2 drain------
Q4_3Net-(Q4-G)------
R33_2pyro 4 continuity------
R33_1pyro 4 drain------
R30_2GND●●----
R30_1pyro 2 continuity------
R36_2Net-(J19-Pin_1)------
R36_1servo PWM 2------
R53_2GND●●----
R53_1Net-(Q7-G)------
C40_1BTM9011EP IS------
C40_2GND●●----
J11_1Net-(F1-Pad2)------
J11_2pyro 1 drain------
Q5_4GND-●----
Q5_D1pyro 3 drain------
Q5_D2GND-●----
Q5_6pyro 3 drain------
Q5_2pyro 3 drain------
Q5_5pyro 3 drain------
Q5_1pyro 3 drain------
Q5_3Net-(Q5-G)------
C39_1+12V-●----
C39_2GND-●----
R48_2Net-(Q6-G)------
R48_1pyro 4 gate------
J13_1Net-(F3-Pad2)------
J13_2pyro 3 drain------
R38_2Net-(J21-Pin_1)------
R38_1servo PWM 4------
U7_8motor out b--●---
U7_10BTM9011EP CS--●---
U7_15GND●●●---
U7_3GND●●●---
U7_4GND●●●---
U7_1motor out a--●---
U7_7motor out b--●---
U7_5GND●●●---
U7_11+12V-●●---
U7_6SCK--●---
U7_9MISO--●---
U7_12+12V-●●---
U7_2MOSI--●---
U7_13BTM9011EP IS--●---
U7_14motor out a--●---
F3_1+12V pyro-●----
F3_2Net-(F3-Pad2)------
R51_2GND●●----
R51_1Net-(Q5-G)------
R28_2GND●●----
R28_1pyro 1 continuity------
J15_1motor out a------
J15_2motor out b------
R50_2GND●●----
R50_1Net-(Q4-G)------
R35_2Net-(J18-Pin_1)------
R35_1servo PWM 1------
J21_3GND-●----
J21_2+5V-●----
J21_1Net-(J21-Pin_1)------
F4_1+12V pyro-●----
F4_2Net-(F4-Pad2)------
Q7_4GND-●----
Q7_D1pyro 1 drain------
Q7_D2GND-●----
Q7_6pyro 1 drain------
Q7_2pyro 1 drain------
Q7_5pyro 1 drain------
Q7_1pyro 1 drain------
Q7_3Net-(Q7-G)------
C38_1+12V-●----
C38_2GND-●----
F2_1+12V pyro-●----
F2_2Net-(F2-Pad2)------
F1_1+12V pyro-●----
F1_2Net-(F1-Pad2)------
C41_2GND-●----
C41_1+12V-●----
R37_2Net-(J20-Pin_1)------
R37_1servo PWM 3------
R22_2BTM9011EP IS------
R22_1GND●●----
R46_2Net-(Q4-G)------
R46_1pyro 2 gate------
J20_3GND-●----
J20_2+5V-●----
J20_1Net-(J20-Pin_1)------
R31_2pyro 3 continuity------
R31_1pyro 3 drain------
R49_2Net-(Q7-G)------
R49_1pyro 1 gate------
J16_1+5V-●----
J16_2GND-●----
Q6_4GND-●----
Q6_D1pyro 4 drain------
Q6_D2GND-●----
Q6_6pyro 4 drain------
Q6_2pyro 4 drain------
Q6_5pyro 4 drain------
Q6_1pyro 4 drain------
Q6_3Net-(Q6-G)------
J19_3GND-●----
J19_2+5V-●----
J19_1Net-(J19-Pin_1)------
J12_1Net-(F2-Pad2)------
J12_2pyro 2 drain------
C51_1+3.3V-●----
C51_2GND-●----
U10_8+3.3V-●----
U10_1GND●●----
U10_2MAX M10S TX------
U10_9MAX M10S reset------
U10_6------
U10_7+3.3V-●----
U10_3MAX M10S RX------
U10_4MAX M10S timepulse------
U10_10GND●●----
U10_5MAX M10S int------
U10_12GND●●----
U10_11Net-(D2-A2)------
U10_13------
U10_14Net-(U10-VCC_RF)------
U10_15------
U10_16------
U10_17------
U10_18MAX M10S boot------
L4_1Net-(IC2-ANT)------
L4_2Net-(D1-A2)------
C49_1+3.3V-●----
C49_2GND-●----
R40_2Net-(U9-PS1)------
R40_1+3.3V●●----
C48_1+3.3V-●----
C48_2GND-●----
IC2_1SX1262 rf switch------
IC2_3MOSI------
IC2_4SCK------
IC2_5SX1262 reset●◐----
IC2_2MISO------
IC2_6SX1262 CS------
IC2_8+3.3V-●----
IC2_10GND●●----
IC2_9Net-(IC2-ANT)------
IC2_7GND●●----
IC2_11SX1262 busy------
IC2_12SX1262 int------
R42_2Net-(U10-VCC_RF)------
R42_1Net-(C43-Pad1)------
C53_1+3.3V-●----
C53_2GND-●----
L3_2Net-(C43-Pad1)------
L3_1Net-(D2-A2)------
R41_2Net-(U9-CLKSEL0)------
R41_1+3.3V●●----
C46_1Net-(U9-CAP)------
C46_2GND●●----
R44_2+3.3V●●----
R44_1Net-(U9-ENV_SDA)------
D1_1GND-●----
D1_2Net-(D1-A2)------
J22_1Net-(D2-A2)------
J22_3_2GND-●----
J22_2_1GND-●----
J22_3_1GND-●----
J22_2_2GND-●----
C54_1Net-(D1-A2)------
C54_2GND●●----
C42_1+3.3V-●----
C42_2GND-●----
C44_1+3.3V-●----
C44_2GND-●----
R43_2Net-(U9-ENV_SCL)------
R43_1+3.3V●●----
U8_6BMP581 CS------
U8_10+3.3V-●----
U8_1+3.3V-●----
U8_3GND-●----
U8_5MISO------
U8_4MOSI------
U8_7------
U8_9GND-●----
U8_2SCK------
U8_8GND-●----
C52_1Net-(IC2-ANT)------
C52_2GND●●----
C43_1Net-(C43-Pad1)------
C43_2GND●●----
D2_1GND-●----
D2_2Net-(D2-A2)------
U9_4Net-(U9-BOOT)------
U9_11------
U9_26GND●●----
U9_23Net-(U9-RESV_NC)------
U9_7Net-(U9-RESV_NC)------
U9_5Net-(U9-PS1)------
U9_6BNO086 wake------
U9_13Net-(U9-RESV_NC)------
U9_8Net-(U9-RESV_NC)------
U9_14BNO086 int------
U9_16Net-(U9-ENV_SDA)------
U9_17MOSI------
U9_9Net-(U9-CAP)------
U9_10Net-(U9-CLKSEL0)------
U9_12Net-(U9-RESV_NC)------
U9_25GND●●----
U9_18BNO086 CS------
U9_21Net-(U9-RESV_NC)------
U9_24Net-(U9-RESV_NC)------
U9_1Net-(U9-RESV_NC)------
U9_2GND●●----
U9_15Net-(U9-ENV_SCL)------
U9_3+3.3V●●----
U9_19SCK------
U9_20MISO------
U9_22Net-(U9-RESV_NC)------
U9_27------
U9_28+3.3V●●----
IC3_13MOSI------
IC3_8Net-(IC3-INT1)------
IC3_14SCK------
IC3_5GND-●----
IC3_1+3.3V-●----
IC3_10------
IC3_7ADXL375 CS------
IC3_3------
IC3_6+3.3V-●----
IC3_11Net-(IC3-RESERVED_2)------
IC3_4GND-●----
IC3_2GND-●----
IC3_9Net-(IC3-INT2)------
IC3_12MISO------
C45_1+3.3V-●----
C45_2GND-●----
C47_1+3.3V-●----
C47_2GND-●----
C50_1+3.3V-●----
C50_2GND-●----
R39_2Net-(U9-BOOT)------
R39_1+3.3V●●----
J23_1Net-(D1-A2)------
J23_3_2GND-●----
J23_2_1GND-●----
J23_3_1GND-●----
J23_2_2GND-●----

14.6 PCOLA/SOQ Fault Coverage

PCOLA/SOQ scores how well the configured test methods cover each component and each connection. PCOLA evaluates five device-level properties: Presence, Correctness, Orientation, Live (functional), and Alignment. SOQ evaluates three connection-level properties: Shorts detection, Opens detection, and solder joint Quality. Scores are on a 0–100,000 scale where 100,000 means every property is fully covered. The Combined score is the average of PCOLA and SOQ.

14.6.1 Coverage by Test Method

P=Presence C=Correctness O=Orientation L=Live A=Alignment | S=Shorts O(pins)=Opens Q=Quality

PCOLA/SOQ coverage scores by test method. Scores: 0 (None), 0.5 (Partial), 1.0 (Full).
Test MethodPCOLASOpensSolder Quality
Electrical Test39.6%0.0%0.0%1.7%0.0%22.4%13.5%0.0%
Optical Inspection (AOI)0.6%0.6%0.6%0.0%0.3%0.0%1.3%1.3%
X-Ray Inspection (AXI)0.0%0.0%0.0%0.0%0.0%0.0%0.0%0.0%
Combined39.9%0.6%0.6%1.7%0.3%22.4%14.4%1.3%

14.6.2 PCB Device/Pin Count

Devices (PCOLA): 154
Pins (SOQ): 578

14.6.3 Board-Level Scores

Board-Level Coverage (0 – 100,000 scale)
DimensionScoreCoverage
PCOLA8657 / 100,0008.7%
SOQ12716 / 100,00012.7%
Combined10686 / 100,00010.7%
Electrical vs Inspection
SourcePCOLA ScoreSOQ Score
Electrical Test8267 / 100,00011967 / 100,000
Optical/X-ray Inspection455 / 100,000865 / 100,000
Combined (max)8657 / 100,00012716 / 100,000

14.6.4 PCOLA (154 devices)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0) — = N/A (excluded)
* Footprint not IPC-7351B/7251 compliant — no inspection coverage scored

Score ⇅RefDes ⇅Type / Footprint ⇅Class ⇅P ⇅C ⇅O ⇅L ⇅A ⇅Method ⇅
70%U7BTM9011EP / SOP65P600X115-15NIC●●●○◐AOI, Powered_Off
20%U1RP2350B / QFN-80-1EP_10x10mm_P0.4mm_EP3.4x3.4mm_ThermalVias *IC◐○○◐○LSSI, Powered_Off
10%J1JST / PinHeader_1x03_P2.54mm_Vertical_SMD_Pin1Right *Connector◐○○—○Powered_Off
10%C194.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%IC1AT25SF128A-SHB-T / IC8_AT25SF128A-SHB-T_ADO-L *IC◐○○○○Powered_Off
10%C44.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C14.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C110.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C520 / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C4310nF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C34.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%Y1ABM8-272-T3 / XTAL_ABM8-272-T3 *Other◐○○○○Powered_Off
10%C80.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R333 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C120.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C130.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%D2D_TVS / D_0603_1608Metric_Pad1.05x0.95mm_HandSolder *Diode◐○○○○Powered_Off
10%C60.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%U9BNO086 / IC_BNO086 *IC◐○○○○Powered_Off
10%C1715pF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%S2PTS647SM38SMTR2_LFS / PTS647SM38SMTR2LFS *Switch◐○○○○Powered_Off
10%IC3ADXL375BCCZ-RL / LGA_CC-14-1_ADI-L *IC◐○○○○Powered_Off
10%R1210k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C140.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C180.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C70.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C100.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%L13.3uH / IND_TAIYO_NRS4018_TAY *Inductor◐○○—○Powered_Off
10%C150.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C1615pF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C90.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%S1PTS647SM38SMTR2_LFS / PTS647SM38SMTR2LFS *Switch◐○○○○Powered_Off
10%C24.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C50.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C364.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%D5D_Schottky / D_SOD-123 *Diode◐○○○○Powered_Off
10%LED4COM-16347 / COM-16347_SPK-L *LED◐○○○○Powered_Off
10%R195.1k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%LED2COM-16347 / COM-16347_SPK-L *LED◐○○○○Powered_Off
10%C450.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C370.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%J10Micro_SD_Card / microSD_HC_Molex_47219-2001 *Connector◐○○—○Powered_Off
10%R185.1k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%J8USB_C_Receptacle_USB2.0_16P / USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal *Connector◐○○—○Powered_Off
10%LED3COM-16347 / COM-16347_SPK-L *LED◐○○○○Powered_Off
10%LED1COM-16347 / COM-16347_SPK-L *LED◐○○○○Powered_Off
10%R8100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%J73.3V out / 5452257 *Connector◐○○—○Powered_Off
10%CR1SMBJ15A / DO-214AASMB_J-BEND_LTF-L *Diode◐○○○○Powered_Off
10%J2battery in / 5452257 *Connector◐○○—○Powered_Off
10%C3022uF / C_1210_3225Metric_Pad1.33x2.70mm_HandSolder *Capacitor◐○○—○Powered_Off
10%L23.3uH / L_Wurth_WE-XHMI-6030 *Inductor◐○○—○Powered_Off
10%C470.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R1349.9 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C504.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R16100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C2010uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R3910k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C2547nF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%J65V out / 5452257 *Connector◐○○—○Powered_Off
10%U6SISS65DN-T1-GE3 / POWERPAK-1212-8S_VIS *IC◐○○○○Powered_Off
10%J23SMA-J-P-H-ST-EM1 / SAMTEC_SMA-J-P-H-ST-EM1 *Connector◐○○—○Powered_Off
10%R1510k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%U11SISS65DN-T1-GE3 / POWERPAK-1212-8S_VIS *IC◐○○○○Powered_Off
10%J512V out / 5452257 *Connector◐○○—○Powered_Off
10%U4AZ1117CH-3.3TRG1 / SOT-223_DIO-L *IC◐○○○○Powered_Off
10%R23100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C2110uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R1052.3k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C240.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C2210uF / C_1210_3225Metric_Pad1.33x2.70mm_HandSolder *Capacitor◐○○—○Powered_Off
10%J3battery sw / 5452257 *Connector◐○○—○Powered_Off
10%C2310uF / C_1210_3225Metric_Pad1.33x2.70mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R9100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%S3JS202011SCQN / JS202011SCQN *Switch◐○○○○Powered_Off
10%U5TPS56A37RPAR / TPS56A37RPAR *IC◐○○○○Powered_Off
10%C3122uF / C_1210_3225Metric_Pad1.33x2.70mm_HandSolder *Capacitor◐○○—○Powered_Off
10%D48.7V / D_SOD-123 *Diode◐○○○○Powered_Off
10%J4pyro sw / 5452257 *Connector◐○○—○Powered_Off
10%R52100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%R3427k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%R3227k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%J18servo 1 / PinHeader_1x03_P2.54mm_Vertical *Connector◐○○—○Powered_Off
10%Q4SIA440DJ-T1-GE3 / SIA440DJT1GE3 *Transistor◐○○○○Powered_Off
10%R3027k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%R53100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C401nF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%Q5SIA440DJ-T1-GE3 / SIA440DJT1GE3 *Transistor◐○○○○Powered_Off
10%C390.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%F3Fuse / Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolder *Fuse◐○○—○Powered_Off
10%R51100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%R2827k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%R50100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%J21servo 4 / PinHeader_1x03_P2.54mm_Vertical *Connector◐○○—○Powered_Off
10%F4Fuse / Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolder *Fuse◐○○—○Powered_Off
10%Q7SIA440DJ-T1-GE3 / SIA440DJT1GE3 *Transistor◐○○○○Powered_Off
10%C380.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%F2Fuse / Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolder *Fuse◐○○—○Powered_Off
10%F1Fuse / Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolder *Fuse◐○○—○Powered_Off
10%C41220uF / CAPMP7343X310N *Capacitor◐○○—○Powered_Off
10%R22820 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%J20servo 3 / PinHeader_1x03_P2.54mm_Vertical *Connector◐○○—○Powered_Off
10%J165V out / 5452257 *Connector◐○○—○Powered_Off
10%Q6SIA440DJ-T1-GE3 / SIA440DJT1GE3 *Transistor◐○○○○Powered_Off
10%J19servo 2 / PinHeader_1x03_P2.54mm_Vertical *Connector◐○○—○Powered_Off
10%C510.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%U10MAX-M10S-00B / XCVR_MAX-M10S-00B *IC◐○○○○Powered_Off
10%C494.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R4010k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C480.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%IC2114993390 / 114993390 *IC◐○○○○Powered_Off
10%C530.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R4110k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%C460.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R4410k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%D1D_TVS / D_0603_1608Metric_Pad1.05x0.95mm_HandSolder *Diode◐○○○○Powered_Off
10%J22SMA-J-P-H-ST-EM1 / SAMTEC_SMA-J-P-H-ST-EM1 *Connector◐○○—○Powered_Off
10%C540 / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C420.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%C444.7uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor◐○○—○Powered_Off
10%R4310k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor◐○○—○Powered_Off
10%U8BMP581 / QFN10_BMP581_BOS-L *IC◐○○○○Powered_Off
0%R111k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R527 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R61k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R427 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R71k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%J9GPIO / 5452257 *Connector○○○—○
0%R1473.2k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R250 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R240 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%C280.1uF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor○○○—○
0%R481k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%L327nH / L_0603_1608Metric_Pad1.05x0.95mm_HandSolder *Inductor○○○—○
0%J13pyro 3 / 5452257 *Connector○○○—○
0%R381k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R371k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%C29150pF / C_0603_1608Metric_Pad1.08x0.95mm_HandSolder *Capacitor○○○—○
0%R461k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R33100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R31100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R491k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R471k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R361k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%J15motor out / 5452257 *Connector○○○—○
0%J12pyro 2 / 5452257 *Connector○○○—○
0%J17motor in / 5452257 *Connector○○○—○
0%R351k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%L40 / L_0603_1608Metric_Pad1.05x0.95mm_HandSolder *Inductor○○○—○
0%J14pyro 4 / 5452257 *Connector○○○—○
0%J11pyro 1 / 5452257 *Connector○○○—○
0%R27100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R29100k / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○
0%R4210 / R_0603_1608Metric_Pad0.98x0.95mm_HandSolder *Resistor○○○—○

14.6.5 SOQ (578 pins)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0)

Score ⇅Pin ⇅Net ⇅S ⇅O ⇅Q ⇅
67%U7_15GND◐●◐
67%U7_3GND◐●◐
67%U7_4GND◐●◐
67%U7_5GND◐●◐
50%U1_34SWDIO◐●○
50%R13_2+5V◐●○
50%U1_65+1.1V◐●○
50%R9_2GND◐●○
50%IC1_8+3.3V◐●○
50%R10_1GND◐●○
50%C16_1GND◐●○
50%R23_2+5V◐●○
50%U1_81GND◐●○
50%U1_50+3.3V◐●○
50%C4_2GND◐●○
50%U1_76+3.3V◐●○
50%C25_1GND◐●○
50%U1_59+3.3V◐●○
50%U1_64+3.3V◐●○
50%R12_2+3.3V◐●○
50%U1_69+3.3V◐●○
50%R15_1GND◐●○
50%R16_2GND◐●○
50%U1_24+3.3V◐●○
50%C17_1GND◐●○
50%U1_29+3.3V◐●○
50%U6_1+VBAT safe◐●○
50%U6_3+VBAT safe◐●○
50%R3_2+3.3V◐●○
50%U1_68+3.3V◐●○
50%U1_32+1.1V◐●○
50%R8_1+VBAT safe◐●○
50%U1_62GND◐●○
50%U1_5+3.3V◐●○
50%L2_2+5V◐●○
50%U1_15+3.3V◐●○
50%U1_41+3.3V◐●○
50%U6_2+VBAT safe◐●○
50%U1_25SX1262 reset◐●○
50%U1_51+1.1V◐●○
50%U1_10+1.1V◐●○
50%L1_1+1.1V◐●○
50%U5_9GND◐●○
50%U5_3GND◐●○
50%R52_2GND◐●○
50%R34_2GND◐●○
50%R32_2GND◐●○
50%R30_2GND◐●○
50%R53_2GND◐●○
50%C40_2GND◐●○
50%J1_3SWDIO◐●○
50%U1_60+3.3V◐●○
50%J1_1SWCLK◐●○
50%U1_33SWCLK◐●○
50%U7_11+12V◐◐◐
50%U7_12+12V◐◐◐
50%R51_2GND◐●○
50%R28_2GND◐●○
50%R50_2GND◐●○
50%R22_1GND◐●○
50%C54_2GND◐●○
50%U10_1GND◐●○
50%U10_10GND◐●○
50%U10_12GND◐●○
50%R40_1+3.3V◐●○
50%IC2_5SX1262 reset◐●○
50%IC2_10GND◐●○
50%IC2_7GND◐●○
50%R41_1+3.3V◐●○
50%C46_2GND◐●○
50%R44_2+3.3V◐●○
50%R43_1+3.3V◐●○
50%C52_2GND◐●○
50%C43_2GND◐●○
50%U9_26GND◐●○
50%U9_25GND◐●○
50%U9_2GND◐●○
50%U9_3+3.3V◐●○
50%U9_28+3.3V◐●○
50%R39_1+3.3V◐●○
33%U7_2MOSI○◐◐
33%U7_13BTM9011EP IS○◐◐
33%U7_14motor out a○◐◐
33%U7_7motor out b○◐◐
33%U7_10BTM9011EP CS○◐◐
33%U7_8motor out b○◐◐
33%U7_6SCK○◐◐
33%U7_9MISO○◐◐
33%U7_1motor out a○◐◐
17%U6_7+12V◐○○
17%J8_A12GND◐○○
17%C24_1GND◐○○
17%C22_2+12V◐○○
17%C22_1GND◐○○
17%U11_1+VBAT safe◐○○
17%J8_B1GND◐○○
17%J8_B12GND◐○○
17%J8_SHGND◐○○
17%U11_3+VBAT safe◐○○
17%S3_1GND◐○○
17%U11_5+VBAT◐○○
17%U11_6+VBAT◐○○
17%U11_8+VBAT◐○○
17%U11_2+VBAT safe◐○○
17%U11_7+VBAT◐○○
17%J5_1+12V◐○○
17%LED3_3GND◐○○
17%LED3_1+5V◐○○
17%J5_2GND◐○○
17%U4_3+5V◐○○
17%LED1_3GND◐○○
17%LED1_1+5V◐○○
17%U4_1GND◐○○
17%J7_1+3.3V◐○○
17%C8_1+3.3V◐○○
17%C8_2GND◐○○
17%J7_2GND◐○○
17%C12_1+3.3V◐○○
17%C12_2GND◐○○
17%C13_1+3.3V◐○○
17%C13_2GND◐○○
17%CR1_1+12V◐○○
17%CR1_2GND◐○○
17%C6_1+1.1V◐○○
17%C6_2GND◐○○
17%J2_1+VBAT◐○○
17%J2_2GND◐○○
17%C30_2+5V◐○○
17%S2_3GND◐○○
17%C30_1GND◐○○
17%S2_4GND◐○○
17%U4_2+3.3V◐○○
17%U4_4+3.3V◐○○
17%J3_2GND◐○○
17%C14_1+3.3V◐○○
17%C14_2GND◐○○
17%C18_1+3.3V◐○○
17%C18_2GND◐○○
17%C7_1+3.3V◐○○
17%C7_2GND◐○○
17%C10_1+3.3V◐○○
17%C10_2GND◐○○
17%J1_2GND◐○○
17%C19_1+3.3V◐○○
17%C19_2GND◐○○
17%U5_8+12V◐○○
17%U5_13+12V◐○○
17%U5_11+12V◐○○
17%U5_12+12V◐○○
17%C31_2+5V◐○○
17%C31_1GND◐○○
17%D4_1+12V◐○○
17%J4_1+12V◐○○
17%J4_2+12V pyro◐○○
17%IC1_4GND◐○○
17%C23_2+12V◐○○
17%C15_2GND◐○○
17%J18_3GND◐○○
17%J18_2+5V◐○○
17%Q4_4GND◐○○
17%Q4_D2GND◐○○
17%C9_1+3.3V◐○○
17%C9_2GND◐○○
17%C1_1+3.3V◐○○
17%Q5_4GND◐○○
17%Q5_D2GND◐○○
17%C39_1+12V◐○○
17%C39_2GND◐○○
17%C1_2GND◐○○
17%C11_1+3.3V◐○○
17%C11_2GND◐○○
17%S1_3GND◐○○
17%C23_1GND◐○○
17%S1_4GND◐○○
17%C3_1+1.1V◐○○
17%C3_2GND◐○○
17%Y1_2GND◐○○
17%Y1_4GND◐○○
17%C2_1+1.1V◐○○
17%C2_2GND◐○○
17%C5_1+1.1V◐○○
17%C5_2GND◐○○
17%C36_1+3.3V◐○○
17%F3_1+12V pyro◐○○
17%C36_2GND◐○○
17%C21_2+3.3V◐○○
17%D5_1+5V◐○○
17%J21_3GND◐○○
17%J21_2+5V◐○○
17%F4_1+12V pyro◐○○
17%Q7_4GND◐○○
17%Q7_D2GND◐○○
17%C38_1+12V◐○○
17%C38_2GND◐○○
17%F2_1+12V pyro◐○○
17%F1_1+12V pyro◐○○
17%C41_2GND◐○○
17%C41_1+12V◐○○
17%C20_2+5V◐○○
17%J20_3GND◐○○
17%J20_2+5V◐○○
17%C20_1GND◐○○
17%J16_2GND◐○○
17%Q6_4GND◐○○
17%Q6_D2GND◐○○
17%J23_2_2GND◐○○
17%J19_3GND◐○○
17%J19_2+5V◐○○
17%C51_1+3.3V◐○○
17%C51_2GND◐○○
17%U10_8+3.3V◐○○
17%LED4_3GND◐○○
17%U10_7+3.3V◐○○
17%LED4_1+5V◐○○
17%C21_1GND◐○○
17%C49_1+3.3V◐○○
17%C49_2GND◐○○
17%R19_2GND◐○○
17%C48_1+3.3V◐○○
17%C48_2GND◐○○
17%LED2_3GND◐○○
17%IC2_8+3.3V◐○○
17%LED2_1+5V◐○○
17%J6_1+5V◐○○
17%C53_1+3.3V◐○○
17%C53_2GND◐○○
17%C37_1+3.3V◐○○
17%C37_2GND◐○○
17%J6_2GND◐○○
17%D1_1GND◐○○
17%J22_3_2GND◐○○
17%J22_2_1GND◐○○
17%J22_3_1GND◐○○
17%J22_2_2GND◐○○
17%J16_1+5V◐○○
17%C42_1+3.3V◐○○
17%C42_2GND◐○○
17%C44_1+3.3V◐○○
17%C44_2GND◐○○
17%J10_6GND◐○○
17%U8_10+3.3V◐○○
17%U8_1+3.3V◐○○
17%U8_3GND◐○○
17%U8_9GND◐○○
17%U8_8GND◐○○
17%J10_4+3.3V◐○○
17%C24_2+12V◐○○
17%D2_1GND◐○○
17%U6_5+12V◐○○
17%U6_6+12V◐○○
17%U6_8+12V◐○○
17%R18_2GND◐○○
17%J8_A1GND◐○○
17%IC3_5GND◐○○
17%IC3_1+3.3V◐○○
17%IC3_6+3.3V◐○○
17%IC3_4GND◐○○
17%IC3_2GND◐○○
17%C45_1+3.3V◐○○
17%C45_2GND◐○○
17%C47_1+3.3V◐○○
17%C47_2GND◐○○
17%C50_1+3.3V◐○○
17%C50_2GND◐○○
17%C15_1+3.3V◐○○
17%J23_3_2GND◐○○
17%J23_2_1GND◐○○
17%J23_3_1GND◐○○
0%R25_2Net-(U5-BOOT)○○○
0%R25_1Net-(C28-Pad2)○○○
0%R16_1power signal○○○
0%R24_2Net-(C29-Pad2)○○○
0%R24_1Net-(R13-Pad1)○○○
0%C25_2Net-(U5-SS)○○○
0%U6_4gate○○○
0%C28_2Net-(C28-Pad2)○○○
0%C28_1Net-(U5-SW)○○○
0%R15_2Net-(U5-FB)○○○
0%U11_4Net-(U11-G)○○○
0%C29_2Net-(C29-Pad2)○○○
0%C29_1Net-(U5-FB)○○○
0%R23_1Net-(U5-PG)○○○
0%R10_2Net-(U5-MODE)○○○
0%J3_1gate○○○
0%R9_1Net-(U11-G)○○○
0%S3_4○○○
0%S3_3○○○
0%S3_2gate○○○
0%S3_5○○○
0%S3_6○○○
0%U5_10Net-(U5-MODE)○○○
0%IC1_7QSPI_SD3○○○
0%U5_5Net-(U5-SS)○○○
0%IC1_3QSPI_SD2○○○
0%U5_6Net-(U5-SW)○○○
0%U5_7Net-(U5-BOOT)○○○
0%U5_4Net-(U5-PG)○○○
0%IC1_1QSPI_SS○○○
0%U5_1power signal○○○
0%U5_2Net-(U5-FB)○○○
0%IC1_6QSPI_SCLK○○○
0%IC1_5QSPI_SD0○○○
0%IC1_2QSPI_SD1○○○
0%C4_1Net-(U1-VREG_AVDD)○○○
0%R11_2Net-(U1-RUN)○○○
0%R11_1Net-(S2-NO_1)○○○
0%D4_2power signal○○○
0%R5_2USB_DP○○○
0%R5_1MCU_DP○○○
0%Y1_3Net-(C17-Pad2)○○○
0%R52_1Net-(Q6-G)○○○
0%J14_1Net-(F4-Pad2)○○○
0%J14_2pyro 4 drain○○○
0%J17_1motor in a○○○
0%J17_2motor in b○○○
0%Y1_1XIN○○○
0%R34_1pyro 4 continuity○○○
0%R29_2pyro 2 continuity○○○
0%R29_1pyro 2 drain○○○
0%R47_2Net-(Q5-G)○○○
0%R47_1pyro 3 gate○○○
0%U1_47motor in b○○○
0%R32_1pyro 3 continuity○○○
0%U1_55pyro 3 continuity○○○
0%U1_58servo PWM 2○○○
0%J18_1Net-(J18-Pin_1)○○○
0%R27_2pyro 1 continuity○○○
0%R27_1pyro 1 drain○○○
0%U1_38SD DAT1○○○
0%Q4_D1pyro 2 drain○○○
0%U1_44SD DAT2○○○
0%Q4_6pyro 2 drain○○○
0%Q4_2pyro 2 drain○○○
0%Q4_5pyro 2 drain○○○
0%Q4_1pyro 2 drain○○○
0%Q4_3Net-(Q4-G)○○○
0%R33_2pyro 4 continuity○○○
0%R33_1pyro 4 drain○○○
0%U1_43SD DAT3○○○
0%R30_1pyro 2 continuity○○○
0%R36_2Net-(J19-Pin_1)○○○
0%R36_1servo PWM 2○○○
0%U1_39SD DAT0○○○
0%R53_1Net-(Q7-G)○○○
0%C40_1BTM9011EP IS○○○
0%U1_42SD CMD○○○
0%J11_1Net-(F1-Pad2)○○○
0%J11_2pyro 1 drain○○○
0%U1_45BTM9011EP CS○○○
0%Q5_D1pyro 3 drain○○○
0%U1_49BTM9011EP IS○○○
0%Q5_6pyro 3 drain○○○
0%Q5_2pyro 3 drain○○○
0%Q5_5pyro 3 drain○○○
0%Q5_1pyro 3 drain○○○
0%Q5_3Net-(Q5-G)○○○
0%U1_48○○○
0%U1_54pyro 2 continuity○○○
0%R48_2Net-(Q6-G)○○○
0%R48_1pyro 4 gate○○○
0%J13_1Net-(F3-Pad2)○○○
0%J13_2pyro 3 drain○○○
0%R38_2Net-(J21-Pin_1)○○○
0%R38_1servo PWM 4○○○
0%U1_40SD CLK○○○
0%U1_46motor in a○○○
0%U1_52power signal○○○
0%U1_53pyro 1 continuity○○○
0%U1_56pyro 4 continuity○○○
0%U1_57servo PWM 1○○○
0%U1_61Net-(U1-VREG_AVDD)○○○
0%U1_17BNO086 CS○○○
0%U1_16BMP581 CS○○○
0%U1_12MAX M10S TX○○○
0%U1_19MOSI○○○
0%U1_8MAX M10S int○○○
0%U1_21BNO086 int○○○
0%U1_23SX1262 CS○○○
0%U1_2pyro 2 gate○○○
0%U1_6○○○
0%F3_2Net-(F3-Pad2)○○○
0%U1_14ADXL375 CS○○○
0%R51_1Net-(Q5-G)○○○
0%U1_4pyro 4 gate○○○
0%R28_1pyro 1 continuity○○○
0%J15_1motor out a○○○
0%J15_2motor out b○○○
0%U1_1pyro 1 gate○○○
0%R50_1Net-(Q4-G)○○○
0%R35_2Net-(J18-Pin_1)○○○
0%R35_1servo PWM 1○○○
0%U1_3pyro 3 gate○○○
0%U1_9MAX M10S timepulse○○○
0%J21_1Net-(J21-Pin_1)○○○
0%U1_11MAX M10S RX○○○
0%F4_2Net-(F4-Pad2)○○○
0%U1_13MAX M10S boot○○○
0%Q7_D1pyro 1 drain○○○
0%U1_18SCK○○○
0%Q7_6pyro 1 drain○○○
0%Q7_2pyro 1 drain○○○
0%Q7_5pyro 1 drain○○○
0%Q7_1pyro 1 drain○○○
0%Q7_3Net-(Q7-G)○○○
0%U1_20MISO○○○
0%U1_22BNO086 wake○○○
0%U1_27SX1262 int○○○
0%F2_2Net-(F2-Pad2)○○○
0%U1_28SX1262 busy○○○
0%F1_2Net-(F1-Pad2)○○○
0%U1_30XIN○○○
0%U1_31XOUT○○○
0%R37_2Net-(J20-Pin_1)○○○
0%R37_1servo PWM 3○○○
0%R22_2BTM9011EP IS○○○
0%U1_26SX1262 rf switch○○○
0%R46_2Net-(Q4-G)○○○
0%R46_1pyro 2 gate○○○
0%U1_35Net-(U1-RUN)○○○
0%U1_75QSPI_SS○○○
0%J20_1Net-(J20-Pin_1)○○○
0%R31_2pyro 3 continuity○○○
0%R31_1pyro 3 drain○○○
0%R49_2Net-(Q7-G)○○○
0%R49_1pyro 1 gate○○○
0%U1_79pin out 2○○○
0%U1_71QSPI_SCLK○○○
0%U1_72QSPI_SD0○○○
0%Q6_D1pyro 4 drain○○○
0%U1_66MCU_DN○○○
0%Q6_6pyro 4 drain○○○
0%Q6_2pyro 4 drain○○○
0%Q6_5pyro 4 drain○○○
0%U1_37LED controller○○○
0%Q6_3Net-(Q6-G)○○○
0%U1_77servo PWM 3○○○
0%U1_67MCU_DP○○○
0%J19_1Net-(J19-Pin_1)○○○
0%J12_1Net-(F2-Pad2)○○○
0%J12_2pyro 2 drain○○○
0%U1_36○○○
0%U1_70QSPI_SD3○○○
0%U1_74QSPI_SD1○○○
0%U1_78servo PWM 4○○○
0%U10_2MAX M10S TX○○○
0%U10_9MAX M10S reset○○○
0%U10_6○○○
0%U1_63Net-(U1-VREG_LX)○○○
0%U10_3MAX M10S RX○○○
0%U10_4MAX M10S timepulse○○○
0%U1_73QSPI_SD2○○○
0%U10_5MAX M10S int○○○
0%U1_80pin out 1○○○
0%U10_11Net-(D2-A2)○○○
0%U10_13○○○
0%U10_14Net-(U10-VCC_RF)○○○
0%U10_15○○○
0%U10_16○○○
0%U10_17○○○
0%U10_18MAX M10S boot○○○
0%L4_1Net-(IC2-ANT)○○○
0%L4_2Net-(D1-A2)○○○
0%R3_1Net-(U1-VREG_AVDD)○○○
0%R6_2Net-(C17-Pad2)○○○
0%R40_2Net-(U9-PS1)○○○
0%R6_1XOUT○○○
0%R4_2USB_DN○○○
0%R4_1MCU_DN○○○
0%IC2_1SX1262 rf switch○○○
0%IC2_3MOSI○○○
0%IC2_4SCK○○○
0%C17_2Net-(C17-Pad2)○○○
0%IC2_2MISO○○○
0%IC2_6SX1262 CS○○○
0%S2_2○○○
0%S2_1Net-(S2-NO_1)○○○
0%IC2_9Net-(IC2-ANT)○○○
0%R7_2Net-(S1-NO_2)○○○
0%IC2_11SX1262 busy○○○
0%IC2_12SX1262 int○○○
0%R42_2Net-(U10-VCC_RF)○○○
0%R42_1Net-(C43-Pad1)○○○
0%R7_1QSPI_SS○○○
0%R12_1QSPI_SS○○○
0%L3_2Net-(C43-Pad1)○○○
0%L3_1Net-(D2-A2)○○○
0%R41_2Net-(U9-CLKSEL0)○○○
0%L1_2Net-(U1-VREG_LX)○○○
0%C46_1Net-(U9-CAP)○○○
0%U1_7MAX M10S reset○○○
0%C16_2XIN○○○
0%R44_1Net-(U9-ENV_SDA)○○○
0%S1_2Net-(S1-NO_2)○○○
0%D1_2Net-(D1-A2)○○○
0%J22_1Net-(D2-A2)○○○
0%S1_1○○○
0%D5_2Net-(D5-A)○○○
0%LED4_2○○○
0%LED4_4Net-(LED3-DOUT)○○○
0%C54_1Net-(D1-A2)○○○
0%R19_1Net-(J8-CC2)○○○
0%LED2_2Net-(LED2-DOUT)○○○
0%LED2_4Net-(LED1-DOUT)○○○
0%J9_1pin out 1○○○
0%J9_2pin out 2○○○
0%Q6_1pyro 4 drain○○○
0%J10_8SD DAT1○○○
0%U8_6BMP581 CS○○○
0%J10_SH○○○
0%J10_2SD DAT3○○○
0%J10_3SD CMD○○○
0%U8_5MISO○○○
0%U8_4MOSI○○○
0%U8_7○○○
0%J10_5SD CLK○○○
0%U8_2SCK○○○
0%J10_1SD DAT2○○○
0%C52_1Net-(IC2-ANT)○○○
0%J10_7SD DAT0○○○
0%C43_1Net-(C43-Pad1)○○○
0%R18_1Net-(J8-CC1)○○○
0%J8_A9Net-(D5-A)○○○
0%D2_2Net-(D2-A2)○○○
0%U9_4Net-(U9-BOOT)○○○
0%U9_11○○○
0%J8_B4Net-(D5-A)○○○
0%U9_23Net-(U9-RESV_NC)○○○
0%U9_7Net-(U9-RESV_NC)○○○
0%U9_5Net-(U9-PS1)○○○
0%U9_6BNO086 wake○○○
0%U9_13Net-(U9-RESV_NC)○○○
0%U9_8Net-(U9-RESV_NC)○○○
0%U9_14BNO086 int○○○
0%U9_16Net-(U9-ENV_SDA)○○○
0%U9_17MOSI○○○
0%U9_9Net-(U9-CAP)○○○
0%U9_10Net-(U9-CLKSEL0)○○○
0%U9_12Net-(U9-RESV_NC)○○○
0%J8_B9Net-(D5-A)○○○
0%U9_18BNO086 CS○○○
0%U9_21Net-(U9-RESV_NC)○○○
0%U9_24Net-(U9-RESV_NC)○○○
0%U9_1Net-(U9-RESV_NC)○○○
0%J8_A4Net-(D5-A)○○○
0%U9_15Net-(U9-ENV_SCL)○○○
0%J8_B6USB_DP○○○
0%U9_19SCK○○○
0%U9_20MISO○○○
0%U9_22Net-(U9-RESV_NC)○○○
0%U9_27○○○
0%J8_A8Net-(J8-SBU1)○○○
0%IC3_13MOSI○○○
0%IC3_8Net-(IC3-INT1)○○○
0%IC3_14SCK○○○
0%J8_A6USB_DP○○○
0%J8_A5Net-(J8-CC1)○○○
0%IC3_10○○○
0%IC3_7ADXL375 CS○○○
0%IC3_3○○○
0%J8_B5Net-(J8-CC2)○○○
0%IC3_11Net-(IC3-RESERVED_2)○○○
0%J8_B7USB_DN○○○
0%J8_A7USB_DN○○○
0%IC3_9Net-(IC3-INT2)○○○
0%IC3_12MISO○○○
0%J8_B8Net-(J8-SBU2)○○○
0%LED3_2Net-(LED3-DOUT)○○○
0%LED3_4Net-(LED2-DOUT)○○○
0%LED1_2Net-(LED1-DOUT)○○○
0%LED1_4LED controller○○○
0%R8_2gate○○○
0%R39_2Net-(U9-BOOT)○○○
0%L2_1Net-(U5-SW)○○○
0%J23_1Net-(D1-A2)○○○
0%R14_2Net-(R13-Pad1)○○○
0%R14_1Net-(U5-FB)○○○
0%R13_1Net-(R13-Pad1)○○○
0%R43_2Net-(U9-ENV_SCL)○○○

14.6.6 Scoring Matrix

PCOLA/SOQ scoring premises used for this analysis. Each cell shows the score assigned when a test method applies to a component or pin.

MethodPCOLASOpensQ
AOIFullFullFull—PartialPartialPartialPartial
AXI————PartialPartialPartialPartial
JTAG/BSCANFullFullFullPartial—FullFull—
BSCAN_PassivesFullFullFullFull—FullFull—
I2CPartialPartial—Partial—PartialPartial—
SPIPartialPartial—Partial—PartialPartial—
UART———Partial————
Passive_MeasFullFullFullFull—FullFull—
Powered_OffPartial————PartialFull—

15 Component Properties

Schematic symbol and library model quality analysis.

15.1 Library Model Grades

Grading schematic library model quality based on pin electrical type definitions:

Grade Definitions
GradeRatingDescription
AExcellentHas Power pins AND properly typed I/O pins (>=90% typed)
BGood>=70% typed OR (>=50% typed AND has Power)
CFairMix of typed and Passive pins (>=40% typed)
DPoorMostly Passive with few typed pins (>=10% typed)
FFailAll pins Passive/Unknown (<10% typed, no ERC)
IC Library Model Grades (sorted worst to best)
RefDesGrdPinsPwrInOutIOOCOEHiZPasPart NumberCreator
IC1F800000008AT25SF128A-SHB-T
IC2F12000000012114993390
IC3F14010000013ADXL375BCCZ-RL
U1C8110335500010RP2350B
U11C808000000SISS65DN-T1-GE3
U4C402110000AZ1117CH-3.3TRG1
U6C808000000SISS65DN-T1-GE3
U10B1877310000MAX-M10S-00B
U5B1366001000TPS56A37RPAR
U7B1562501001BTM9011EP
U8B1055000000BMP581
U9B28417240001BNO086

15.1.1 Library Quality Summary

Total ICs evaluated12
Grade A (excellent)0 (0.0%)
Grade B (good)5 (41.7%)
Grade C (fair)4 (33.3%)
Grade D (poor)0 (0.0%)
Grade F (fail)3 (25.0%)
OVERALL LIBRARY QUALITYB (2.59/4.00)

15.2 Component Library Validation

Checking for generic/incomplete library models using statistical patterns.

Library Model Issues (11 models)
Library NameIndustry NamePart NumberRefDesPinsDistributionIssues
114993390713-114993390713-114993390IC212P:12 All pins marked as Passive - likely generic library model; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete; No Industry Name property - BOM and procurement tools require this field [VCC=Passive, GND_2=Passive, GND_1=Passive]
ADXL375BCCZ-RLADXL375BCCZ-RLADXL375BCCZ-RLIC314P:13 ?:1 92% of pins are Passive - suspiciously high for an IC; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete; No Industry Name property - BOM and procurement tools require this field [GND_3=Passive, VDD_I/O=Passive, GND_2=Passive, GND_1=Passive]
AT25SF128A-SHB-T988-AT25SF128A-SHB-T988-AT25SF128A-SHB-TIC18P:8 All pins marked as Passive - likely generic library model; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete; No Industry Name property - BOM and procurement tools require this field [GND=Passive, VCC=Passive]
AZ1117CH-3.3TRG1AZ1117CH-3.3TRG1-U44Bi:1 I:1 O:1 ?:1 No Industry Name property - BOM and procurement tools require this field
BMP581BMP581-U810Pwr:5 I:1 ?:4 40% of pins are Unknown type; No Industry Name property - BOM and procurement tools require this field
BNO086v1.17-U928P:1 Pwr:4 Bi:4 I:8 O:2 ?:9 Pin 23 (RESV_NC) at same location as pin 7 (RESV_NC); Pin 23 (RESV_NC) at same location as pin 13 (RESV_NC); Pin 23 (RESV_NC) at same location as pin 8 (RESV_NC); Pin 23 (RESV_NC) at same location as pin 12 (RESV_NC); Pin 23 (RESV_NC) at same location as pin 21 (RESV_NC); Pin 23 (RESV_NC) at same location as pin 24 (RESV_NC); Pin 23 (RESV_NC) at same location as pin 1 (RESV_NC); Pin 23 (RESV_NC) at same location as pin 22 (RESV_NC); Pin 7 (RESV_NC) at same location as pin 13 (RESV_NC); Pin 7 (RESV_NC) at same location as pin 8 (RESV_NC); Pin 7 (RESV_NC) at same location as pin 12 (RESV_NC); Pin 7 (RESV_NC) at same location as pin 21 (RESV_NC); Pin 7 (RESV_NC) at same location as pin 24 (RESV_NC); Pin 7 (RESV_NC) at same location as pin 1 (RESV_NC); Pin 7 (RESV_NC) at same location as pin 22 (RESV_NC); Pin 13 (RESV_NC) at same location as pin 8 (RESV_NC); Pin 13 (RESV_NC) at same location as pin 12 (RESV_NC); Pin 13 (RESV_NC) at same location as pin 21 (RESV_NC); Pin 13 (RESV_NC) at same location as pin 24 (RESV_NC); Pin 13 (RESV_NC) at same location as pin 1 (RESV_NC); Pin 13 (RESV_NC) at same location as pin 22 (RESV_NC); Pin 8 (RESV_NC) at same location as pin 12 (RESV_NC); Pin 8 (RESV_NC) at same location as pin 21 (RESV_NC); Pin 8 (RESV_NC) at same location as pin 24 (RESV_NC); Pin 8 (RESV_NC) at same location as pin 1 (RESV_NC); Pin 8 (RESV_NC) at same location as pin 22 (RESV_NC); Pin 12 (RESV_NC) at same location as pin 21 (RESV_NC); Pin 12 (RESV_NC) at same location as pin 24 (RESV_NC); Pin 12 (RESV_NC) at same location as pin 1 (RESV_NC); Pin 12 (RESV_NC) at same location as pin 22 (RESV_NC); Pin 21 (RESV_NC) at same location as pin 24 (RESV_NC); Pin 21 (RESV_NC) at same location as pin 1 (RESV_NC); Pin 21 (RESV_NC) at same location as pin 22 (RESV_NC); Pin 24 (RESV_NC) at same location as pin 1 (RESV_NC); Pin 24 (RESV_NC) at same location as pin 22 (RESV_NC); Pin 1 (RESV_NC) at same location as pin 22 (RESV_NC); 32% of pins are Unknown type; No Industry Name property - BOM and procurement tools require this field
BTM9011EPBTM9011EP-U715P:1 Pwr:6 I:2 O:5 OC:1 No Industry Name property - BOM and procurement tools require this field
MAX-M10S-00BC1-U1018Pwr:7 Bi:1 I:7 O:3 Power-named pins not typed as Power - library pin types incomplete; No Industry Name property - BOM and procurement tools require this field [VIO_SEL=Input]
RP2350BRP2350B-U181P:10 Pwr:10 Bi:55 I:3 O:3 Pin 51 (DVDD) at same location as pin 10 (DVDD); Pin 51 (DVDD) at same location as pin 32 (DVDD); Pin 10 (DVDD) at same location as pin 32 (DVDD); Pin 60 (IOVDD) at same location as pin 50 (IOVDD); Pin 60 (IOVDD) at same location as pin 24 (IOVDD); Pin 60 (IOVDD) at same location as pin 5 (IOVDD); Pin 60 (IOVDD) at same location as pin 15 (IOVDD); Pin 60 (IOVDD) at same location as pin 76 (IOVDD); Pin 60 (IOVDD) at same location as pin 29 (IOVDD); Pin 60 (IOVDD) at same location as pin 41 (IOVDD); Pin 50 (IOVDD) at same location as pin 24 (IOVDD); Pin 50 (IOVDD) at same location as pin 5 (IOVDD); Pin 50 (IOVDD) at same location as pin 15 (IOVDD); Pin 50 (IOVDD) at same location as pin 76 (IOVDD); Pin 50 (IOVDD) at same location as pin 29 (IOVDD); Pin 50 (IOVDD) at same location as pin 41 (IOVDD); Pin 24 (IOVDD) at same location as pin 5 (IOVDD); Pin 24 (IOVDD) at same location as pin 15 (IOVDD); Pin 24 (IOVDD) at same location as pin 76 (IOVDD); Pin 24 (IOVDD) at same location as pin 29 (IOVDD); Pin 24 (IOVDD) at same location as pin 41 (IOVDD); Pin 5 (IOVDD) at same location as pin 15 (IOVDD); Pin 5 (IOVDD) at same location as pin 76 (IOVDD); Pin 5 (IOVDD) at same location as pin 29 (IOVDD); Pin 5 (IOVDD) at same location as pin 41 (IOVDD); Pin 15 (IOVDD) at same location as pin 76 (IOVDD); Pin 15 (IOVDD) at same location as pin 29 (IOVDD); Pin 15 (IOVDD) at same location as pin 41 (IOVDD); Pin 76 (IOVDD) at same location as pin 29 (IOVDD); Pin 76 (IOVDD) at same location as pin 41 (IOVDD); Pin 29 (IOVDD) at same location as pin 41 (IOVDD); Power-named pins not typed as Power - library pin types incomplete; No Industry Name property - BOM and procurement tools require this field [DVDD=Passive, DVDD=Passive, VREG_FB=Passive]
SISS65DN-T1-GE3SISS65DN-T1-GE3-U6, U118?:8 No Power pins - may use separate power symbol; Only 0 pin type used - no electrical differentiation; 100% of pins are Unknown type; No Industry Name property - BOM and procurement tools require this field
TPS56A37RPARTPS56A37RPAR-U513Pwr:6 I:1 OC:1 ?:5 Pin 8 (VIN) at same location as pin 13 (VIN); Pin 8 (VIN) at same location as pin 11 (VIN); Pin 8 (VIN) at same location as pin 12 (VIN); Pin 13 (VIN) at same location as pin 11 (VIN); Pin 13 (VIN) at same location as pin 12 (VIN); Pin 11 (VIN) at same location as pin 12 (VIN); 38% of pins are Unknown type; Power-named pins not typed as Power - library pin types incomplete; No Industry Name property - BOM and procurement tools require this field [SW=Unknown]

15.2.1 Validation Heuristics

All pins same type: Generic library with no electrical rules

High % passive pins on IC: Incomplete type information

No power pins: May indicate separate power symbol

Low type diversity: Very underspecified library model

Power-named pins not typed as Power: Library pin types incomplete

15.3 Shielded Connector Model Quality

Shielded connectors with missing pin names0
All shielded connectors have proper pin names for EMC analysis.

15.4 Footprints and Other Models

Components with model data33
Component Model Assignments
RefDesIndustry NamePinsModel TypeModel
IC1988-AT25SF128A-SHB-T8FootprintSnapeda:IC8_AT25SF128A-SHB-T_ADO-L
IC2713-11499339012FootprintSamacsys:114993390
IC3ADXL375BCCZ-RL14FootprintSnapeda:LGA_CC-14-1_ADI-L
J1JST3FootprintConnector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical_SMD_Pin1Right
J8USB_C_Receptacle_USB2.0_16P17FootprintConnector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal
J10Micro_SD_Card9FootprintConnector_Card:microSD_HC_Molex_47219-2001
J18servo 13FootprintConnector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
J19servo 23FootprintConnector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
J20servo 33FootprintConnector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
J21servo 43FootprintConnector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
J22SMA-J-P-H-ST-EM15FootprintSnapeda:SAMTEC_SMA-J-P-H-ST-EM1
J23SMA-J-P-H-ST-EM15FootprintSnapeda:SAMTEC_SMA-J-P-H-ST-EM1
LED1COM-163474FootprintSnapeda:COM-16347_SPK-L
LED2COM-163474FootprintSnapeda:COM-16347_SPK-L
LED3COM-163474FootprintSnapeda:COM-16347_SPK-L
LED4COM-163474FootprintSnapeda:COM-16347_SPK-L
Q4SIA440DJ-T1-GE38FootprintSamacsys:SIA440DJT1GE3
Q5SIA440DJ-T1-GE38FootprintSamacsys:SIA440DJT1GE3
Q6SIA440DJ-T1-GE38FootprintSamacsys:SIA440DJT1GE3
Q7SIA440DJ-T1-GE38FootprintSamacsys:SIA440DJT1GE3
S1PTS647SM38SMTR2_LFS4FootprintSamacsys:PTS647SM38SMTR2LFS
S2PTS647SM38SMTR2_LFS4FootprintSamacsys:PTS647SM38SMTR2LFS
S3JS202011SCQN6FootprintSamacsys:JS202011SCQN
U1RP2350B81FootprintPackage_DFN_QFN:QFN-80-1EP_10x10mm_P0.4mm_EP3.4x3.4mm_ThermalVias
U4AZ1117CH-3.3TRG14FootprintSnapeda:SOT-223_DIO-L
U5TPS56A37RPAR13FootprintSamacsys:TPS56A37RPAR
U6SISS65DN-T1-GE38FootprintSnapeda:POWERPAK-1212-8S_VIS
U7BTM9011EP15FootprintSamacsys:SOP65P600X115-15N
(IPC-7351B)Small Outline Package, 65 pins, 6.00mm pitch
U8BMP58110FootprintSnapeda:QFN10_BMP581_BOS-L
U9v1.1728FootprintSnapeda:IC_BNO086
U10C118FootprintSnapeda:XCVR_MAX-M10S-00B
U11SISS65DN-T1-GE38FootprintSnapeda:POWERPAK-1212-8S_VIS
Y1ABM8-272-T34FootprintSnapeda:XTAL_ABM8-272-T3

15.5 IC Pin Electrical Properties

Unique IC models11
Total IC instances12
IC Library Models
Industry NameLibrary NameRefDesNotes
713-114993390114993390IC2
ADXL375BCCZ-RLADXL375BCCZ-RLIC3
988-AT25SF128A-SHB-TAT25SF128A-SHB-TIC1
AZ1117CH-3.3TRG1AZ1117CH-3.3TRG1U4
BMP581BMP581U8
v1.17BNO086U9
BTM9011EPBTM9011EPU7
C1MAX-M10S-00BU10
RP2350BRP2350BU1
SISS65DN-T1-GE3SISS65DN-T1-GE3U6, U11
TPS56A37RPARTPS56A37RPARU5

15.5.1 114993390 (713-114993390)

PinPin NameElectricalNotes
1RF_SW_Passive
2MISOPassive
3MOSIPassive
4SCKPassive
5NRSTPassive
6NSSPassive
7GND_1Passive
8VCCPassive
9ANTPassive
10GND_2Passive
11BUSYPassive
12DIO1Passive

15.5.2 ADXL375BCCZ-RL (ADXL375BCCZ-RL)

PinPin NameElectricalNotes
1VDD_I/OPassive
2GND_1Passive
3RESERVED_1Passive
4GND_2Passive
5GND_3Passive
6VSPassive
7CSPassive
8INT1Passive
9INT2Passive
10NCUnknown
11RESERVED_2Passive
12SDO/ALT_ADDRESSPassive
13SDA/SDI/SDIOPassive
14SCL/SCLKPassive

15.5.3 AT25SF128A-SHB-T (988-AT25SF128A-SHB-T)

PinPin NameElectricalNotes
1CSPassive
2SO_(I/O1)Passive
3WP_(I/O2)Passive
4GNDPassive
5SI_(I/O0)Passive
6SCKPassive
7HOLD_(I/O3)Passive
8VCCPassive

15.5.4 AZ1117CH-3.3TRG1 (AZ1117CH-3.3TRG1)

PinPin NameElectricalNotes
1ADJ/GNDBidirectional
2OUTPUTOutput
3INPUTInput
4EPADUnknown

15.5.5 BMP581 (BMP581)

PinPin NameElectricalNotes
1VDDIOPower In
2SCKUnknown
3VSSPower Out
4SDIUnknown
5SDOUnknown
6CSBUnknown
7INTInput
8VSSPower Out
9VSSPower Out
10VDDPower In

15.5.6 BNO086 (v1.17)

PinPin NameElectricalNotes
1RESV_NCUnknown
2GNDPower In
3VDDPower In
4BOOTInput
5PS1Input
6PS0/WAKEInput
7RESV_NCUnknown
8RESV_NCUnknown
9CAPPassive
10CLKSEL0Input
11RSTInput
12RESV_NCUnknown
13RESV_NCUnknown
14H_INTOutput
15ENV_SCLBidirectional
16ENV_SDABidirectional
17SA0/H_MOSIInput
18H_CSInput
19H_SCL/SCK/RXBidirectional
20H_SDA/H_MISO/TXBidirectional
21RESV_NCUnknown
22RESV_NCUnknown
23RESV_NCUnknown
24RESV_NCUnknown
25GNDIOPower In
26XOUT32/CLKSEL1Output
27XIN32Input
28VDDIOPower In

15.5.7 BTM9011EP (BTM9011EP)

PinPin NameElectricalNotes
1OUTA1Output
2SDIOpen Collector
3GND@3Power In
4GND@2Power In
5GND@1Power In
6SCLKInput
7OUTB1Output
8OUTB2Output
9SDOOutput
10CSInput
11VS@2Power In
12VS@1Power In
13ISPassive
14OUTA2Output
15EDPPower In

15.5.8 MAX-M10S-00B (C1)

PinPin NameElectricalNotes
1GNDPower In
2TXDOutput
3RXDInput
4TIMEPULSEOutput
5EXTINTInput
6V_BCKPPower In
7V_IOPower In
8VCCPower In
9RESETInput
10GND__1Power In
11RF_INInput
12GND__2Power In
13LNA_ENOutput
14VCC_RFPower In
15VIO_SELInput
16SDABidirectional
17SCLInput
18SAFEBOOTInput

15.5.9 RP2350B (RP2350B)

PinPin NameElectricalNotes
1GPIO4Bidirectional
2GPIO5Bidirectional
3GPIO6Bidirectional
4GPIO7Bidirectional
5IOVDDPower In
6GPIO8Bidirectional
7GPIO9Bidirectional
8GPIO10Bidirectional
9GPIO11Bidirectional
10DVDDPower In
11GPIO12Bidirectional
12GPIO13Bidirectional
13GPIO14Bidirectional
14GPIO15Bidirectional
15IOVDDPassive
16GPIO16Bidirectional
17GPIO17Bidirectional
18GPIO18Bidirectional
19GPIO19Bidirectional
20GPIO20Bidirectional
21GPIO21Bidirectional
22GPIO22Bidirectional
23GPIO23Bidirectional
24IOVDDPassive
25GPIO24Bidirectional
26GPIO25Bidirectional
27GPIO26Bidirectional
28GPIO27Bidirectional
29IOVDDPassive
30XINInput
31XOUTOutput
32DVDDPassive
33SWCLKInput
34SWDIOBidirectional
35RUNInput
36GPIO28Bidirectional
37GPIO29Bidirectional
38GPIO30Bidirectional
39GPIO31Bidirectional
40GPIO32Bidirectional
41IOVDDPassive
42GPIO33Bidirectional
43GPIO34Bidirectional
44GPIO35Bidirectional
45GPIO36Bidirectional
46GPIO37Bidirectional
47GPIO38Bidirectional
48GPIO39Bidirectional
49GPIO40/ADC0Bidirectional
50IOVDDPassive
51DVDDPassive
52GPIO41/ADC1Bidirectional
53GPIO42/ADC2Bidirectional
54GPIO43/ADC3Bidirectional
55GPIO44/ADC4Bidirectional
56GPIO45/ADC5Bidirectional
57GPIO46/ADC6Bidirectional
58GPIO47/ADC7Bidirectional
59ADC_AVDDPower In
60IOVDDPassive
61VREG_AVDDPower In
62VREG_PGNDPower In
63VREG_LXPower Out
64VREG_VINPower In
65VREG_FBPassive
66USB_DNBidirectional
67USB_DPBidirectional
68USB_OTP_VDDPower In
69QSPI_IOVDDPower In
70QSPI_SD3Bidirectional
71QSPI_SCLKOutput
72QSPI_SD0Bidirectional
73QSPI_SD2Bidirectional
74QSPI_SD1Bidirectional
75QSPI_SSOutput
76IOVDDPassive
77GPIO0Bidirectional
78GPIO1Bidirectional
79GPIO2Bidirectional
80GPIO3Bidirectional
81GNDPower In

15.5.10 SISS65DN-T1-GE3 (SISS65DN-T1-GE3)

PinPin NameElectricalNotes
1SUnknown
2SUnknown
3SUnknown
4GUnknown
5DUnknown
6DUnknown
7DUnknown
8DUnknown

15.5.11 TPS56A37RPAR (TPS56A37RPAR)

PinPin NameElectricalNotes
1ENInput
2FBUnknown
3AGNDPower In
4PGOpen Collector
5SSUnknown
6SWUnknown
7BOOTUnknown
8VINPower In
9PGNDPower In
10MODEUnknown
11VINPower In
12VINPower In
13VINPower In