Untitled Design Analysis

1 Design Summary

out of 100

Design Type	Flat (1 sheets)
Total Components	79
Total Pins	255
Total Nets	52
Total Test Points	0

Improve your score:

Improve fault coverage (opens/shorts) +24
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AI findings to review:

Power findings — 4 High, 3 Medium, 2 Low
Functional findings — 13 High, 9 Medium
Devices without datasheet data

AI assistance is enabled for this report. Each section marked "AI-Assisted" contains AI-generated engineering observations produced during schematic-phase design review. Findings are based solely on connectivity, component values, and net annotations present in the schematic data at the time of analysis. The AI has no access to PCB layout, routing, thermal data, BOM pricing or availability, assembly constraints, or any information outside the schematic. Findings are observations to investigate, not pass/fail judgments. The absence of a finding for a given device or net does not constitute a clearance. Rate any finding's accuracy with the thumbs in the table toolbar (select rows first); click a severity badge to mark a finding resolved or invalid — your team sees the same status.

Based on user-selected TP insertion settings, 4 test point(s) were added and a modified design is available for download. Review the modified schematic and resubmit to update this report.

The test point count is unusually high because Optical (AOI) and X-ray (AXI) inspection contributes no coverage — none of the footprint names are recognized as IPC-7351B or IPC-7251 compliant. Repair the library footprint names to follow IPC naming and resubmit; the test point count will drop to typical levels.

1.1 Design Overview

AI-Assisted — This board is a battery-powered GNSS tracking module built around an Espressif ESP32-S3-MINI-1-N8 wireless SoC (U_MCU on the schematic), which provides the application processor, integrated 8 MB flash, and the Wi-Fi/Bluetooth radio. The processor hosts the user application and communicates with the on-board sensors and positioning engine.

Positioning Subsystem

Location fixes are provided by a Quectel LC29H (DA) dual-band L1+L5 GNSS receiver (U_GNSS). The RF front end is brought out through a board-edge BWU.FL-IPEX1 50-ohm coaxial connector (J_GNSS) for an external antenna, with a DC-blocking capacitor (C_DCBLK) and a bias inductor (L_BIAS) forming the active-antenna feed from the receiver's VDD_RF output. The module exposes a UART pair (GNSS_TXD/GNSS_RXD) and a 1PPS timing output (PPS) to the MCU, plus a reset line (GNSS_RST) and antenna-power gate (ANT_BIAS via ANT_ON). The recommended supply for this receiver is a high-PSRR LDO, which the design uses.

Sensing

A STMicroelectronics LIS2DH12TR three-axis MEMS accelerometer (U_IMU) connects to the MCU over the shared I2C bus (I2C_SCL/I2C_SDA, pulled up by R_SCL/R_SDA to V3V3) and provides a motion interrupt (IMU_INT).

USB and Protection

A 16-pin USB Type-C receptacle (J_USB) carries USB 2.0 data and 5 V VBUS. CC1/CC2 are terminated through 5.1 kΩ resistors (R_CC1/R_CC2) for upstream-facing device detection. The D+/D− pair passes through an USBLC6-2SC6 combined ESD/clamp device (U_ESD) before reaching the MCU.

Power Tree

Charging is handled by a Microchip MCP73831T-2ACI single-cell Li-ion charger (U_CHG) fed from VBUS, with PROG set by R_PROG and a STAT line to the MCU. The battery rail VBAT feeds two Diodes Inc. AP2112K-3.3 300 mA LDOs: U_LDO generates the always-on 3.3 V system rail (V3V3), while U_PWR generates a switchable 3.3 V GNSS rail (V3V3_GNSS) gated by GNSS_EN. A resistor divider (R_VB1/R_VB2) brings battery voltage to the MCU as VBAT_SENSE for monitoring. The rails present on the board are VBUS, VBAT, V3V3, V3V3_GNSS, and VBAT_SENSE.

User Interface

A single yellow-green LED (LED1, XL-1608SYGC-06) driven through R_LED provides status indication, and two tactile switches (SW_BOOT, SW_EN) provide boot-mode entry and enable/reset control to the MCU.

Temperature Rating

The narrowest operating window among the populated devices is set by the USB Type-C receptacle and the IPEX connector, giving an effective assembly operating range of roughly −25 °C to +85 °C.

Boundary Scan

The principal programmable devices on this board are the ESP32-S3 SoC (U_MCU) and the LC29H GNSS receiver (U_GNSS); no matched boundary-scan models were applied to either device, so no boundary-scan interconnect coverage was evaluated here. Full design-for-test analysis is covered in the dedicated Design-for-Test section.

1.2 Processed Sheets

#	Sheet Name
1	Untitled.kicad_sch

1.3 Footprint Compliance

Production pick-n-place, AOI, AXI, ATE and Design Quality tools rely on proper descriptions of component footprints.

Footprint Naming	Status
9 footprints could not be classified for inspection

1.4 Missing Datasheets

No public datasheet with the required data was found for the following devices. Verify each is a valid manufacturer part number (MPN) — a typo or an internal house number will not match a public datasheet — then re-submit, or include the PDF in the "datasheets" subfolder of the project.

100nF

10kΩ

10uF

1MΩ

1kΩ

1uF

27nH

2kΩ

33pF

4.7kΩ

4.7uF

5.1kΩ

AP2112K_3_3TRG1

ESP32_S3_MINI_1_N8

LIS2DH12TR

MCP73831T_2ACI_OT

TS_1187A_B_A_B

2 Component Value Properties

No passive components (R, C, L, F, FB, X, Y) found in design.

3 Pin Connectivity Report

3.1 Unconnected Pins

Unconnected pins that are not marked NO_ERC.

71 unconnected pin(s) found:

71 unconnected pin(s) — all are electrical types that are safe to leave open (Bidirectional, Output, Passive, High-Impedance, or Unspecified). Common on partially-populated bus connectors (VME, backplanes, expansion headers) and on outputs whose consumer was omitted. Review to confirm intent, but no action is required by default.

Refdes_Pin	Pin Function	Pin Property	Device Type	Net Name	Notes
C_CHG_1	1	Passive	4.7uF	-	No net
C_G1_2	2	Passive	100nF	-	No net
C_G2_1	1	Passive	10uF	-	No net
C_G2_2	2	Passive	10uF	-	No net
C_IMU_1	1	Passive	100nF	-	No net
C_P1_2	2	Passive	1uF	-	No net
C_P2_1	1	Passive	1uF	-	No net
J_USB_1	1	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_2	2	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_3	3	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_4	4	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_5	5	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_6	6	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_7	7	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_8	8	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_9	9	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_10	10	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_11	11	Passive	TYPE_C_16PIN_2MD_073_	-	No net
J_USB_12	12	Passive	TYPE_C_16PIN_2MD_073_	-	No net
R_CC1_1	1	Passive	5.1kΩ	CC1
R_CC2_1	1	Passive	5.1kΩ	CC2
R_CC2_2	2	Passive	5.1kΩ	-	No net
R_EN_1	1	Passive	10kΩ	-	No net
R_PROG_2	2	Passive	2kΩ	-	No net
R_VB2_1	1	Passive	1MΩ	-	No net
U_CHG_4	VDD	Passive	MCP73831T_2ACI_OT	VBUS
U_GNSS_1	WAKEUP	Passive	LC29HDAMD	-	No net
U_GNSS_2	RESERVED7	Passive	LC29HDAMD	-	No net
U_GNSS_4	RESERVED6	Passive	LC29HDAMD	-	No net
U_GNSS_5	RESERVED5	Passive	LC29HDAMD	-	No net
U_GNSS_6	RESERVED4	Passive	LC29HDAMD	-	No net
U_GNSS_7	VDD_EXT	Passive	LC29HDAMD	-	No net
U_GNSS_15	RESERVED3	Passive	LC29HDAMD	-	No net
U_GNSS_16	RESERVED2	Passive	LC29HDAMD	-	No net
U_GNSS_17	RESERVED1	Passive	LC29HDAMD	-	No net
U_GNSS_18	I2C_SDA	Passive	LC29HDAMD	-	No net
U_GNSS_19	I2C_SCL	Passive	LC29HDAMD	-	No net
U_IMU_11	INT2	Passive	LIS2DH12TR	-	No net
U_LDO_4	NC	Passive	AP2112K_3_3TRG1	-	No net
U_MCU_11	IO7	Passive	ESP32_S3_MINI_1_N8	VBAT_SENSE
U_MCU_14	IO10	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_15	IO11	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_16	IO12	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_17	IO13	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_18	IO14	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_19	IO15	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_20	IO16	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_25	IO21	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_26	IO26	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_27	IO47	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_28	IO33	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_29	IO34	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_30	IO48	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_31	IO35	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_32	IO36	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_33	IO37	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_34	IO38	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_35	IO39	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_36	IO40	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_37	IO41	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_38	IO42	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_39	TXD0	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_40	RXD0	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_41	IO45	Passive	ESP32_S3_MINI_1_N8	-	No net
U_MCU_44	IO46	Passive	ESP32_S3_MINI_1_N8	-	No net
U_PWR_4	NC	Passive	AP2112K_3_3TRG1	-	No net
V3V3_GNSS_1	1	Passive	rail_up	-	No net
V3V3_GNSS_1	1	Passive	rail_up	-	No net
V3V3_GNSS_1	1	Passive	rail_up	-	No net
VBUS_1	1	Passive	rail_up	-	No net
VBUS_1	1	Passive	rail_up	-	No net

3.2 Implied/Hidden Net Connections

No components with implied/hidden net connections found.

3.3 Summary

Total NO_ERC markers in design	0
Pins needing attention (warnings)	71
Pins for information only	0

4 Power Overview

Analysis of passive component footprint suitability, voltage ratings, and power dissipation is not performed in this revision.

No power rails detected in design.

4.1 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections.

4.1.1 Power Path Overview

AI-Assisted — This is a low-voltage battery/USB device with no AC-mains interface. Power originates at the battery terminals BAT_P/BAT_N, forming the VBAT rail. VBAT feeds two AP2112K-3.3 linear regulators on the schematic: U_LDO produces the system V3V3 rail and U_PWR produces the GNSS rail V3V3_GNSS (its enable EN is driven from GNSS_EN). An MCP73831 charger (U_CHG) is intended to recharge the battery from the USB-C VBUS, with a USBLC6-2SC6 (U_ESD) protecting the USB data lines. Because there is no rectifier, common-mode choke, X/Y capacitor, varistor or DC bus in this design, the mains-class checks (surge varistor coordination, PIV margin, EMI filter ratings, Y-capacitor leakage, bleeder discharge timing per IEC 60335/62368-1) are not applicable and are recorded as such. The substantive power-path risks here are connectivity defects on the USB input and charger, ground-net partitioning at the regulators, a broken battery-sense divider, and GNSS RF front-end component values.

4.1.2 USB-C Input, ESD Protection and Charging

AI-Assisted — The USB-C receptacle J_USB has all of its functional contacts (VBUS, CC1/CC2, and the D+/D- pairs, pins 1-12) left unconnected; only the shell tabs are grounded. As a result the charger input rail VBUS contains exactly one node — U_CHG pin 4 (VDD) — with no source and no other members, so the charger VDD has no DC path and cannot be powered. The CC pull-downs R_CC1/R_CC2 (5.1 kΩ) do not reach any connector CC pin, so USB-C sink attach/detect is also inoperative. The USBLC6 VBUS clamp-reference pin (pin 5) sits on a net whose only members are the bypass capacitor C_VBUS and the pin itself — a decoupling capacitor does not establish a DC path, so this pin is effectively floating; per the USBLC6-2SC6 datasheet its standoff (VRWM 5 V) and clamping (15 V at 6 A) are correct for 5 V USB but require the pin to be tied to the actual bus. The charge-current program path is broken: R_PROG returns from PROG but its far pin is open, so per the MCP73831 datasheet the PROG-to-VSS resistor that sets IREG is not present.

4.1.3 Battery Rail and Linear Regulation

AI-Assisted — U_LDO is correctly fed: VIN sits on VBAT and its GND pin is on a net carrying the GND symbol together with the input/output return capacitors. Its output drives V3V3 to the MCU, IMU and GNSS backup pin. U_PWR VIN is likewise on VBAT, and its output V3V3_GNSS feeds the GNSS VCC and VDD_RF. However, the principal return net collecting the MCU ground pins, the charger VSS, the IMU grounds and the ESD ground does not show any tie to the GND-symbol net that carries battery negative (BAT_N) and the LDO returns. The GNSS regulator U_PWR ground likewise sits on a net whose only other member is the antenna-connector shell, isolated from the GND-symbol net. These separate ground islands have no explicit stitching in the schematic, breaking the DC return for the charger and the digital section.

4.1.4 GNSS Supply and RF Front-End Bias

AI-Assisted — V3V3_GNSS supplies the LC29H VCC and VDD_RF; both sit within the recommended 3.1-3.6 V window, and V_BCKP on V3V3 is within its 2.2-3.6 V range, all per the LC29H datasheet. Two RF front-end values diverge from that datasheet. The series DC-blocking capacitor C_DCBLK between the antenna connector and RF_IN is 33 pF, whereas the LC29H active-antenna reference specifies a 100 pF series DC-block; at the L1 band (~1.575 GHz) 33 pF presents about 3 Ω of series reactance versus roughly 1 Ω for 100 pF, adding modest insertion loss. The antenna bias inductor L_BIAS is 27 nH, below the LC29H minimum recommended bias inductance of 68 nH, which reduces RF isolation of the bias node and allows RF leakage into the supply. The RF_IN line also lacks the recommended TVS/ESD device (≤0.6 pF junction capacitance) to ground; this may reside off-board with the antenna assembly.

4.1.5 Battery Sense and Component Derating

AI-Assisted — The battery-monitor divider is non-functional: R_VB1 (1 MΩ) connects VBAT to the VBAT_SENSE node, but the lower-leg resistor R_VB2 has its top pin open, so no division occurs. The MCU analog input on VBAT_SENSE therefore sees essentially full battery voltage through the series 1 MΩ, which for a single Li-ion cell can approach ~4.2 V — above the 3.3 V analog domain — risking input overvoltage. With the intended 1 MΩ/1 MΩ pair the node would halve to a safe level. The LED indicator LED1 is driven high-side from an MCU output through R_LED (1 kΩ): with VF 1.8-2.4 V at IF=20 mA per the XL-1608SYGC datasheet, drive current is about (3.3-2.0)/1 kΩ ≈ 1.3 mA, well under the 20 mA continuous and 80 mA pulsed limits; the provisional pin-1-cathode orientation places the cathode toward ground and the anode toward the resistor, which looks consistent (datasheet pinout unconfirmed). All capacitors in the power path are ceramic, so there are no electrolytic or tantalum polarity concerns.

4.2 Observations

AI-Assisted — The dominant issues are connectivity rather than component rating: the USB input and charger are isolated from any 5 V source, the charge-current program resistor is not returned to ground, and several ground domains are drawn as unconnected islands, which together prevent both charging and a coherent digital return. The battery-sense divider as drawn would expose the MCU analog pin to near-full battery voltage. The GNSS RF bias inductor and DC-block capacitor are below the manufacturer's recommended values. None of the verified datasheets indicate NRND or end-of-life status for the fitted parts. No AC-mains protection, rectification, or bus-discharge analysis applies to this architecture.

4.3 Findings

AI-Assisted —

Device	Rating / Net	Observation	Severity
U_CHG (MCP73831) VDD	VBUS rail	VBUS rail has only U_CHG pin 4 as a member; USB-C connector power pins are unconnected, so VDD has no DC source (MCP73831 datasheet).	High
U_ESD (USBLC6-2SC6) VBUS pin 5	Net-(U_ESD-VBUS)	Pin reaches only the bypass cap C_VBUS to GND; no DC path to the 5 V bus. Clamp ratings (VRWM 5 V, VC 15 V at 6 A) are suitable but the reference pin is floating (USBLC6-2SC6 datasheet).	High
Primary return net	Net-(U_CHG-VSS) vs GND symbol	Net carrying MCU/charger/IMU/ESD grounds shows no tie to the GND-symbol net (battery negative); charger and digital return are isolated islands.	High
VBAT_SENSE divider	R_VB1 / R_VB2	R_VB2 top pin open: no division, MCU analog input sees ~full battery (up to ~4.2 V) on a 3.3 V domain — overvoltage risk.	High
U_CHG (MCP73831) PROG	PROG / R_PROG	Program resistor R_PROG far pin open; PROG-to-VSS resistor that sets charge current is absent, leaving IREG undefined (MCP73831 datasheet).	Medium
U_PWR (AP2112K) GND	net GND	GNSS regulator ground net's only other member is the antenna connector shell; not stitched to the main GND-symbol net.	Medium
L_BIAS antenna bias inductor	ANT_BIAS / RF path	27 nH is below the LC29H recommended minimum of 68 nH; reduced RF isolation, leakage into bias supply (LC29H datasheet, p.42).	Medium
C_DCBLK series DC-block	RF_GNSS / ANT_IN	33 pF versus datasheet-recommended 100 pF series DC-block; ~3 Ω series reactance at L1 adds modest insertion loss (LC29H datasheet, p.41).	Low
RF_IN ESD protection	RF_GNSS	No TVS/ESD device (≤0.6 pF) to GND at RF_IN as recommended; may be provided off-board with the antenna assembly (LC29H datasheet, p.41).	Low
U_LDO (AP2112K) VIN/GND/VOUT	VBAT / Net-(U_LDO-GND) / V3V3	VIN on VBAT, GND on a net carrying the GND symbol, output on V3V3 — all correctly connected (AP2112K function).	✓
U_GNSS VCC / VDD_RF / V_BCKP	V3V3_GNSS / V3V3	3.3 V supply within 3.1-3.6 V (VCC/VDD_RF) and 2.2-3.6 V (V_BCKP) recommended ranges (LC29H datasheet, p.48).	✓
LED1 (XL-1608SYGC)	LED_CTRL / LED_A	1 kΩ limit gives ~1.3 mA at VF~2.0 V, below 20 mA continuous / 80 mA pulse; provisional cathode-to-GND orientation looks consistent (XL-1608SYGC datasheet).	✓
Power-path capacitors	all rails	All ceramic; no electrolytic or tantalum polarity-sensitive parts present (schematic).	✓
Mains protection / rectifier / EMI filter / bleeder	n/a	No AC-mains interface, rectifier, varistor, common-mode choke, X/Y caps or DC bus; IEC 60335/62368-1 surge and discharge checks not applicable.	✓

4.4 Citations

AI-Assisted —

References
CLT0402B100KQ044 (Ever Ohms) — datasheet datasheet.lcsc.com/datasheet/pdf/034dd70444b6220fe93d5ee6...
BWU.FL-IPEX1 (BAT WIRELESS (Shenzhen Bat Wireless Technology Co., Ltd.)) — datasheet datasheet.lcsc.com/datasheet/pdf/fb4bd9c7691c73329e69e5b9...
TYPE-C 16P 073 (Shenzhen Shouhan Technology Co., Ltd (深圳市首韩科技有限公司)) — datasheet datasheet.lcsc.com/datasheet/pdf/9dda4aa5d404a8a801b6605b...
USBLC6-2SC6 (UMW) — datasheet ae0ae23eb9505e9b.pdf
XL-1608SYGC-06 (XINGLIGHT) — datasheet datasheet.lcsc.com/datasheet/pdf/db39074692074ba57d43d76e...

5 Connector Pinouts

No connectors (J*, P*, CON*) found in design.

6 Indicator Documentation

1 indicator device(s) found.

6.1 Indicator Assignments

Indicators
RefDes	Type	Color	Signal	Sheet	Notes
LED1	XL_1608SYGC_06	-	Net-(BAT_N-Pad1)	Untitled.kicad_sch	No current-limiting resistor; A:Net-(BAT_N-Pad1) K:LED_A

6.2 Indicator Testability

0 of 1 indicators have test coverage.

Indicator Testability
RefDes	Driver	Control Signal	DFT Status	Testable
LED1	Direct	Net-(BAT_N-Pad1)	Design Warning: Test point needed on Net-(BAT_N-Pad1). Drive HIGH to turn on LED LED1.

7 Switch Documentation

No switches or push buttons found in design.

8 Low-Speed Serial Interfaces (LSSI)

No functional interfaces detected with test access.

9 High-Speed Serial Interfaces (HSSI)

No controlled impedance nets detected in design.

10 Memory Interface Analysis

No memory devices with detectable bus interfaces found.

11 Functional Analysis

41 device(s) to review across 1 category(ies)

Device Inventory
RefDes	Category	Part Number	Description	Interfaces	HSSI
C_BAT	DEVICE	4.7uF	Capacitor	-	-
C_BIAS	DEVICE	100nF	Capacitor	-	-
C_BULK	DEVICE	10uF	Capacitor	-	-
C_CHG	DEVICE	4.7uF	Capacitor	-	-
C_DCBLK	DEVICE	33pF	Capacitor	-	-
C_EN	DEVICE	1uF	Capacitor	-	-
C_G1	DEVICE	100nF	Capacitor	-	-
C_G2	DEVICE	10uF	Capacitor	-	-
C_IMU	DEVICE	100nF	Capacitor	-	-
C_L1	DEVICE	1uF	Capacitor	-	-
C_L2	DEVICE	1uF	Capacitor	-	-
C_M1	DEVICE	100nF	Capacitor	-	-
C_M2	DEVICE	10uF	Capacitor	-	-
C_P1	DEVICE	1uF	Capacitor	-	-
C_P2	DEVICE	1uF	Capacitor	-	-
C_VB	DEVICE	100nF	Capacitor	-	-
C_VBUS	DEVICE	10uF	Capacitor	-	-
J_GNSS	DEVICE	BWU_FL_IPEX1	Integrated Circuit	-	-
J_USB	DEVICE	TYPE_C_16PIN_2MD_073_	Integrated Circuit	-	-
LED1	DEVICE	XL_1608SYGC_06	LED	-	-
L_BIAS	DEVICE	27nH	Inductor	-	-
R_CC1	DEVICE	5.1kΩ	Resistor	-	-
R_CC2	DEVICE	5.1kΩ	Resistor	-	-
R_EN	DEVICE	10kΩ	Resistor	-	-
R_GEN	DEVICE	100kΩ	Resistor	-	-
R_GRST	DEVICE	10kΩ	Resistor	-	-
R_LED	DEVICE	1kΩ	Resistor	-	-
R_PROG	DEVICE	2kΩ	Resistor	-	-
R_SCL	DEVICE	4.7kΩ	Resistor	-	-
R_SDA	DEVICE	4.7kΩ	Resistor	-	-
R_VB1	DEVICE	1MΩ	Resistor	-	-
R_VB2	DEVICE	1MΩ	Resistor	-	-
SW_BOOT	DEVICE	TS_1187A_B_A_B	Integrated Circuit	-	-
SW_EN	DEVICE	TS_1187A_B_A_B	Integrated Circuit	-	-
U_CHG	DEVICE	MCP73831T_2ACI_OT	Integrated Circuit	-	-
U_ESD	DEVICE	USBLC6_2SC6	Integrated Circuit	-	-
U_GNSS	DEVICE	LC29HDAMD	Integrated Circuit	-	-
U_IMU	DEVICE	LIS2DH12TR	Integrated Circuit	-	-
U_LDO	DEVICE	AP2112K_3_3TRG1	Integrated Circuit	-	-
U_MCU	DEVICE	ESP32_S3_MINI_1_N8	Integrated Circuit	-	-
U_PWR	DEVICE	AP2112K_3_3TRG1	Integrated Circuit	-	-

11.1 Functional Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections.

11.1.1 LDO input and output bypass capacitors (C_BAT, C_L1, C_BULK)

AI-Assisted — C_BAT (4.7 µF) and C_L1 (1 µF) both bridge VBAT to GND at the input of the AP2112K LDO U_LDO, whose VIN/EN sit on VBAT. This meets and exceeds the AP2112K datasheet 1 µF input recommendation. C_BULK (10 µF) bridges the V3V3 output rail to GND alongside C_M2, exceeding the AP2112K 1 µF output minimum and providing adequate bulk on the regulated rail. All three are correctly placed between rail and ground per the AP2112K datasheet and pass.

11.1.2 Charger input capacitor C_CHG

AI-Assisted — C_CHG (4.7 µF) is intended as the VDD input decoupling for the MCP73831 charger U_CHG. Only its pin 2 reaches the GND net (shared with C_VBUS); pin 1 is unconnected in the schematic. With one terminal floating the capacitor provides no decoupling and the MCP73831 VDD pin sees no input bulk capacitance, contrary to the datasheet's recommended VDD bypass. Pin 1 must be tied to the VBUS supply node.

11.1.3 GNSS RF DC-blocking capacitor C_DCBLK

AI-Assisted — C_DCBLK (33 pF) sits in series between the GNSS RF_IN pin and the antenna feed node ANT_IN (to the antenna connector and bias inductor L_BIAS), correctly forming the DC block of an active-antenna front end. The LC29H hardware design specifies a 100 pF series DC-blocking capacitor at RF_IN; 33 pF presents roughly three times the series reactance at the L1/L5 band (~3 Ω vs ~1 Ω at 1.575 GHz), adding insertion loss in the receive path. Use the datasheet-specified 100 pF unless a deliberate matching choice justifies the lower value.

11.1.4 GNSS antenna bias decoupling C_BIAS

AI-Assisted — C_BIAS (100 nF) is placed on the antenna bias node ANT_BIAS (the ANT_ON pin and bias inductor L_BIAS) as the bias-feed decoupling capacitor. Its pin 2, however, lands on the Net-(SW_BOOT-C) node shared with the boot switch contacts and C_P2 — this net carries no ground symbol and is not a ground net. The capacitor therefore has no return to GND and cannot decouple the bias feed. Route pin 2 to GND. Separately, the LC29H bias network calls for a minimum 68 nH series inductor, while L_BIAS is 27 nH.

11.1.5 GNSS supply decoupling C_G2 and reset filter C_G1

AI-Assisted — The LC29H VCC requires 10 µF + 100 nF + 33 pF to GND. C_G2 (10 µF), the intended VCC bulk capacitor, has both terminals unconnected in the schematic and is absent from every net, so the GNSS VCC rail (V3V3_GNSS) carries no bulk decoupling at all — a significant supply-integrity gap for the module. C_G1 (100 nF) ties pin 1 to R_GRST pin 1 to form a reset RC on RESET_N, but its pin 2 is unconnected, so no capacitance reaches ground and the filter is inoperative; the node R_GRST_1/C_G1_1 is a dead end. Both ground-side connections must be made.

11.1.6 IMU decoupling capacitor C_IMU

AI-Assisted — C_IMU (100 nF) is the decoupling capacitor for the LIS2DH12 accelerometer, whose VDD/VDD_IO are on the V3V3 rail. Pin 2 reaches GND, but pin 1 is unconnected in the schematic, so the capacitor cannot bypass the IMU supply. The LIS2DH12 datasheet recommends a 100 nF supply decoupling capacitor; as wired it provides none. Pin 1 must connect to the V3V3 supply at the IMU.

11.1.7 ESP32 enable delay capacitor C_EN

AI-Assisted — C_EN (1 µF) connects the ESP32-S3 EN node to GND, matching the typical 1 µF EN delay capacitor used with the module. Its own terminals are wired correctly. Note that the companion pull-up R_EN has its top terminal unconnected in the schematic, so the EN node lacks a pull-up to 3V3 — that is an R_EN/MCU issue, not a fault of C_EN itself, which passes on value and placement.

11.1.8 V3V3 rail decoupling (C_L2, C_M1, C_M2)

AI-Assisted — C_L2 (1 µF) and C_M1 (100 nF) both bridge V3V3 to GND, and C_M2 (10 µF) bridges V3V3 to GND alongside C_BULK. All three are correctly placed between the regulated 3.3 V rail and ground, providing bulk and high-frequency decoupling for the downstream loads. Each capacitor's two terminals sit on the proper rail and ground nets and all pass.

11.1.9 Battery node capacitors C_P1 and C_P2

AI-Assisted — C_P1 (1 µF) has pin 1 on the VBAT battery node (with BAT_P) but pin 2 unconnected in the schematic, so it cannot decouple the battery rail. C_P2 (1 µF) has pin 1 unconnected and pin 2 landing on Net-(SW_BOOT-C), a node that carries no ground symbol and is not a ground net; with one terminal floating and the other on a non-ground net it provides no decoupling either. Both intended battery-node capacitors are non-functional as wired. Tie C_P1 pin 2 and C_P2 pin 1 to GND.

11.1.10 Battery-sense filter capacitor C_VB

AI-Assisted — C_VB (100 nF) has pin 1 on the VBAT_SENSE node (the R_VB1/R_VB2 divider output feeding the MCU monitor input) and pin 2 on GND, correctly forming the anti-alias/noise filter for the battery-voltage sense divider. Both terminals are properly connected and the capacitor passes.

11.1.11 USB VBUS decoupling capacitor C_VBUS

AI-Assisted — C_VBUS (10 µF) has pin 1 on the USBLC6 VBUS node and pin 2 on GND, providing bulk decoupling at the ESD protector's VBUS terminal. Both terminals are correctly connected and the capacitor passes on value and placement. Note this VBUS node is a separate net from the charger VBUS supply pin, which is a connectivity concern tracked under the USB connector and charger, not under this capacitor.

11.1.12 GNSS antenna connector J_GNSS

AI-Assisted — J_GNSS is the passive U.FL/IPEX RF coaxial connector for the GNSS antenna (0-6 GHz, 50 Ω). Its center signal pin is on ANT_IN, feeding the series DC-block C_DCBLK toward RF_IN and the L_BIAS active-antenna bias node; its shell/ground pins are on GND. Connectivity is correct for an active-antenna front end. The signal pad requires a short 50 Ω controlled-impedance trace at layout. The connector itself passes; the RF-chain value concerns (33 pF DC-block vs 100 pF, 27 nH vs 68 nH minimum bias inductor) are raised under those parts.

11.1.13 USB Type-C receptacle J_USB

AI-Assisted — J_USB is the USB Type-C receptacle (5 V, 3 A). All functional pins — VBUS, GND, CC1, CC2, and both D+/D- pairs (pins 1-12) — are unconnected in the schematic; only the shell/mounting tabs reach GND. Consequently the connector delivers no VBUS to the charger, the data lines never reach the USBLC6/MCU pair (USB_DP/USB_DM connect only between U_ESD and U_MCU), and the CC pulldown resistors R_CC1/R_CC2 dangle (R_CC1/R_CC2 pin 1 sit on isolated CC1/CC2 nets with no connector pin). As drawn the USB interface and the bus-powered charging path are completely open. The connector's signal, power, and CC pins must be wired to the USB front end, VBUS rail, and CC resistors.

11.1.14 Status/charge indicator LED1

AI-Assisted — LED1 is driven from the MCU through R_LED (1 kΩ): IO5 → LED_CTRL → R_LED → anode (pin 2), with cathode (pin 1) on GND. With ~3.3 V drive and ~1.8-2.4 V forward voltage, current is roughly 1 mA — well within the 20 mA continuous limit, though dim; increase drive current if more brightness is needed. Per the datasheet the green mark marks pin 1 as cathode and pin 2 as anode; the wiring (anode to the resistor/drive side, cathode to GND) looks consistent with current flow, but the datasheet pin numbering is provisional — orientation appears correct, verify against the package marking.

11.1.15 GNSS antenna bias inductor L_BIAS

AI-Assisted — L_BIAS (27 nH) feeds the active-antenna DC bias from ANT_BIAS onto the RF node ANT_IN. The LC29H bias network specifies a minimum 68 nH series inductor to block RF leakage from the antenna feed into the supply; 27 nH is well below that minimum and presents too low a reactance at the L1/L5 bands, allowing RF leakage and degrading the antenna feed isolation. Use a 68 nH or larger bias inductor. Connectivity itself (ANT_BIAS to ANT_IN) is correct.

11.1.16 USB-C CC configuration resistors R_CC1, R_CC2

AI-Assisted — Both are 5.1 kΩ, the correct Rd pulldown value for a USB Type-C sink. However neither performs its function as wired. R_CC1 pin 1 sits on the CC1 net whose only member is that pin — it never reaches a connector CC pin (J_USB pins are unconnected); pin 2 is on a ground net. R_CC2 is worse: pin 1 is on the isolated CC2 net and pin 2 is unconnected in the schematic, so it is fully open. As drawn the board presents no Rd to a USB host and will not be detected as a sink. The CC nets must connect to the connector CC1/CC2 pins and R_CC2 must be grounded.

11.1.17 MCU enable pull-up R_EN

AI-Assisted — R_EN (10 kΩ) is intended as the pull-up holding the ESP32-S3 EN line high. Pin 2 is on the MCU_EN node (with C_EN and the reset switch), but pin 1 is unconnected in the schematic, so the resistor has no connection to the 3V3 rail and provides no pull-up. The EN node is left without its defining pull-up to the supply, so reset behaviour is undefined. Connect pin 1 to V3V3.

11.1.18 GNSS-LDO enable pull-down R_GEN

AI-Assisted — R_GEN (100 kΩ) pulls the GNSS_EN node down to GND (pin 2 on the GND net, pin 1 on GNSS_EN with MCU IO9 and the AP2112K U_PWR enable). This correctly holds the GNSS regulator disabled by default until the MCU drives IO9 high. Value and direction are appropriate for an enable pulldown; passes.

11.1.19 GNSS reset pull-up R_GRST

AI-Assisted — R_GRST (10 kΩ) is intended to bias the GNSS RESET_N line (pin 2 on GNSS_RST with U_GNSS RESET_N and MCU IO8). Its pin 1 lands on the C_G1 node, whose only other member is C_G1 pin 1 — and C_G1's other terminal is unconnected, making that node a dead end. The resistor therefore connects to no rail and provides neither a pull-up nor a working RC reset filter; RESET_N has no defined idle level. Tie R_GRST pin 1 to the 3V3 rail and ground C_G1 to form the intended reset network.

11.1.20 LED series resistor R_LED

AI-Assisted — R_LED (1 kΩ) is the series current-limit resistor between MCU IO5 (LED_CTRL) and the LED1 anode (LED_A). With ~3.3 V drive and ~1.8-2.4 V forward voltage it sets about 1 mA, safely within the LED 20 mA limit. Correctly wired; passes.

11.1.21 Charger program resistor R_PROG

AI-Assisted — R_PROG (2 kΩ) sets the MCP73831 fast-charge current via the PROG pin, where the datasheet gives Ireg = 1000 V / Rprog (≈500 mA for 2 kΩ). The PROG resistor must return to GND, but R_PROG pin 2 is unconnected in the schematic. With PROG open the charger cannot establish its current-regulation reference and will not charge correctly. Connect pin 2 to GND.

11.1.22 I2C pull-up resistors R_SCL, R_SDA

AI-Assisted — R_SCL and R_SDA (both 4.7 kΩ) pull I2C_SCL and I2C_SDA up to the V3V3 rail (pin 1 on the V3V3 net, pin 2 on the respective bus net shared by the IMU and MCU). The 4.7 kΩ value is standard for 3.3 V I2C at 100-400 kHz. Both pull-ups are correctly placed and pass.

11.1.23 Battery-sense voltage divider R_VB1, R_VB2

AI-Assisted — R_VB1 (1 MΩ) is the top leg from VBAT to VBAT_SENSE (with filter C_VB and MCU monitor IO7). R_VB2 (1 MΩ) is the intended bottom leg: its pin 2 is on GND, but pin 1 is unconnected in the schematic rather than on VBAT_SENSE. The bottom leg is therefore open, so the divider does not divide — VBAT_SENSE floats up toward VBAT through the 1 MΩ top resistor, and the MCU ADC sees an out-of-range, unreliable battery reading. With the intended 1:1 divider a 4.2 V battery would read 2.1 V, which suits the ESP32 ADC, but only once R_VB2 pin 1 is connected to VBAT_SENSE.

11.1.24 Boot and reset tactile switches SW_BOOT, SW_EN

AI-Assisted — SW_EN bridges MCU_EN to a node that includes GND (Net-(SW_EN-C)), so pressing it pulls EN low to reset the MCU — correct. SW_BOOT, however, bridges MCU_BOOT (MCU IO0) to Net-(SW_BOOT-C), which carries C_BIAS and C_P2 plates and no ground symbol — it is not a ground net. A boot/download button must pull IO0 to GND when pressed; as wired the switch connects IO0 to a floating capacitor node, so download-boot mode cannot be entered. Route the switch's common (pins C/D) to GND.

11.1.25 Battery charger U_CHG

AI-Assisted — The MCP73831 charger has two supply/reference faults. Its VDD (pin 4) sits alone on the VBUS rail with no other member, so it has no DC path to a 5 V source — the USB connector pins that would feed VBUS are unconnected. PROG (pin 5) connects to R_PROG, but R_PROG's other terminal is unconnected, leaving PROG open; without the program resistor to GND the charger cannot establish its current-regulation reference. VSS (pin 2) is correctly grounded and VBAT (pin 3) drives the battery rail, STAT (pin 1) reaches MCU IO6. As drawn the charger has neither input power nor a current setpoint and will not charge.

11.1.26 USB ESD protector U_ESD

AI-Assisted — The USBLC6 VBUS clamp pin (pin 5) sits alone with C_VBUS on Net-(U_ESD-VBUS); its only non-capacitor member is itself, so the clamp rail has no DC path to a 5 V VBUS supply. Its GND (pin 2) is correctly grounded. The protected I/O lines connect to the MCU (USB_DM to IO19, USB_DP to IO20) but the connector side of those lines is open because J_USB is unconnected, so the device protects nothing at the port. Connect the VBUS pin to the USB VBUS rail and route the data lines to the connector.

11.1.27 GNSS module U_GNSS

AI-Assisted — VCC (pin 23) and VDD_RF (pin 9) are fed from the GNSS LDO U_PWR (3.3 V, within the 3.1-3.6 V range), and V_BCKP (pin 22) from the 3V3 rail (within 2.2-3.6 V) — supply choice is correct, an LDO as the datasheet requires. GND1/GND2 (pins 24,13) are grounded, but GND3/GND4 (pins 12,10) sit together on an isolated two-pin net with no ground symbol — those return pins are not grounded and must be tied to system GND. With D_SEL pins at their internal pulldown default the module uses UART, which is wired to the MCU (TXD/RXD); the unused I2C pins being left open is consistent. The missing VCC bulk decoupling (C_G2) and the undefined RESET_N idle level (R_GRST dead-end) are tracked under those parts.

11.1.28 Accelerometer U_IMU

AI-Assisted — VDD/VDD_IO (pins 9,10) are on the 3.3 V rail, within range. CS (pin 2) is tied to V3V3, selecting I2C mode, and SA0/pin 3 is grounded, setting address 0x18 — a valid configuration. SCL (pin 1) and SDA (pin 4) connect to the shared I2C bus with the MCU and 4.7 kΩ pull-ups, and INT1 (pin 12) reaches MCU IO3; INT2 is intentionally unused. Ground pins are grounded. The only issue is the supply bypass capacitor C_IMU, whose pin 1 is unconnected (tracked under C_IMU). Otherwise correctly wired.

11.1.29 Main 3.3 V LDO U_LDO

AI-Assisted — The AP2112K-3.3 takes VIN (pin 1) from VBAT with EN (pin 3) tied to VIN — an always-enabled configuration, acceptable. VBAT (≈3.0-4.2 V) is within the 2.5-6 V input range, and the fixed 3.3 V output drives the V3V3 rail. GND (pin 2) is grounded; the NC pin is unused. Input capacitors (C_BAT, C_L1) and output capacitors (C_BULK, C_M2) meet the datasheet recommendations. Correctly wired. For test access, a resistor soft-tie plus a test point on EN would aid bring-up, but the fixed tie is not a fault.

11.1.30 Application MCU U_MCU

AI-Assisted — The ESP32-S3-MINI-1 is supplied on 3V3 with adequate rail decoupling and all ground pins grounded. The chip-enable line carries C_EN (1 µF) to GND but its pull-up R_EN has an unconnected terminal, so EN has no path to 3V3 and will sit low — the module would be held in reset. This is the critical fault on the MCU and must be fixed by connecting R_EN to V3V3. The IO0 boot strap relies on the SW_BOOT button to enter download mode, but that button does not reach GND (tracked under SW_BOOT); the internal pull-up still gives normal boot. UART to the GNSS, I2C to the IMU, USB data to the ESD device, and the LED/charger-status GPIOs are wired; the battery monitor on IO7 depends on the broken sense divider.

11.1.31 GNSS regulator U_PWR

AI-Assisted — The second AP2112K-3.3 supplies the GNSS subsystem. VIN (pin 1) is on the VBAT rail (≈3.0-4.2 V, within the 2.5-6 V input range) and GND (pin 2) is on a ground-named net, so both supply and return pins have valid DC paths. EN (pin 3) is on GNSS_EN, held low by R_GEN (100 kΩ) and driven by MCU IO9 — correct software-controlled enable. The fixed 3.3 V output (pin 5) feeds V3V3_GNSS, which is within the LC29H 3.1-3.6 V VCC/VDD_RF range. The NC pin is unused. The concern is stability: the AP2112K requires a minimum 1 µF output capacitor, but V3V3_GNSS carries no capacitor at all — its only members are this VOUT pin and the two GNSS supply pins. The intended bulk cap C_G2 is unconnected, so the regulator runs with no output decoupling and may be unstable. Connect an output capacitor (>=1 µF) on V3V3_GNSS at the regulator.

11.2 Findings

AI-Assisted —

Device	Category	Finding	Severity
C_CHG 4.7µF	Capacitor	MCP73831 VDD input decoupling: pin 1 unconnected in the schematic, pin 2 on GND. Capacitor non-functional; charger input has no bypass. Connect pin 1 to VBUS.	High
C_G2 10µF	Capacitor	Intended LC29H VCC bulk decoupling (datasheet requires 10 µF + 100 nF + 33 pF); both terminals unconnected, absent from all nets — GNSS VCC has no bulk decoupling. Wire across V3V3_GNSS to GND.	High
J_USB TYPE-C 16P	Connector	All functional pins (VBUS, GND, CC1, CC2, D+/D-, pins 1-12) unconnected in the schematic; only shell tabs grounded. No VBUS to charger, data lines do not reach connector, CC resistors dangle. USB and bus-powered charging non-functional. Wire connector pins to USB front end, VBUS rail, and CC resistors.	High
R_CC1 5.1kΩ	Resistor	Correct Type-C sink Rd value, but CC1 net reaches no connector pin (J_USB unconnected); pull-down does not present Rd to host. Connect CC1 net to connector CC1 pin.	High
R_CC2 5.1kΩ	Resistor	Correct Rd value, but pin 1 on isolated CC2 net and pin 2 unconnected in the schematic — fully open. Connect to connector CC2 pin and ground pin 2.	High
R_EN 10kΩ	Resistor	Intended EN pull-up: pin 1 unconnected in the schematic, so no path to V3V3; MCU EN has no pull-up. Connect pin 1 to V3V3.	High
R_PROG 2kΩ	Resistor	MCP73831 PROG current-set (Ireg=1000V/Rprog ~500 mA); must return to GND but pin 2 unconnected in the schematic. PROG open — charger cannot regulate current. Connect pin 2 to GND.	High
R_VB2 1MΩ	Resistor	Intended divider bottom leg: pin 2 on GND but pin 1 unconnected in the schematic, leaving VBAT_SENSE undivided and the MCU ADC reading invalid. Connect pin 1 to VBAT_SENSE.	High
U_CHG MCP73831	Charger	VDD (pin 4) alone on VBUS rail — no DC path to 5 V (USB pins unconnected); PROG (pin 5) open because R_PROG other terminal unconnected — no current setpoint. Charger has no input power and cannot regulate. Connect VDD to VBUS and PROG resistor to GND.	High
U_ESD USBLC6-2SC6	Protection	VBUS clamp pin (pin 5) only on a cap node (C_VBUS) — no DC path to a 5 V VBUS supply; protected data lines reach the MCU but the connector side is open (J_USB unconnected). Connect VBUS pin to VBUS rail and data lines to the connector.	High
U_GNSS LC29HDAMD	Wireless	GND3/GND4 (pins 10,12) on an isolated two-pin net with no ground — return pins not grounded. VCC/VDD_RF/V_BCKP supplies in range and LDO-fed per datasheet; UART interface correctly wired. Tie GND3/GND4 to system GND.	High
U_MCU ESP32-S3-MINI-1	Microcontroller	EN line has C_EN to GND but its pull-up R_EN has no path to 3V3, so EN sits low and the module is held in reset. Supply, grounds, UART/I2C/USB/GPIO otherwise wired. Connect R_EN to V3V3.	High
U_PWR AP2112K-3.3	LDO	GNSS regulator: VIN on VBAT (in range), GND valid, EN on GNSS_EN with R_GEN pulldown + MCU IO9 control, 3.3 V output feeds V3V3_GNSS (in LC29H range). But V3V3_GNSS has no output capacitor — AP2112K requires >=1 µF for stability (intended C_G2 unconnected). Add output cap at the regulator.	High
C_DCBLK 33pF	Capacitor	Series RF DC-block at LC29H RF_IN; value 33 pF vs datasheet-specified 100 pF, adding series reactance/insertion loss in the GNSS band. Use 100 pF.	Medium
C_G1 100nF	Capacitor	RESET_N RC filter cap: pin 2 unconnected in the schematic, so no capacitance reaches ground; filter inoperative. Connect pin 2 to GND.	Medium
C_IMU 100nF	Capacitor	LIS2DH12 supply decoupling: pin 1 unconnected in the schematic, pin 2 on GND. Provides no bypass. Connect pin 1 to V3V3 at the IMU.	Medium
C_BIAS 100nF	Capacitor	Antenna bias decoupling on ANT_BIAS; return plate (pin 2) lands on Net-(SW_BOOT-C), which is not a ground net, so the cap has no path to GND. Route pin 2 to GND.	Medium
C_P1 1µF	Capacitor	Battery-node cap: pin 1 on VBAT, pin 2 unconnected in the schematic. Non-functional. Tie pin 2 to GND.	Medium
C_P2 1µF	Capacitor	Battery-node cap: pin 1 unconnected, pin 2 on Net-(SW_BOOT-C) which is not a ground net. Non-functional. Tie a terminal to GND and the other to VBAT.	Medium
L_BIAS 27nH	Inductor	Active-antenna bias inductor ANT_BIAS->ANT_IN; 27 nH is below the LC29H datasheet 68 nH minimum, allowing RF leakage into the supply. Use >=68 nH.	Medium
R_GRST 10kΩ	Resistor	Intended RESET_N pull-up/RC: pin 1 lands on the C_G1 dead-end node (C_G1 other terminal unconnected), so connects to no rail; RESET_N has no idle level. Tie pin 1 to V3V3 and ground C_G1.	Medium
SW_BOOT TS-1187A	Switch	Boot/download button bridges MCU IO0 to Net-(SW_BOOT-C), which is not a ground net; pressing cannot pull IO0 low, so download mode is unreachable. Route common pins to GND.	Medium
C_BAT 4.7µF	Capacitor	Input bypass for AP2112K LDO U_LDO, VBAT to GND; exceeds 1 µF datasheet input recommendation. Correctly wired.	✓
C_L1 1µF	Capacitor	Second input cap on VBAT to GND at U_LDO; meets AP2112K 1 µF input recommendation. Correctly wired.	✓
C_BULK 10µF	Capacitor	Output bulk on V3V3 rail to GND; exceeds AP2112K 1 µF output minimum. Correctly wired.	✓
C_EN 1µF	Capacitor	ESP32-S3 EN delay capacitor to GND; matches typical 1 µF. Correctly wired (R_EN pull-up issue tracked separately).	✓
C_L2 1µF	Capacitor	V3V3 rail decoupling to GND; correctly wired.	✓
C_M1 100nF	Capacitor	V3V3 rail high-frequency decoupling to GND; correctly wired.	✓
C_M2 10µF	Capacitor	V3V3 rail bulk decoupling to GND; correctly wired.	✓
C_VB 100nF	Capacitor	Filter cap on VBAT_SENSE divider output to GND; correctly wired.	✓
C_VBUS 10µF	Capacitor	USBLC6 VBUS-node bulk decoupling to GND; correctly wired.	✓
J_GNSS BWU.FL-IPEX1	Wireless	Passive U.FL/IPEX RF connector (50 Ω, 0-6 GHz): signal on ANT_IN, shell on GND. Correctly wired; requires short 50 Ω controlled-impedance trace at layout.	✓
LED1 XL-1608SYGC-06	Diode	Driven via R_LED (1 kΩ) from MCU IO5; anode (pin 2) to drive side, cathode (pin 1) to GND. ~1 mA, within 20 mA max. Orientation looks consistent — datasheet pin numbering provisional, check against package green mark.	✓
R_GEN 100kΩ	Resistor	Pull-down on GNSS_EN to GND, holds U_PWR GNSS regulator disabled until MCU IO9 drives high. Correct value and direction.	✓
R_LED 1kΩ	Resistor	LED series current-limit from MCU IO5 to LED1 anode; ~1 mA, within 20 mA max. Correctly wired.	✓
R_SCL 4.7kΩ	Resistor	I2C_SCL pull-up to V3V3; standard 4.7 kΩ for 3.3 V I2C. Correctly wired.	✓
R_SDA 4.7kΩ	Resistor	I2C_SDA pull-up to V3V3; standard 4.7 kΩ for 3.3 V I2C. Correctly wired.	✓
R_VB1 1MΩ	Resistor	Top leg of battery-sense divider, VBAT to VBAT_SENSE. Correctly wired; divider only functions once R_VB2 bottom leg is connected.	✓
SW_EN TS-1187A	Switch	Reset button bridges MCU_EN to a GND-bearing net; pressing pulls EN low. Correctly wired.	✓
U_IMU LIS2DH12TR	Sensor	VDD/VDD_IO on 3.3 V (in range); CS tied high = I2C mode, SA0 grounded = address 0x18; I2C and INT1 wired correctly. Only the supply bypass C_IMU is broken (tracked separately).	✓
U_LDO AP2112K-3.3	LDO	VIN from VBAT (3.0-4.2 V, within 2.5-6 V), EN tied to VIN = always-on (acceptable), 3.3 V output on V3V3, grounded, input/output caps meet datasheet. Correctly wired.	✓

11.3 Citations

AI-Assisted —

References
CLT0402B100KQ044 (Ever Ohms) — datasheet datasheet.lcsc.com/datasheet/pdf/034dd70444b6220fe93d5ee6...
BWU.FL-IPEX1 (BAT WIRELESS (Shenzhen Bat Wireless Technology Co., Ltd.)) — datasheet datasheet.lcsc.com/datasheet/pdf/fb4bd9c7691c73329e69e5b9...
TYPE-C 16P 073 (Shenzhen Shouhan Technology Co., Ltd (深圳市首韩科技有限公司)) — datasheet datasheet.lcsc.com/datasheet/pdf/9dda4aa5d404a8a801b6605b...
USBLC6-2SC6 (UMW) — datasheet ae0ae23eb9505e9b.pdf
XL-1608SYGC-06 (XINGLIGHT) — datasheet datasheet.lcsc.com/datasheet/pdf/db39074692074ba57d43d76e...

12 Designer Annotated Nets

No designer-annotated nets found.

13 EMC & ESD Protection Checks

Shielded connectors were not found in this design so EMC checks were not performed.

14 Design-for-Test

Design for Testability (DFT) analysis for ICT/bed-of-nails test coverage.

14.1 DFx Options Selected

Option	Setting	Description
Test Point Insertion
Insert on power rails	Yes	Place test points on power rail nets in schematic
Insert on all nets	No	Extend TP insertion to signal nets beyond power rails
Exclude HSSI nets	Yes	Exclude HSSI/differential pair nets from TP insertion
Exclude DRAM nets	Yes	Exclude SDRAM/DDR nets from TP insertion
Exclude BSCAN opens (full)	Yes	Exclude nets with 100% boundary scan opens coverage
Exclude BSCAN opens (partial)	No	Exclude nets with partial boundary scan opens coverage
Exclude BSCAN shorts	No	Exclude nets with boundary scan shorts coverage
GND test points	6	Number of GND test points to insert for BON fixture ground connections
Target PCOLA-SOQ	0%	Insert TPs in priority order until this PCOLA-SOQ % is reached
Target fault coverage	0%	Insert TPs in priority order until this shorts/opens fault coverage % is reached
Kelvin min resistance	0.000 ohm	Lower bound (ohms) for Kelvin 4-wire TP insertion range
Kelvin max resistance	1.000 ohm	Upper bound (ohms) for Kelvin 4-wire TP insertion range
Tester Styles
Optical	AOI	Automated Optical Inspection of visible solder joints
AXI	Yes	Automated X-ray Inspection of hidden solder joints (BGA, QFN)
ATE	All_in_one	Powered-off tests, BSCAN, LSSI (I2C, UART, SPI), discrete digital, powered-on analog
Test Access
JTAG/LSSI Connector	Yes	Connector access to JTAG, SPI, I2C buses
IO Connectors	No	IO connectors available for external stimulus/observation
TP Access	Bon	Bed-of-nails fixture access to PCB test points
Test Point Identification
BON TP refdes	TP#,TP-,TP_,TP#*	Refdes patterns identifying BON test points
BON TP footprints	*	All footprints accepted
FP TP refdes	TP#,TP-,TP_,TP#*,MP#	Refdes patterns identifying flying probe test points
FP TP footprints	*	All footprints accepted
Loopback	None	No loopback cables
Test Types
Powered-Off Shorts/Opens	Yes	Unpowered shorts and opens detection via probe access
Passives	Yes	R, C, L value measurement via probe or fixture access
Active Analog	Yes	Voltage regulator, reference, and op-amp output verification
Non-BSCAN Digital	Yes	Digital ICs without boundary scan: pin observability analysis
Boundary Scan	1149.x	IEEE 1149.1-2013 / 1149.6-2015 / 1149.10-2017 full boundary scan suite
LSSI	Yes	JTAG chain, SPI, I2C, UART bus test coverage analysis
JTAG Functional	Yes	Functional verification beyond structural scan
Require Rail TPs for Diode Test	No	Require TPs on all IO power rails for ESD diode opens test (default: basic test with GND TP only)
Capacitance Probe Plate Target Devices	—	Refdes or footprint patterns for capacitance probe plate targets (ICs and vertical connectors)
Use Boundary Scan for Capacitance Probe Plate Stimulus	No	Count boundary scan drive cells on other devices as valid stimulus for the capacitance probe plate (applicable to VTEP / IEEE 1149.8.1-capable hardware)
NVM Programming
Default Method	Direct	Program via direct pin access; TPs on flash data/control lines
Environment
Test environment	volume_production	Volume production: fixture-based, AOI/AXI, throughput-optimized

14.2 Power Rail Test Point Check

Power rails found	3
Rails with TPs	0
Rails without TPs	3

3 power rail(s) need test points in the submitted design.

4 test point(s) inserted in modified output. Download modified schematics to see placements.

Power Rail Coverage
Net Name	Annotation	Test Point	Status
VBAT		-	NEEDS TP
VBAT_SENSE		-	NEEDS TP
VBUS		-	NEEDS TP

Inserted Test Points (Modified Output)
Test Point	Net	Sheet
TP2	VBAT	Untitled.kicad_sch
TP3	VBAT_SENSE	Untitled.kicad_sch
TP4	VBUS	Untitled.kicad_sch

Signal Net Test Points (Modified Output)
Test Point	Net	Sheet
TP1	GND	Untitled.kicad_sch

14.3 Kelvin Test Points Check

Threshold	0.000 < R ≤ 1.000 Ω
Current sense resistors found	0

No current sense resistors found in range (0 < R < 1.000 ohm).

14.4 Current Test Points

Total test points

No test points found in design.

14.5 Powered-off Testing

No nets with BON test points detected.

14.6 Powered-on Testing

No power rail nets have BON test points.

14.7 Boundary Scan Testability

No boundary scan capable devices were found in this design.

14.8 Inspection

Total: 79 components, 0 of 255 pins with inspection coverage.

14.8.1 Unclassified Components

Footprint	Classification	Method	Count	Pins	Refdes
These components could not be classified for inspection. The library model lacks a Pkg Type property and the footprint name is not IPC-7351B or IPC-7251.
B# (no footprint)	Unclassified	Unknown	2	2	BAT_N, BAT_P
C# (no footprint)	Unclassified	Unknown	17	34	C_BAT, C_BIAS, C_BULK, C_CHG, C_DCBLK, C_EN, C_G1, C_G2 ...+9 more
G# (no footprint)	Unclassified	Unknown	20	20	GND, GND, GND, GND, GND, GND, GND, GND ...+12 more
J# (no footprint)	Unclassified	Unknown	2	19	J_GNSS, J_USB
L# (no footprint)	Unclassified	Unknown	2	4	LED1, L_BIAS
R# (no footprint)	Unclassified	Unknown	11	22	R_CC1, R_CC2, R_EN, R_GEN, R_GRST, R_LED, R_PROG, R_SCL ...+3 more
S# (no footprint)	Unclassified	Unknown	2	8	SW_BOOT, SW_EN
U# (no footprint)	Unclassified	Unknown	7	130	U_CHG, U_ESD, U_GNSS, U_IMU, U_LDO, U_MCU, U_PWR
V# (no footprint)	Unclassified	Unknown	16	16	V3V3, V3V3, V3V3, V3V3, V3V3, V3V3, V3V3_GNSS, V3V3_GNSS ...+8 more
Subtotal: 79 components, 255 pins

14.9 Pin Fault Coverage

Predicted status of each pin for shorts and opens based on DFx options selected in section 13.1.

14.9.1 Fault Coverage Summary

Fault Coverage Summary (255 pins)
Test Method	Opens	Shorts
X-ray (AXI)	0 (0.0%)	0 (0.0%)
Optical (AOI)	0 (0.0%)	0 (0.0%)
Electrical
Powered-off Testing	0 (0.0%)	0 (0.0%)
Boundary Scan	0 (0.0%)	0 (0.0%)
LSSI	-	-
Total	0 (0.0%)	5 (2.0%)
Total Fault Coverage	0 (0.0%)	5 (2.0%)
No coverage	255 (100.0%)	250 (98.0%)

14.9.2 Uncovered Pins (250)

Pin ⇅	Net ⇅
These pins have no electrical, optical, or X-ray test coverage even with all available test techniques applied.
J_USB_1
J_USB_2
J_USB_3
J_USB_4
J_USB_5
J_USB_6
J_USB_7
J_USB_8
J_USB_9
J_USB_10
J_USB_11
J_USB_12
J_USB_13	Net-(J_USB-EH1)
J_USB_14	Net-(J_USB-EH1)
J_USB_15	Net-(J_USB-EH1)
J_USB_16	Net-(J_USB-EH1)
U_ESD_1	USB_DM
U_ESD_2	Net-(U_CHG-VSS)
U_ESD_3	USB_DP
U_ESD_4	USB_DP
U_ESD_5	Net-(U_ESD-VBUS)
U_ESD_6	USB_DM
R_CC1_1	CC1
R_CC1_2	Net-(U_GNSS-GND2)
R_CC2_1	CC2
R_CC2_2
U_MCU_1	Net-(U_GNSS-GND2)
U_MCU_2	Net-(U_GNSS-GND2)
U_MCU_3	V3V3
U_MCU_4	MCU_BOOT
U_MCU_5	I2C_SDA
U_MCU_6	I2C_SCL
U_MCU_7	IMU_INT
U_MCU_8	PPS
U_MCU_9	LED_CTRL
U_MCU_10	CHG_STAT
U_MCU_12	GNSS_RST
U_MCU_13	GNSS_EN
U_MCU_14
U_MCU_15
U_MCU_16
U_MCU_17
U_MCU_18
U_MCU_19
U_MCU_20
U_MCU_21	GNSS_RXD
U_MCU_22	GNSS_TXD
U_MCU_23	USB_DM
U_MCU_24	USB_DP
U_MCU_25
U_MCU_26
U_MCU_27
U_MCU_28
U_MCU_29
U_MCU_30
U_MCU_31
U_MCU_32
U_MCU_33
U_MCU_34
U_MCU_35
U_MCU_36
U_MCU_37
U_MCU_38
U_MCU_39
U_MCU_40
U_MCU_41
U_MCU_42	Net-(U_CHG-VSS)
U_MCU_43	Net-(U_CHG-VSS)
U_MCU_44
U_MCU_45	MCU_EN
U_MCU_46	Net-(U_CHG-VSS)
U_MCU_47	Net-(U_CHG-VSS)
U_MCU_48	Net-(U_CHG-VSS)
U_MCU_49	Net-(U_CHG-VSS)
U_MCU_50	Net-(U_CHG-VSS)
U_MCU_51	Net-(U_CHG-VSS)
U_MCU_52	Net-(U_CHG-VSS)
U_MCU_53	Net-(U_CHG-VSS)
U_MCU_54	Net-(U_CHG-VSS)
U_MCU_55	Net-(U_CHG-VSS)
U_MCU_56	Net-(U_CHG-VSS)
U_MCU_57	Net-(U_CHG-VSS)
U_MCU_58	Net-(U_CHG-VSS)
U_MCU_59	Net-(U_CHG-VSS)
U_MCU_60	Net-(U_CHG-VSS)
U_MCU_61	Net-(U_CHG-VSS)
U_MCU_62	Net-(U_CHG-VSS)
U_MCU_63	Net-(U_CHG-VSS)
U_MCU_64	Net-(U_CHG-VSS)
U_MCU_65	Net-(U_CHG-VSS)
U_MCU_66	Net-(U_CHG-VSS)
U_MCU_67	Net-(U_CHG-VSS)
U_MCU_68	Net-(U_CHG-VSS)
U_MCU_69	Net-(U_CHG-VSS)
U_MCU_70	Net-(U_CHG-VSS)
U_MCU_71	Net-(U_CHG-VSS)
U_MCU_72	Net-(U_CHG-VSS)
U_MCU_73	Net-(U_CHG-VSS)
U_IMU_1	I2C_SCL
U_IMU_2	V3V3
U_IMU_3	Net-(U_CHG-VSS)
U_IMU_4	I2C_SDA
U_IMU_5	Net-(U_CHG-VSS)
U_IMU_6	Net-(U_CHG-VSS)
U_IMU_7	Net-(U_IMU-GND2)
U_IMU_8	Net-(U_IMU-GND2)
U_IMU_9	Net-(U_IMU-VDD_IO)
U_IMU_10	Net-(U_IMU-VDD_IO)
U_IMU_11
U_IMU_12	IMU_INT
R_SDA_1	Net-(R_SCL-Pad1)
R_SDA_2	I2C_SDA
R_SCL_1	Net-(R_SCL-Pad1)
R_SCL_2	I2C_SCL
C_IMU_1
C_IMU_2	Net-(C_IMU-Pad2)
J_GNSS_1	ANT_IN
J_GNSS_2	Net-(C_IMU-Pad2)
J_GNSS_3	GND
L_BIAS_1	ANT_BIAS
L_BIAS_2	ANT_IN
C_DCBLK_1	ANT_IN
C_DCBLK_2	RF_GNSS
C_BIAS_1	ANT_BIAS
C_BIAS_2	Net-(SW_BOOT-C)
U_GNSS_1
U_GNSS_2
U_GNSS_3	PPS
U_GNSS_4
U_GNSS_5
U_GNSS_6
U_GNSS_7
U_GNSS_8	GNSS_RST
U_GNSS_9	V3V3_GNSS
U_GNSS_10	Net-(U_GNSS-GND4)
U_GNSS_11	RF_GNSS
U_GNSS_12	Net-(U_GNSS-GND4)
U_GNSS_13	Net-(U_GNSS-GND2)
U_GNSS_14	ANT_BIAS
U_GNSS_15
U_GNSS_16
U_GNSS_17
U_GNSS_18
U_GNSS_19
U_GNSS_20	GNSS_TXD
U_GNSS_21	GNSS_RXD
U_GNSS_22	V3V3
U_GNSS_23	V3V3_GNSS
U_GNSS_24	Net-(U_GNSS-GND2)
R_GRST_1	Net-(C_G1-Pad1)
R_GRST_2	GNSS_RST
U_PWR_2	GND
U_PWR_3	GNSS_EN
U_PWR_4
U_PWR_5	V3V3_GNSS
R_GEN_1	GNSS_EN
R_GEN_2	Net-(GND-Pad1)
R_LED_1	LED_CTRL
R_LED_2	LED_A
LED1_1	Net-(BAT_N-Pad1)
LED1_2	LED_A
R_VB1_2	Net-(C_VB-Pad1)
R_VB2_1
R_VB2_2	Net-(GND-Pad1)
C_VB_1	Net-(C_VB-Pad1)
C_VB_2	Net-(C_EN-Pad2)
U_CHG_1	CHG_STAT
U_CHG_2	Net-(U_CHG-VSS)
U_CHG_5	PROG
R_PROG_1	PROG
R_PROG_2
U_LDO_1	Net-(U_LDO-VIN)
U_LDO_2	Net-(U_LDO-GND)
U_LDO_3	Net-(U_LDO-VIN)
U_LDO_4
U_LDO_5	V3V3
SW_EN_1	MCU_EN
SW_EN_2	MCU_EN
SW_EN_3	Net-(SW_EN-C)
SW_EN_4	Net-(SW_EN-C)
SW_BOOT_1	MCU_BOOT
SW_BOOT_2	MCU_BOOT
SW_BOOT_3	Net-(SW_BOOT-C)
SW_BOOT_4	Net-(SW_BOOT-C)
R_EN_1
R_EN_2	MCU_EN
C_EN_1	MCU_EN
C_EN_2	Net-(C_EN-Pad2)
C_M1_1	Net-(C_L2-Pad1)
C_M1_2	Net-(C_L2-Pad2)
C_M2_1	Net-(C_BULK-Pad1)
C_M2_2	Net-(C_BULK-Pad2)
C_G1_1	Net-(C_G1-Pad1)
C_G1_2
C_G2_1
C_G2_2
C_P1_1	Net-(BAT_P-Pad1)
C_P1_2
C_P2_1
C_P2_2	Net-(SW_BOOT-C)
C_L1_1	Net-(C_BAT-Pad1)
C_L1_2	Net-(U_LDO-GND)
C_L2_1	Net-(C_L2-Pad1)
C_L2_2	Net-(C_L2-Pad2)
C_BULK_1	Net-(C_BULK-Pad1)
C_BULK_2	Net-(C_BULK-Pad2)
C_BAT_1	Net-(C_BAT-Pad1)
C_BAT_2	Net-(U_LDO-GND)
C_CHG_1
C_CHG_2	Net-(C_CHG-Pad2)
C_VBUS_1	Net-(U_ESD-VBUS)
C_VBUS_2	Net-(C_CHG-Pad2)
BAT_P_1	Net-(BAT_P-Pad1)
BAT_N_1	Net-(BAT_N-Pad1)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
GND_1	Net-(U_GNSS-GND2)
VBUS_1
VBUS_1
V3V3_1	Net-(U_IMU-VDD_IO)
V3V3_1	Net-(U_IMU-VDD_IO)
V3V3_1	Net-(U_IMU-VDD_IO)
V3V3_1	Net-(U_IMU-VDD_IO)
V3V3_1	Net-(U_IMU-VDD_IO)
V3V3_1	Net-(U_IMU-VDD_IO)
VBAT_SENSE_1	Net-(C_VB-Pad1)
VBAT_SENSE_1	Net-(C_VB-Pad1)
V3V3_GNSS_1
V3V3_GNSS_1
V3V3_GNSS_1
VBAT_1	Net-(BAT_P-Pad1)
VBAT_1	Net-(BAT_P-Pad1)
VBAT_1	Net-(BAT_P-Pad1)

14.9.3 Per-Pin Coverage Matrix

● = Detected ◐ = Partially detected - = Not tested | E = Electrical (ICT/flying probe) O = Optical (AOI) X = X-ray (AXI)

Pin ⇅	Net ⇅	E Opens ⇅	E Shorts ⇅	O Opens ⇅	O Shorts ⇅	X Opens ⇅	X Shorts ⇅
J_USB_1		-	-	-	-	-	-
J_USB_2		-	-	-	-	-	-
J_USB_3		-	-	-	-	-	-
J_USB_4		-	-	-	-	-	-
J_USB_5		-	-	-	-	-	-
J_USB_6		-	-	-	-	-	-
J_USB_7		-	-	-	-	-	-
J_USB_8		-	-	-	-	-	-
J_USB_9		-	-	-	-	-	-
J_USB_10		-	-	-	-	-	-
J_USB_11		-	-	-	-	-	-
J_USB_12		-	-	-	-	-	-
J_USB_13	Net-(J_USB-EH1)	-	-	-	-	-	-
J_USB_14	Net-(J_USB-EH1)	-	-	-	-	-	-
J_USB_15	Net-(J_USB-EH1)	-	-	-	-	-	-
J_USB_16	Net-(J_USB-EH1)	-	-	-	-	-	-
U_ESD_1	USB_DM	-	-	-	-	-	-
U_ESD_2	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_ESD_3	USB_DP	-	-	-	-	-	-
U_ESD_4	USB_DP	-	-	-	-	-	-
U_ESD_5	Net-(U_ESD-VBUS)	-	-	-	-	-	-
U_ESD_6	USB_DM	-	-	-	-	-	-
R_CC1_1	CC1	-	-	-	-	-	-
R_CC1_2	Net-(U_GNSS-GND2)	-	-	-	-	-	-
R_CC2_1	CC2	-	-	-	-	-	-
R_CC2_2		-	-	-	-	-	-
U_MCU_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
U_MCU_2	Net-(U_GNSS-GND2)	-	-	-	-	-	-
U_MCU_3	V3V3	-	-	-	-	-	-
U_MCU_4	MCU_BOOT	-	-	-	-	-	-
U_MCU_5	I2C_SDA	-	-	-	-	-	-
U_MCU_6	I2C_SCL	-	-	-	-	-	-
U_MCU_7	IMU_INT	-	-	-	-	-	-
U_MCU_8	PPS	-	-	-	-	-	-
U_MCU_9	LED_CTRL	-	-	-	-	-	-
U_MCU_10	CHG_STAT	-	-	-	-	-	-
U_MCU_11	VBAT_SENSE	-	●	-	-	-	-
U_MCU_12	GNSS_RST	-	-	-	-	-	-
U_MCU_13	GNSS_EN	-	-	-	-	-	-
U_MCU_14		-	-	-	-	-	-
U_MCU_15		-	-	-	-	-	-
U_MCU_16		-	-	-	-	-	-
U_MCU_17		-	-	-	-	-	-
U_MCU_18		-	-	-	-	-	-
U_MCU_19		-	-	-	-	-	-
U_MCU_20		-	-	-	-	-	-
U_MCU_21	GNSS_RXD	-	-	-	-	-	-
U_MCU_22	GNSS_TXD	-	-	-	-	-	-
U_MCU_23	USB_DM	-	-	-	-	-	-
U_MCU_24	USB_DP	-	-	-	-	-	-
U_MCU_25		-	-	-	-	-	-
U_MCU_26		-	-	-	-	-	-
U_MCU_27		-	-	-	-	-	-
U_MCU_28		-	-	-	-	-	-
U_MCU_29		-	-	-	-	-	-
U_MCU_30		-	-	-	-	-	-
U_MCU_31		-	-	-	-	-	-
U_MCU_32		-	-	-	-	-	-
U_MCU_33		-	-	-	-	-	-
U_MCU_34		-	-	-	-	-	-
U_MCU_35		-	-	-	-	-	-
U_MCU_36		-	-	-	-	-	-
U_MCU_37		-	-	-	-	-	-
U_MCU_38		-	-	-	-	-	-
U_MCU_39		-	-	-	-	-	-
U_MCU_40		-	-	-	-	-	-
U_MCU_41		-	-	-	-	-	-
U_MCU_42	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_43	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_44		-	-	-	-	-	-
U_MCU_45	MCU_EN	-	-	-	-	-	-
U_MCU_46	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_47	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_48	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_49	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_50	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_51	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_52	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_53	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_54	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_55	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_56	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_57	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_58	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_59	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_60	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_61	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_62	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_63	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_64	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_65	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_66	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_67	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_68	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_69	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_70	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_71	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_72	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_MCU_73	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_IMU_1	I2C_SCL	-	-	-	-	-	-
U_IMU_2	V3V3	-	-	-	-	-	-
U_IMU_3	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_IMU_4	I2C_SDA	-	-	-	-	-	-
U_IMU_5	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_IMU_6	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_IMU_7	Net-(U_IMU-GND2)	-	-	-	-	-	-
U_IMU_8	Net-(U_IMU-GND2)	-	-	-	-	-	-
U_IMU_9	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
U_IMU_10	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
U_IMU_11		-	-	-	-	-	-
U_IMU_12	IMU_INT	-	-	-	-	-	-
R_SDA_1	Net-(R_SCL-Pad1)	-	-	-	-	-	-
R_SDA_2	I2C_SDA	-	-	-	-	-	-
R_SCL_1	Net-(R_SCL-Pad1)	-	-	-	-	-	-
R_SCL_2	I2C_SCL	-	-	-	-	-	-
C_IMU_1		-	-	-	-	-	-
C_IMU_2	Net-(C_IMU-Pad2)	-	-	-	-	-	-
J_GNSS_1	ANT_IN	-	-	-	-	-	-
J_GNSS_2	Net-(C_IMU-Pad2)	-	-	-	-	-	-
J_GNSS_3	GND	-	-	-	-	-	-
L_BIAS_1	ANT_BIAS	-	-	-	-	-	-
L_BIAS_2	ANT_IN	-	-	-	-	-	-
C_DCBLK_1	ANT_IN	-	-	-	-	-	-
C_DCBLK_2	RF_GNSS	-	-	-	-	-	-
C_BIAS_1	ANT_BIAS	-	-	-	-	-	-
C_BIAS_2	Net-(SW_BOOT-C)	-	-	-	-	-	-
U_GNSS_1		-	-	-	-	-	-
U_GNSS_2		-	-	-	-	-	-
U_GNSS_3	PPS	-	-	-	-	-	-
U_GNSS_4		-	-	-	-	-	-
U_GNSS_5		-	-	-	-	-	-
U_GNSS_6		-	-	-	-	-	-
U_GNSS_7		-	-	-	-	-	-
U_GNSS_8	GNSS_RST	-	-	-	-	-	-
U_GNSS_9	V3V3_GNSS	-	-	-	-	-	-
U_GNSS_10	Net-(U_GNSS-GND4)	-	-	-	-	-	-
U_GNSS_11	RF_GNSS	-	-	-	-	-	-
U_GNSS_12	Net-(U_GNSS-GND4)	-	-	-	-	-	-
U_GNSS_13	Net-(U_GNSS-GND2)	-	-	-	-	-	-
U_GNSS_14	ANT_BIAS	-	-	-	-	-	-
U_GNSS_15		-	-	-	-	-	-
U_GNSS_16		-	-	-	-	-	-
U_GNSS_17		-	-	-	-	-	-
U_GNSS_18		-	-	-	-	-	-
U_GNSS_19		-	-	-	-	-	-
U_GNSS_20	GNSS_TXD	-	-	-	-	-	-
U_GNSS_21	GNSS_RXD	-	-	-	-	-	-
U_GNSS_22	V3V3	-	-	-	-	-	-
U_GNSS_23	V3V3_GNSS	-	-	-	-	-	-
U_GNSS_24	Net-(U_GNSS-GND2)	-	-	-	-	-	-
R_GRST_1	Net-(C_G1-Pad1)	-	-	-	-	-	-
R_GRST_2	GNSS_RST	-	-	-	-	-	-
U_PWR_1	VBAT	-	●	-	-	-	-
U_PWR_2	GND	-	-	-	-	-	-
U_PWR_3	GNSS_EN	-	-	-	-	-	-
U_PWR_4		-	-	-	-	-	-
U_PWR_5	V3V3_GNSS	-	-	-	-	-	-
R_GEN_1	GNSS_EN	-	-	-	-	-	-
R_GEN_2	Net-(GND-Pad1)	-	-	-	-	-	-
R_LED_1	LED_CTRL	-	-	-	-	-	-
R_LED_2	LED_A	-	-	-	-	-	-
LED1_1	Net-(BAT_N-Pad1)	-	-	-	-	-	-
LED1_2	LED_A	-	-	-	-	-	-
R_VB1_1	VBAT	-	●	-	-	-	-
R_VB1_2	Net-(C_VB-Pad1)	-	-	-	-	-	-
R_VB2_1		-	-	-	-	-	-
R_VB2_2	Net-(GND-Pad1)	-	-	-	-	-	-
C_VB_1	Net-(C_VB-Pad1)	-	-	-	-	-	-
C_VB_2	Net-(C_EN-Pad2)	-	-	-	-	-	-
U_CHG_1	CHG_STAT	-	-	-	-	-	-
U_CHG_2	Net-(U_CHG-VSS)	-	-	-	-	-	-
U_CHG_3	VBAT	-	●	-	-	-	-
U_CHG_4	VBUS	-	●	-	-	-	-
U_CHG_5	PROG	-	-	-	-	-	-
R_PROG_1	PROG	-	-	-	-	-	-
R_PROG_2		-	-	-	-	-	-
U_LDO_1	Net-(U_LDO-VIN)	-	-	-	-	-	-
U_LDO_2	Net-(U_LDO-GND)	-	-	-	-	-	-
U_LDO_3	Net-(U_LDO-VIN)	-	-	-	-	-	-
U_LDO_4		-	-	-	-	-	-
U_LDO_5	V3V3	-	-	-	-	-	-
SW_EN_1	MCU_EN	-	-	-	-	-	-
SW_EN_2	MCU_EN	-	-	-	-	-	-
SW_EN_3	Net-(SW_EN-C)	-	-	-	-	-	-
SW_EN_4	Net-(SW_EN-C)	-	-	-	-	-	-
SW_BOOT_1	MCU_BOOT	-	-	-	-	-	-
SW_BOOT_2	MCU_BOOT	-	-	-	-	-	-
SW_BOOT_3	Net-(SW_BOOT-C)	-	-	-	-	-	-
SW_BOOT_4	Net-(SW_BOOT-C)	-	-	-	-	-	-
R_EN_1		-	-	-	-	-	-
R_EN_2	MCU_EN	-	-	-	-	-	-
C_EN_1	MCU_EN	-	-	-	-	-	-
C_EN_2	Net-(C_EN-Pad2)	-	-	-	-	-	-
C_M1_1	Net-(C_L2-Pad1)	-	-	-	-	-	-
C_M1_2	Net-(C_L2-Pad2)	-	-	-	-	-	-
C_M2_1	Net-(C_BULK-Pad1)	-	-	-	-	-	-
C_M2_2	Net-(C_BULK-Pad2)	-	-	-	-	-	-
C_G1_1	Net-(C_G1-Pad1)	-	-	-	-	-	-
C_G1_2		-	-	-	-	-	-
C_G2_1		-	-	-	-	-	-
C_G2_2		-	-	-	-	-	-
C_P1_1	Net-(BAT_P-Pad1)	-	-	-	-	-	-
C_P1_2		-	-	-	-	-	-
C_P2_1		-	-	-	-	-	-
C_P2_2	Net-(SW_BOOT-C)	-	-	-	-	-	-
C_L1_1	Net-(C_BAT-Pad1)	-	-	-	-	-	-
C_L1_2	Net-(U_LDO-GND)	-	-	-	-	-	-
C_L2_1	Net-(C_L2-Pad1)	-	-	-	-	-	-
C_L2_2	Net-(C_L2-Pad2)	-	-	-	-	-	-
C_BULK_1	Net-(C_BULK-Pad1)	-	-	-	-	-	-
C_BULK_2	Net-(C_BULK-Pad2)	-	-	-	-	-	-
C_BAT_1	Net-(C_BAT-Pad1)	-	-	-	-	-	-
C_BAT_2	Net-(U_LDO-GND)	-	-	-	-	-	-
C_CHG_1		-	-	-	-	-	-
C_CHG_2	Net-(C_CHG-Pad2)	-	-	-	-	-	-
C_VBUS_1	Net-(U_ESD-VBUS)	-	-	-	-	-	-
C_VBUS_2	Net-(C_CHG-Pad2)	-	-	-	-	-	-
BAT_P_1	Net-(BAT_P-Pad1)	-	-	-	-	-	-
BAT_N_1	Net-(BAT_N-Pad1)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
GND_1	Net-(U_GNSS-GND2)	-	-	-	-	-	-
VBUS_1		-	-	-	-	-	-
VBUS_1		-	-	-	-	-	-
V3V3_1	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
V3V3_1	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
V3V3_1	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
V3V3_1	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
V3V3_1	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
V3V3_1	Net-(U_IMU-VDD_IO)	-	-	-	-	-	-
VBAT_SENSE_1	Net-(C_VB-Pad1)	-	-	-	-	-	-
VBAT_SENSE_1	Net-(C_VB-Pad1)	-	-	-	-	-	-
V3V3_GNSS_1		-	-	-	-	-	-
V3V3_GNSS_1		-	-	-	-	-	-
V3V3_GNSS_1		-	-	-	-	-	-
VBAT_1	Net-(BAT_P-Pad1)	-	-	-	-	-	-
VBAT_1	Net-(BAT_P-Pad1)	-	-	-	-	-	-
VBAT_1	Net-(BAT_P-Pad1)	-	-	-	-	-	-

14.10 PCOLA/SOQ Fault Coverage

PCOLA/SOQ scores how well the configured test methods cover each component and each connection. PCOLA evaluates five device-level properties: Presence, Correctness, Orientation, Live (functional), and Alignment. SOQ evaluates three connection-level properties: Shorts detection, Opens detection, and solder joint Quality. Scores are on a 0–100,000 scale where 100,000 means every property is fully covered. The Combined score is the average of PCOLA and SOQ.

14.10.1 Coverage by Test Method

P=Presence C=Correctness O=Orientation L=Live A=Alignment | S=Shorts O(pins)=Opens Q=Quality

Test Method	P	C	O	L	A	S	Opens	Solder Quality
PCOLA/SOQ coverage scores by test method. Scores: 0 (None), 0.5 (Partial), 1.0 (Full).
Electrical Test	4.1%	0.0%	0.0%	0.0%	0.0%	1.1%	0.0%	0.0%
Optical Inspection (AOI)	0.0%	0.0%	0.0%	0.0%	0.0%	0.0%	0.0%	0.0%
X-Ray Inspection (AXI)	0.0%	0.0%	0.0%	0.0%	0.0%	0.0%	0.0%	0.0%
Combined	4.1%	0.0%	0.0%	0.0%	0.0%	1.1%	0.0%	0.0%

14.10.2 PCB Device/Pin Count

Devices (PCOLA): 49
Pins (SOQ): 225

14.10.3 Board-Level Scores

Board-Level Coverage (0 – 100,000 scale)
Dimension	Score	Coverage
PCOLA	816 / 100,000	0.8%
SOQ	370 / 100,000	0.4%
Combined	593 / 100,000	0.6%

Electrical vs Inspection
Source	PCOLA Score	SOQ Score
Electrical Test	816 / 100,000	370 / 100,000
Optical/X-ray Inspection	0 / 100,000	0 / 100,000
Combined (max)	816 / 100,000	370 / 100,000

14.10.4 PCOLA (49 devices)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0) — = N/A (excluded)
* Footprint not IPC-7351B/7251 compliant — no inspection coverage scored

Score ⇅	RefDes ⇅	Type / Footprint ⇅	Class ⇅	P ⇅	C ⇅	O ⇅	L ⇅	A ⇅	Method ⇅
10%	U_MCU	ESP32_S3_MINI_1_N8 / U# (no footprint) *	Other	◐	○	○	○	○	Powered_Off
10%	R_VB1	1MΩ / R# (no footprint) *	Other	◐	○	○	○	○	Powered_Off
10%	U_PWR	AP2112K_3_3TRG1 / U# (no footprint) *	Other	◐	○	○	○	○	Powered_Off
10%	U_CHG	MCP73831T_2ACI_OT / U# (no footprint) *	Other	◐	○	○	○	○	Powered_Off
0%	J_USB	TYPE_C_16PIN_2MD_073_ / J# (no footprint) *	Other	○	○	○	○	○
0%	U_ESD	USBLC6_2SC6 / U# (no footprint) *	Other	○	○	○	○	○
0%	R_CC1	5.1kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	R_CC2	5.1kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	U_IMU	LIS2DH12TR / U# (no footprint) *	Other	○	○	○	○	○
0%	R_SDA	4.7kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	R_SCL	4.7kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	C_IMU	100nF / C# (no footprint) *	Other	○	○	○	○	○
0%	J_GNSS	BWU_FL_IPEX1 / J# (no footprint) *	Other	○	○	○	○	○
0%	L_BIAS	27nH / L# (no footprint) *	Other	○	○	○	○	○
0%	C_DCBLK	33pF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_BIAS	100nF / C# (no footprint) *	Other	○	○	○	○	○
0%	U_GNSS	LC29HDAMD / U# (no footprint) *	Other	○	○	○	○	○
0%	R_GRST	10kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	R_GEN	100kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	R_LED	1kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	LED1	XL_1608SYGC_06 / L# (no footprint) *	Other	○	○	○	○	○
0%	R_VB2	1MΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	C_VB	100nF / C# (no footprint) *	Other	○	○	○	○	○
0%	R_PROG	2kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	U_LDO	AP2112K_3_3TRG1 / U# (no footprint) *	Other	○	○	○	○	○
0%	SW_EN	TS_1187A_B_A_B / S# (no footprint) *	Other	○	○	○	○	○
0%	SW_BOOT	TS_1187A_B_A_B / S# (no footprint) *	Other	○	○	○	○	○
0%	R_EN	10kΩ / R# (no footprint) *	Other	○	○	○	○	○
0%	C_EN	1uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_M1	100nF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_M2	10uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_G1	100nF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_G2	10uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_P1	1uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_P2	1uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_L1	1uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_L2	1uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_BULK	10uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_BAT	4.7uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_CHG	4.7uF / C# (no footprint) *	Other	○	○	○	○	○
0%	C_VBUS	10uF / C# (no footprint) *	Other	○	○	○	○	○
0%	BAT_P	U_chip / B# (no footprint) *	Other	○	○	○	○	○
0%	BAT_N	U_chip / B# (no footprint) *	Other	○	○	○	○	○
0%	GND	rail_down / G# (no footprint) *	Other	○	○	○	○	○
0%	VBUS	rail_up / V# (no footprint) *	Other	○	○	○	○	○
0%	V3V3	rail_up / V# (no footprint) *	Other	○	○	○	○	○
0%	VBAT_SENSE	rail_up / V# (no footprint) *	Other	○	○	○	○	○
0%	V3V3_GNSS	rail_up / V# (no footprint) *	Other	○	○	○	○	○
0%	VBAT	rail_up / V# (no footprint) *	Other	○	○	○	○	○

14.10.5 SOQ (225 pins)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0)

Score ⇅	Pin ⇅	Net ⇅	S ⇅	O ⇅	Q ⇅
17%	U_MCU_11	VBAT_SENSE	◐	○	○
17%	U_PWR_1	VBAT	◐	○	○
17%	R_VB1_1	VBAT	◐	○	○
17%	U_CHG_3	VBAT	◐	○	○
17%	U_CHG_4	VBUS	◐	○	○
0%	J_USB_5		○	○	○
0%	J_USB_6		○	○	○
0%	J_USB_7		○	○	○
0%	J_USB_8		○	○	○
0%	J_USB_9		○	○	○
0%	J_USB_10		○	○	○
0%	J_USB_11		○	○	○
0%	J_USB_12		○	○	○
0%	J_USB_13	Net-(J_USB-EH1)	○	○	○
0%	J_USB_14	Net-(J_USB-EH1)	○	○	○
0%	J_USB_15	Net-(J_USB-EH1)	○	○	○
0%	J_USB_16	Net-(J_USB-EH1)	○	○	○
0%	U_ESD_1	USB_DM	○	○	○
0%	U_ESD_2	Net-(U_CHG-VSS)	○	○	○
0%	U_ESD_3	USB_DP	○	○	○
0%	U_ESD_4	USB_DP	○	○	○
0%	U_ESD_5	Net-(U_ESD-VBUS)	○	○	○
0%	U_ESD_6	USB_DM	○	○	○
0%	R_CC1_1	CC1	○	○	○
0%	R_CC1_2	Net-(U_GNSS-GND2)	○	○	○
0%	R_CC2_1	CC2	○	○	○
0%	R_CC2_2		○	○	○
0%	U_MCU_1	Net-(U_GNSS-GND2)	○	○	○
0%	U_MCU_2	Net-(U_GNSS-GND2)	○	○	○
0%	U_MCU_3	V3V3	○	○	○
0%	U_MCU_4	MCU_BOOT	○	○	○
0%	U_MCU_5	I2C_SDA	○	○	○
0%	U_MCU_6	I2C_SCL	○	○	○
0%	U_MCU_7	IMU_INT	○	○	○
0%	U_MCU_8	PPS	○	○	○
0%	U_MCU_9	LED_CTRL	○	○	○
0%	U_MCU_10	CHG_STAT	○	○	○
0%	U_MCU_12	GNSS_RST	○	○	○
0%	U_MCU_13	GNSS_EN	○	○	○
0%	U_MCU_14		○	○	○
0%	U_MCU_15		○	○	○
0%	U_MCU_16		○	○	○
0%	U_MCU_17		○	○	○
0%	U_MCU_18		○	○	○
0%	U_MCU_19		○	○	○
0%	U_MCU_20		○	○	○
0%	U_MCU_21	GNSS_RXD	○	○	○
0%	U_MCU_22	GNSS_TXD	○	○	○
0%	U_MCU_23	USB_DM	○	○	○
0%	U_MCU_24	USB_DP	○	○	○
0%	U_MCU_25		○	○	○
0%	U_MCU_26		○	○	○
0%	U_MCU_27		○	○	○
0%	U_MCU_28		○	○	○
0%	U_MCU_29		○	○	○
0%	U_MCU_30		○	○	○
0%	U_MCU_31		○	○	○
0%	U_MCU_32		○	○	○
0%	U_MCU_33		○	○	○
0%	U_MCU_34		○	○	○
0%	U_MCU_35		○	○	○
0%	U_MCU_36		○	○	○
0%	U_MCU_37		○	○	○
0%	U_MCU_38		○	○	○
0%	U_MCU_39		○	○	○
0%	U_MCU_40		○	○	○
0%	U_MCU_41		○	○	○
0%	U_MCU_42	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_43	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_44		○	○	○
0%	U_MCU_45	MCU_EN	○	○	○
0%	U_MCU_46	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_47	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_48	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_49	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_50	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_51	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_52	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_53	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_54	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_55	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_56	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_57	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_58	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_59	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_60	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_61	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_62	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_63	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_64	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_65	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_66	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_67	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_68	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_69	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_70	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_71	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_72	Net-(U_CHG-VSS)	○	○	○
0%	U_MCU_73	Net-(U_CHG-VSS)	○	○	○
0%	U_IMU_1	I2C_SCL	○	○	○
0%	U_IMU_2	V3V3	○	○	○
0%	U_IMU_3	Net-(U_CHG-VSS)	○	○	○
0%	U_IMU_4	I2C_SDA	○	○	○
0%	U_IMU_5	Net-(U_CHG-VSS)	○	○	○
0%	U_IMU_6	Net-(U_CHG-VSS)	○	○	○
0%	U_IMU_7	Net-(U_IMU-GND2)	○	○	○
0%	U_IMU_8	Net-(U_IMU-GND2)	○	○	○
0%	U_IMU_9	Net-(U_IMU-VDD_IO)	○	○	○
0%	U_IMU_10	Net-(U_IMU-VDD_IO)	○	○	○
0%	U_IMU_11		○	○	○
0%	U_IMU_12	IMU_INT	○	○	○
0%	R_SDA_1	Net-(R_SCL-Pad1)	○	○	○
0%	R_SDA_2	I2C_SDA	○	○	○
0%	R_SCL_1	Net-(R_SCL-Pad1)	○	○	○
0%	R_SCL_2	I2C_SCL	○	○	○
0%	C_IMU_1		○	○	○
0%	C_IMU_2	Net-(C_IMU-Pad2)	○	○	○
0%	J_GNSS_1	ANT_IN	○	○	○
0%	J_GNSS_2	Net-(C_IMU-Pad2)	○	○	○
0%	J_GNSS_3	GND	○	○	○
0%	L_BIAS_1	ANT_BIAS	○	○	○
0%	L_BIAS_2	ANT_IN	○	○	○
0%	C_DCBLK_1	ANT_IN	○	○	○
0%	C_DCBLK_2	RF_GNSS	○	○	○
0%	C_BIAS_1	ANT_BIAS	○	○	○
0%	C_BIAS_2	Net-(SW_BOOT-C)	○	○	○
0%	U_GNSS_1		○	○	○
0%	U_GNSS_2		○	○	○
0%	U_GNSS_3	PPS	○	○	○
0%	U_GNSS_4		○	○	○
0%	U_GNSS_5		○	○	○
0%	U_GNSS_6		○	○	○
0%	U_GNSS_7		○	○	○
0%	U_GNSS_8	GNSS_RST	○	○	○
0%	U_GNSS_9	V3V3_GNSS	○	○	○
0%	U_GNSS_10	Net-(U_GNSS-GND4)	○	○	○
0%	U_GNSS_11	RF_GNSS	○	○	○
0%	U_GNSS_12	Net-(U_GNSS-GND4)	○	○	○
0%	U_GNSS_13	Net-(U_GNSS-GND2)	○	○	○
0%	U_GNSS_14	ANT_BIAS	○	○	○
0%	U_GNSS_15		○	○	○
0%	U_GNSS_16		○	○	○
0%	U_GNSS_17		○	○	○
0%	U_GNSS_18		○	○	○
0%	U_GNSS_19		○	○	○
0%	U_GNSS_20	GNSS_TXD	○	○	○
0%	U_GNSS_21	GNSS_RXD	○	○	○
0%	U_GNSS_22	V3V3	○	○	○
0%	U_GNSS_23	V3V3_GNSS	○	○	○
0%	U_GNSS_24	Net-(U_GNSS-GND2)	○	○	○
0%	R_GRST_1	Net-(C_G1-Pad1)	○	○	○
0%	R_GRST_2	GNSS_RST	○	○	○
0%	J_USB_1		○	○	○
0%	U_PWR_2	GND	○	○	○
0%	U_PWR_3	GNSS_EN	○	○	○
0%	U_PWR_4		○	○	○
0%	U_PWR_5	V3V3_GNSS	○	○	○
0%	R_GEN_1	GNSS_EN	○	○	○
0%	R_GEN_2	Net-(GND-Pad1)	○	○	○
0%	R_LED_1	LED_CTRL	○	○	○
0%	R_LED_2	LED_A	○	○	○
0%	LED1_1	Net-(BAT_N-Pad1)	○	○	○
0%	LED1_2	LED_A	○	○	○
0%	J_USB_2		○	○	○
0%	R_VB1_2	Net-(C_VB-Pad1)	○	○	○
0%	R_VB2_1		○	○	○
0%	R_VB2_2	Net-(GND-Pad1)	○	○	○
0%	C_VB_1	Net-(C_VB-Pad1)	○	○	○
0%	C_VB_2	Net-(C_EN-Pad2)	○	○	○
0%	U_CHG_1	CHG_STAT	○	○	○
0%	U_CHG_2	Net-(U_CHG-VSS)	○	○	○
0%	J_USB_3		○	○	○
0%	J_USB_4		○	○	○
0%	U_CHG_5	PROG	○	○	○
0%	R_PROG_1	PROG	○	○	○
0%	R_PROG_2		○	○	○
0%	U_LDO_1	Net-(U_LDO-VIN)	○	○	○
0%	U_LDO_2	Net-(U_LDO-GND)	○	○	○
0%	U_LDO_3	Net-(U_LDO-VIN)	○	○	○
0%	U_LDO_4		○	○	○
0%	U_LDO_5	V3V3	○	○	○
0%	SW_EN_1	MCU_EN	○	○	○
0%	SW_EN_2	MCU_EN	○	○	○
0%	SW_EN_3	Net-(SW_EN-C)	○	○	○
0%	SW_EN_4	Net-(SW_EN-C)	○	○	○
0%	SW_BOOT_1	MCU_BOOT	○	○	○
0%	SW_BOOT_2	MCU_BOOT	○	○	○
0%	SW_BOOT_3	Net-(SW_BOOT-C)	○	○	○
0%	SW_BOOT_4	Net-(SW_BOOT-C)	○	○	○
0%	R_EN_1		○	○	○
0%	R_EN_2	MCU_EN	○	○	○
0%	C_EN_1	MCU_EN	○	○	○
0%	C_EN_2	Net-(C_EN-Pad2)	○	○	○
0%	C_M1_1	Net-(C_L2-Pad1)	○	○	○
0%	C_M1_2	Net-(C_L2-Pad2)	○	○	○
0%	C_M2_1	Net-(C_BULK-Pad1)	○	○	○
0%	C_M2_2	Net-(C_BULK-Pad2)	○	○	○
0%	C_G1_1	Net-(C_G1-Pad1)	○	○	○
0%	C_G1_2		○	○	○
0%	C_G2_1		○	○	○
0%	C_G2_2		○	○	○
0%	C_P1_1	Net-(BAT_P-Pad1)	○	○	○
0%	C_P1_2		○	○	○
0%	C_P2_1		○	○	○
0%	C_P2_2	Net-(SW_BOOT-C)	○	○	○
0%	C_L1_1	Net-(C_BAT-Pad1)	○	○	○
0%	C_L1_2	Net-(U_LDO-GND)	○	○	○
0%	C_L2_1	Net-(C_L2-Pad1)	○	○	○
0%	C_L2_2	Net-(C_L2-Pad2)	○	○	○
0%	C_BULK_1	Net-(C_BULK-Pad1)	○	○	○
0%	C_BULK_2	Net-(C_BULK-Pad2)	○	○	○
0%	C_BAT_1	Net-(C_BAT-Pad1)	○	○	○
0%	C_BAT_2	Net-(U_LDO-GND)	○	○	○
0%	C_CHG_1		○	○	○
0%	C_CHG_2	Net-(C_CHG-Pad2)	○	○	○
0%	C_VBUS_1	Net-(U_ESD-VBUS)	○	○	○
0%	C_VBUS_2	Net-(C_CHG-Pad2)	○	○	○
0%	BAT_P_1	Net-(BAT_P-Pad1)	○	○	○
0%	BAT_N_1	Net-(BAT_N-Pad1)	○	○	○
0%	GND_1	Net-(U_GNSS-GND2)	○	○	○
0%	VBUS_1		○	○	○
0%	V3V3_1	Net-(U_IMU-VDD_IO)	○	○	○
0%	VBAT_SENSE_1	Net-(C_VB-Pad1)	○	○	○
0%	V3V3_GNSS_1		○	○	○
0%	VBAT_1	Net-(BAT_P-Pad1)	○	○	○

14.10.6 Scoring Matrix

PCOLA/SOQ scoring premises used for this analysis. Each cell shows the score assigned when a test method applies to a component or pin.

Method	P	C	O	L	A	S	Opens	Q
AOI	Full	Full	Full	—	Partial	Partial	Partial	Partial
AXI	—	—	—	—	Partial	Partial	Partial	Partial
JTAG/BSCAN	Full	Full	Full	Partial	—	Full	Full	—
BSCAN_Passives	Full	Full	Full	Full	—	Full	Full	—
I2C	Partial	Partial	—	Partial	—	Partial	Partial	—
SPI	Partial	Partial	—	Partial	—	Partial	Partial	—
UART	—	—	—	Partial	—	—	—	—
Passive_Meas	Full	Full	Full	Full	—	Full	Full	—
Powered_Off	Partial	—	—	—	—	Partial	Full	—

15 Model Quality

Schematic symbol and library model quality analysis.

15.1 Library Model Grades

Grading schematic library model quality based on pin electrical type definitions:

Grade Definitions
Grade	Rating	Description
A	Excellent	Has Power pins AND properly typed I/O pins (>=90% typed)
B	Good	>=70% typed OR (>=50% typed AND has Power)
C	Fair	Mix of typed and Passive pins (>=40% typed)
D	Poor	Mostly Passive with few typed pins (>=10% typed)
F	Fail	All pins Passive/Unknown (<10% typed, no ERC)

IC Library Model Grades (sorted worst to best)
RefDes	Grd	Pins	Pwr	In	Out	IO	OC	OE	HiZ	Pas	Part Number	Creator

15.1.1 Library Quality Summary

Total ICs evaluated	0
Grade A (excellent)	0 (0.0%)
Grade B (good)	0 (0.0%)
Grade C (fair)	0 (0.0%)
Grade D (poor)	0 (0.0%)
Grade F (fail)	0 (0.0%)
OVERALL LIBRARY QUALITY	F (0.00/4.00)

15.2 Component Library Validation

All component library models passed validation checks.

15.3 Shielded Connector Model Quality

Shielded connectors with missing pin names

All shielded connectors have proper pin names for EMC analysis.

15.4 Footprints and Other Models

Components with model data

Component Model Assignments
RefDes	Industry Name	Pins	Model Type	Model

15.5 IC Pin Electrical Properties

Unique IC models	0
Total IC instances	0

IC Library Models
Industry Name	Library Name	RefDes	Notes