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jetson-nano-baseboard Design Analysis

1 Design Summary

73
out of 100
Depth of review, as a baseline: 337 verified datasheet parameters applied and 747 automated circuit checks performed. Additional checks that are not as easily quantifiable are also made.
Design TypeHierarchical (8 sheets)
Total Components379
Total Pins1616
Total Nets341
Total Test Points0
Not Fitted (DNP)29
Improve your score:
Points deducted for open High/Medium AI findings:
AI findings to review:
AI assistance is enabled for this report. Each section marked "AI-Assisted" contains AI-generated engineering observations produced during schematic-phase design review. Findings are based solely on connectivity, component values, and net annotations present in the schematic data at the time of analysis. The AI has no access to PCB layout, routing, thermal data, BOM pricing or availability, assembly constraints, or any information outside the schematic. Findings are observations to investigate, not pass/fail judgments. The absence of a finding for a given device or net does not constitute a clearance. STANDARD MODE — this analysis was produced by the standard model tier.
Based on user-selected TP insertion settings, 21 test point(s) were added and a modified design is available for download. Review the modified schematic and resubmit to update this report.
The inserted test point count is unusually high because Optical (AOI) and X-ray (AXI) inspection contributes no coverage — none of the footprint names are recognized as IPC-7351B or IPC-7251 compliant. Repair the library footprint names to follow IPC naming and resubmit; the inserted test point count will drop to typical levels.

1.1 Design Overview

AI-Assisted — This is an eight-sheet hierarchical carrier board for an NVIDIA Jetson-class compute module, which mates through the 260-pin TE 2309413-1 SO-DIMM-style socket J15. The baseboard breaks the module's high-speed and low-speed interfaces out to standard connectors and provides the local power tree, identification, and user controls. The design carries 379 components across 341 nets, with 150 differential pairs grouped into controlled-impedance classes of nominally 85 Ω, 90 Ω, and 100 Ω, internal and external reference.

Display and Imaging

Video output is provided on two paths: a Micro-HDMI receptacle (J1, Molex 467651001) and a Mini DisplayPort receptacle (J2, TE 2129320-3), both fed from the module's DP transmit lanes with HPD, AUX and CEC support. A four-lane DSI display FFC (J10) and two 50-way FFC camera connectors (J6, J7, Würth 68715014x22 family) expose the MIPI CSI receivers, with additional camera control on a dedicated I²C branch.

Expansion, Storage and Networking

An M.2 Key-M socket (J8, Amphenol MDT580M01001) carries a four-lane PCIe link with reference clock, PERST#, CLKREQ# and PEWAKE#, plus SMBus and ALERT. Gigabit Ethernet is routed to an integrated-magnetics RJ45 jack (J3, Bel SI-51005-F) with link and activity indication. SDMMC is presented as a 4-bit interface at the module socket.

USB, Serial and Control

USB connectivity comprises a USB Type-C receptacle (J11) with a HD3SS3220 port controller and SuperSpeed 2:1 mux, an OTG Micro-B port (J5), and a debug Micro-B port (J9) served by an FT232RQ USB-UART bridge. A MAX3051 transceiver provides a 3.3 V CAN interface on J13/J14, and a PCA9547 eight-channel multiplexer at address 0x70 fans I²C out to the camera and display connectors. Board identification uses an AT24CS01 1-Kbit EEPROM with 128-bit factory-locked serial number at address 0x50, and a MS621FE-FL11E rechargeable cell backs the module's PMIC_BBAT domain. Level translation uses SN74LXC1T45, SN74LV1T125, SN74LVC1G126, 74LVC1G07 and 74HC00 logic.

Power Tree

VIN from the 2 mm barrel jack J4 feeds a Vishay SiC477 synchronous buck (U6) generating 5V0_SYS through inductor L4, and a TI LMQ62440BPP-Q1 (U2) generating 3V3_SYS through L1; the SiC477 is rated to 55 V input and 8 A, the LMQ62440 to 36 V and 4 A, both comfortably above this board's needs. Two LM3671MF-3.3 converters (U1, U5) and two TPS7A0518 LDOs (IC4, IC15) provide local low-current rails. NCP380 current-limited load switches (IC1, IC3) gate USB VBUS to the OTG and Type-C ports, and a separate 5V0_DBG branch supplies the debug section. VDD_MOD distributes module input power.

Environmental

The temperature envelope is set by the fitted grades: the SiC477 is specified −40 °C to +105 °C ambient, the PCA9547, AT24CS01 and MAX3051 −40 °C to +85 °C, while the HD3SS3220RNHT ordering code is the 0 °C to +70 °C grade, which bounds the assembly's rated range for full Type-C functionality.

User Interface and Protection

Three tactile switches provide reset, force-recovery and a user input, and six LEDs indicate power, NVMe activity, boot, and user status. Connector-level transient protection uses TPD8S009 Type-C arrays, TPD4E05U06 quad arrays, PESD2USB5UV and ESD5B5.0ST1G diodes, and an SMBJ33A on the input rail.

1.2 Processed Sheets

#Sheet Name
1jetson-nano-baseboard.kicad_sch
2id-serial.kicad_sch
3csi.kicad_sch
4som.kicad_sch
5display.kicad_sch
6supply.kicad_sch
7interfaces.kicad_sch
8usb-debug.kicad_sch

1.3 Structured DNP (Not Fitted)

Parts marked do-not-populate at the part level, outside of assembly variants. They remain present in the netlist but are not assembled.
StatusRefDesPart TypeValueFootprint
DNPC24C_6p_0402C_6p_0402antmicro-footprints:C_0402_1005Metric
DNPC28C_270p_25V_0402C_270p_25V_0402antmicro-footprints:C_0402_1005Metric
DNPC61C_1n2_50V_0402C_1n2_50V_0402antmicro-footprints:C_0402_1005Metric
DNPC82C_1n2_50V_0402C_1n2_50V_0402antmicro-footprints:C_0402_1005Metric
DNPR12R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR23R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR37R_2k_04022kantmicro-footprints:R_0402_1005Metric
DNPR42R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR45R_1k_04021kantmicro-footprints:R_0402_1005Metric
DNPR54R_10k_040210kantmicro-footprints:R_0402_1005Metric
DNPR64R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR66R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR68R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR75R_316k_0402316kantmicro-footprints:R_0402_1005Metric
DNPR77R_60k4_040260k4antmicro-footprints:R_0402_1005Metric
DNPR79R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR87R_1k_04021kantmicro-footprints:R_0402_1005Metric
DNPR94R_8k66_04028k66antmicro-footprints:R_0402_1005Metric
DNPR118R_100k_0402100kantmicro-footprints:R_0402_1005Metric
DNPR119R_44k2_040244k2antmicro-footprints:R_0402_1005Metric
DNPR124R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR125R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR126R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR127R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR129R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR130R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR136R_0R_04020Rantmicro-footprints:R_0402_1005Metric
DNPR137R_10k_040210kantmicro-footprints:R_0402_1005Metric
DNPT7BSS138PWBSS138PWantmicro-footprints:SC70-3

1.4 Footprint Compliance

Production pick-n-place, AOI, AXI, ATE and Design Quality tools rely on proper descriptions of component footprints.

Footprint NamingStatus
34 SMT footprints do not follow IPC-7351B naming
12 footprints (connectors, specialty) — compliance unknown
4 footprints could not be classified for inspection

1.5 Incorrect BOM Settings

The following components have part types associated with non-BOM items (fiducials, mounting holes, test pads) but are not marked as excluded from the BOM in the schematic library. The default is parts with reference designators are BOM parts to populate on the PCB, so the "Include in BOM" setting needs to be false either in the component library or overriding within the schematic instance. This affects downstream processes that rely on the BOM or check for populated parts.
RefDesPart TypeIssue
N1antmicro_logoMissing BOM exclusion flag
N2oshw_logoMissing BOM exclusion flag
N3crc_logoMissing BOM exclusion flag

2 Component Value Properties

Component values should be in the VALUE property, either as a direct value (e.g. 100nF) or as a formula reference (e.g. =Capacitance). The typed property (Resistance, Capacitance, Inductance, Impedance, etc.) holds the actual electrical value; VALUE should point to it or contain the same data.

Value Property Check
TypeCheckCountComponentsStatus
CapacitorsValues in VALUE or Capacitance82C60, C58, C20, C56, C57, C88, C86, C89 (+74 more)✓
CapacitorsA magnitude value for this part was not found, some other text notation was found. Set VALUE to just the magnitude and units (e.g. 10k, 100nF, 10uH) or a =Property formula; keep wattage, current, tolerance and voltage ratings in their own named properties (Power, Current, Tolerance, Voltage). (C65 currently has VALUE="C_1u_0402")4C65, C87, C84, C66
ResistorsValues in VALUE or Resistance115R92, R74, R96, R48, R117, R120, R39, R46 (+107 more)✓
InductorsValues in VALUE or Inductance4L5, L6, L1, L4✓
InductorsA magnitude value for this part was not found, some other text notation was found. Set VALUE to just the magnitude and units (e.g. 10k, 100nF, 10uH) or a =Property formula; keep wattage, current, tolerance and voltage ratings in their own named properties (Power, Current, Tolerance, Voltage). (L7 currently has VALUE="FB_120Z_3A_Murata-BLM18SG_0603")7L7, L2, L3, L11, L10, L9, L8
Ferrite BeadsVALUE holds a part number, not an impedance. When the value is expressed as impedance@frequency (e.g. 600R@100MHz) and a separate MPN field carries the part number, the analysis is more deterministic. (FB1 currently has VALUE="FB_10Z_10A_WE-MPSB_1206")3FB1, FB3, FB2
FusesValues in VALUE or Rated Current5F1, F2, F3, F4, F5✓

2.1 Part Number vs Stated Values

Each passive states its electrical facts twice: in the properties the designer set, and encoded inside the MANUFACTURER part number. This check decodes the manufacturer part number and compares the two. A distributor catalogue number is a different thing and cannot be used here - an LCSC C-number or a Digi-Key -ND number identifies a stock item, it encodes no capacitance, voltage or tolerance, so there is nothing in it to check against. Where the two readings disagree both are shown and neither is assumed correct: if VALUE is wrong the analysis used the wrong number, and if the part number is wrong the BOM orders the wrong part. Only the designer knows which field is authoritative. Parts whose numbering scheme is not recognized are reported as not checked rather than passed.

Part NumberDecoded from Part NumberStated on SchematicCountComponentsStatus
GRM155R61H474KE11D
MPN / Murata
470nF 50V +/-10% 040247n x1 [C41]1C41
GRM155R61H104KE14D
MPN / Murata
100nF 50V +/-10% 0402100n 50V x47 [C5]47C5, C6, C7, C8, C9, C12, C13, C26 (+39 more)✓
ERJ2GE0R00X
MPN / Panasonic ERJ-2GE
0R 04020R ~ x36 [R13]36R13, R15, R17, R19, R21, R48, R49, R56 (+28 more)✓
CR0402-FX-2001GLF
MPN / Bourns CR0402
2k +/-1% 04022k 1% x19 [R5]19R5, R6, R11, R18, R22, R24, R25, R27 (+11 more)✓
CR0402-FX-1002GLF
MPN / Bourns CR0402
10k +/-1% 040210k 1% x16 [R39]16R39, R44, R46, R50, R52, R72, R95, R114 (+8 more)✓
CR0402-FX-1003GLF
MPN / Bourns CR0402
100k +/-1% 0402100k 1% x11 [R26]11R26, R30, R47, R69, R91, R96, R100, R102 (+3 more)✓
CR0402-FX-5R60GLF
MPN / Bourns CR0402
5.6R +/-1% 04025R6 1% x8 [R1]8R1, R2, R3, R4, R7, R8, R9, R10✓
BLM18SG121TN1D
MPN / Murata
120R 0603 x7 [L2]7L2, L3, L7, L8, L9, L10, L11✓
GRM188R61A106KE69D
MPN / Murata
10uF 10V +/-10% 060310u x6 [C23]6C23, C35, C47, C55, C63, C81✓
CR0402-FX-4700GLF
MPN / Bourns CR0402
470R +/-1% 0402470R 1% x5 [R14]5R14, R43, R97, R111, R135✓
GRM155R61A475MEAAD
MPN / Murata
4.7uF 10V +/-20% 04024u7 x5 [C1]5C1, C2, C3, C4, C62✓
C0805C476M9PACTU
MPN / KEMET
47uF 6.3V +/-20% 080547u x4 [C20]4C20, C34, C59, C64✓
C1005X5R1A225K050BC
MPN / TDK
2.2uF 10V +/-10% 04022u2 x4 [C16]4C16, C18, C60, C67✓
C1005X6S1A105K050BC
MPN / TDK
1uF 10V +/-10% 0402C_1u_0402 x4 [C65]4C65, C66, C84, C87✓
C3216X7R1H106K160AE
MPN / TDK
10uF 50V +/-10% 120610u 50V x4 [C17]4C17, C19, C21, C22✓
CR0402-FX-2003GLF
MPN / Bourns CR0402
200k +/-1% 0402200k 1% x4 [R53]4R53, R67, R84, R86✓
CR0402-FX-2200GLF
MPN / Bourns CR0402
220R +/-1% 0402220R 1% x3 [R38]3R38, R40, R128✓
C0402C470J5GACTU
MPN / KEMET
47pF 50V +/-5% 040247p x2 [C15]2C15, C29✓
CR0402-FX-1001GLF
MPN / Bourns CR0402
1k +/-1% 04021k 1% x2 [R16]2R16, R36✓
CR0402-FX-1004GLF
MPN / Bourns CR0402
1M +/-1% 04021M 1% x2 [R31]2R31, R32✓
CR0402-FX-22R0GLF
MPN / Bourns CR0402
22R +/-1% 040222R 1% x2 [R20]2R20, R41✓
LQH32PN2R2NN0L
MPN / Murata LQH32PN
2.2uH +/-30%2u2/1.6A x2 [L5]2L5, L6✓
T520B337M006ATE040
MPN / KEMET (tantalum)
330uF +/-20%330u 6.3V x2 [C10]2C10, C11✓
C1608X5R1V475M080AC
MPN / TDK
4.7uF 35V +/-20% 06034u7 x1 [C85]1C85✓
CC0402MRX5R5BB106
MPN / Yageo
10uF 6.3V +/-20% 040210u x1 [C32]1C32✓
CR0402-FX-1000GLF
MPN / Bourns CR0402
100R +/-1% 0402100R 1% x1 [R70]1R70✓
+12 more part number(s) cross-checked, all agree12✓
Not checked
Capacitors
160R15X106KV4E1 part(s) use 1 numbering scheme(s) this tool does not decode yet, so their value, voltage and tolerance could not be cross-checked against the part number. Nothing is wrong with these parts - the check simply does not cover the scheme in this preliminary run. Decoding coverage grows as vendor numbering is added. An AI-assisted run acquires the manufacturer's own ordering information for these schemes and keeps it, after which every run - with or without AI assistance - cross-checks such parts automatically.1C25–

2.2 Derating Check

Derating profileindustrial_default
Maximum ambient85 °C
Checks performed25
Over-specified9
A part is checked here when the comparison can be made without an operating-point calculation: it has two terminals, sits between a power rail and ground so the rail's resolved voltage is the voltage across it, and states a voltage rating - a Voltage property, or a rating decoded from the part number. Capacitors qualify most often; a resistor or inductor appears under the same conditions. All other derating checks - current, power dissipation, temperature margins, and any check needing an operating point - are provided by the AI analysis within its report sections.
Derating applied: 20% (capacitor_voltage_pct = 80)
Status key: ↓ = Over-specified ⚠ = Above the standoff, below the minimum breakdown: leakage only, not guaranteed - acceptable if the leakage at the rail's maximum and the design's maximum temperature is shown acceptable ✓ = Adequately rated
Derating is how much is taken off a part's catalogue rating. What remains is the most of that rating the part may be worked at - a 16 V capacitor derated 15% has a maximum permitted value of 13.6 V - and the part is correctly sized when the voltage its position applies stays within it, taken at the worst case of the rail's stated range. This judges DC working voltage only; ripple and switching transients are not included in the compared value.
Review: 9 part(s) carry a voltage rating far higher than needed. A lower-cost part can be used, down to the voltage indicated.
8 derating check(s) on 8 part(s) sit on rails whose level the schematic does not state directly. The AI analysis resolves those levels from the circuit and the device datasheets, and evaluates these parts there.
3 part(s) sit across a resolved power rail with no stated voltage rating and could not be checked: C25, D1, D9. Record each rating in a Voltage property.
Part Voltage Rating vs Design Voltage
RefDesNet NameRated VoltageMax PermittedDesign Voltage% of RatingSufficient RatingStatus
C58Supply/5V_SS25.00 V (pn)20.00 V5.00 V20.0%16.00 V↓
C725V0_DBG50.00 V40.00 V5.25 V (worst case of USB/USB_DBG_VBUS)10.5%16.00 V↓
C56Supply/5V_VIN50.00 V40.00 V5.00 V10.0%16.00 V↓
C885V0_SYS50.00 V40.00 V5.00 V10.0%16.00 V↓
C715V0_SYS50.00 V40.00 V5.00 V10.0%16.00 V↓
C835V0_SYS50.00 V40.00 V5.00 V10.0%16.00 V↓
C22Supply/5V_VIN50.00 V40.00 V5.00 V10.0%16.00 V↓
C17Supply/5V_VIN50.00 V40.00 V5.00 V10.0%16.00 V↓
C905V0_SYS50.00 V40.00 V5.00 V10.0%16.00 V↓
D14VIN33.00 V (ds)33.00 V36.00 V
C595V0_SYS6.30 V (pn)5.04 V5.00 V79.4%✓
C645V0_SYS6.30 V (pn)5.04 V5.00 V79.4%✓
C325V0_SYS6.30 V (pn)5.04 V5.00 V79.4%✓
C345V0_SYS6.30 V (pn)5.04 V5.00 V79.4%✓
C11VDD_MOD6.30 V5.04 V5.00 V79.4%✓
C10VDD_MOD6.30 V5.04 V5.00 V79.4%✓
C675V0_DBG10.00 V (pn)8.00 V5.25 V (worst case of USB/USB_DBG_VBUS)52.5%✓
C605V0_SYS10.00 V (pn)8.00 V5.00 V50.0%✓
C165V0_SYS10.00 V (pn)8.00 V5.00 V50.0%✓
C185V0_SYS10.00 V (pn)8.00 V5.00 V50.0%✓
C84Supply/VDD_5V_DCDC10.00 V (pn)8.00 V5.00 V50.0%✓
C815V0_SYS10.00 V (pn)8.00 V5.00 V50.0%✓
C62USB/OTG_USB_VBUS10.00 V (pn)8.00 V5.00 V50.0%✓
C35USB/USBC_VBUS10.00 V (pn)8.00 V5.00 V50.0%✓
C87Supply/3V3_VCC10.00 V (pn)8.00 V3.30 V33.0%✓
Derating Settings Used in This Analysis
ParameterValueSourceApplied
capacitor_voltage_pct20% (80)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MChecked in the table above (24 part(s))
capacitor_aluminum_voltage_pct30% (70)SD-18Applied by the AI analysis where the rating is in evidence
capacitor_tantalum_mno2_voltage_pct60% (40)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
capacitor_tantalum_polymer_voltage_pct40% (60)ECSSApplied by the AI analysis where the rating is in evidence
capacitor_temperature_margin_c20 °CECSS, EEE-INST-002, SD-18Applied by the AI analysis where the rating is in evidence
capacitor_aluminum_temperature_margin_c25 °CSD-18Applied by the AI analysis where the rating is in evidence
resistor_power_pct45% (55)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
resistor_working_voltage_pct25% (75)ECSS, EEE-INST-002Applied by the AI analysis where the rating is in evidence
resistor_temperature_margin_c25 °CECSS, EEE-INST-002, SD-18Applied by the AI analysis where the rating is in evidence
inductor_continuous_current_pct30% (70)SD-18Applied by the AI analysis where the rating is in evidence
inductor_surge_current_pct10% (90)SD-18Applied by the AI analysis where the rating is in evidence
inductor_continuous_voltage_pct30% (70)SD-18Applied by the AI analysis where the rating is in evidence
inductor_surge_voltage_pct10% (90)SD-18Applied by the AI analysis where the rating is in evidence
inductor_dielectric_withstand_voltage_pct60% (40)ECSS, EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
inductor_temperature_margin_c25 °CECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
diode_reverse_voltage_pct30% (70)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
diode_average_forward_current_pct35% (65)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
diode_power_dissipation_pct50% (50)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
diode_junction_temperature_margin_c40 °CECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
diode_junction_temperature_cap_c110 °CECSS, EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
mosfet_vds_pct30% (70)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
mosfet_vgs_pct30% (70)ECSS, EEE-INST-002, SD-18, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
mosfet_continuous_current_pct40% (60)ECSS, EEE-INST-002, SD-18, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
mosfet_power_dissipation_pct55% (45)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
mosfet_junction_temperature_margin_c40 °CECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
mosfet_junction_temperature_cap_c110 °CECSS, EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
bjt_vce_pct30% (70)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
bjt_continuous_current_pct40% (60)ECSS, EEE-INST-002, SD-18, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
bjt_power_dissipation_pct55% (45)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
bjt_junction_temperature_margin_c40 °CECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
bjt_junction_temperature_cap_c110 °CECSS, EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
regulator_input_voltage_pct15% (85)ECSS, EEE-INST-002Applied by the AI analysis where the rating is in evidence
regulator_output_current_pct30% (70)ECSS, EEE-INST-002, SD-18, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
regulator_power_dissipation_pct50% (50)EEE-INST-002, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
regulator_junction_temperature_margin_c40 °CECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
regulator_junction_temperature_cap_c100 °CECSS, EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
ic_output_current_pct30% (70)ECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
ic_power_dissipation_pct50% (50)EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
ic_junction_temperature_margin_c40 °CECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
ic_junction_temperature_cap_c100 °CECSS, EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
connector_current_per_contact_pct40% (60)ECSS, EEE-INST-002, MIL-STD-1547BApplied by the AI analysis where the rating is in evidence
connector_voltage_pct30% (70)ECSS, EEE-INST-002, SD-18, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
connector_temperature_margin_c20 °CECSS, EEE-INST-002, MIL-STD-1547BApplied by the AI analysis where the rating is in evidence
tvs_junction_temperature_margin_c40 °CECSS, EEE-INST-002, SD-18, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
tvs_junction_temperature_cap_c110 °CECSS, EEE-INST-002, MIL-STD-1547B, MIL-STD-975MApplied by the AI analysis where the rating is in evidence
fuse_temperature_margin_c20 °CECSS, EEE-INST-002Applied by the AI analysis where the rating is in evidence

3 Pin Connectivity Report

3.1 Unconnected Pins

Unconnected pins that are not marked NO_ERC.

29 unconnected pin(s) found:
29 unconnected pin(s) — all are electrical types that are safe to leave open (Bidirectional, Output, Passive, High-Impedance, or Unspecified). Common on partially-populated bus connectors (VME, backplanes, expansion headers) and on outputs whose consumer was omitted. Review to confirm intent, but no action is required by default.
Refdes_PinPin FunctionPin PropertyDevice TypeNet NameNotes
IC2_14NCUnknownTPD8S009DSMR-No net
IC4_4NCUnknownTPS7A0518P_SOT23-5-No net
IC5_5NCUnknownFT232R_QFN-No net
IC5_12NCUnknownFT232R_QFN-No net
IC5_13NCUnknownFT232R_QFN-No net
IC5_23NCUnknownFT232R_QFN-No net
IC5_25NCUnknownFT232R_QFN-No net
IC5_29NCUnknownFT232R_QFN-No net
IC15_4NCUnknownTPS7A0518P_SOT23-5-No net
IC18_14NCUnknownTPD8S009DSMR-No net
J8_6NCUnknownBus_M.2_MDT580M01001-No net
J8_8NCUnknownBus_M.2_MDT580M01001-No net
J8_20NCUnknownBus_M.2_MDT580M01001-No net
J8_22NCUnknownBus_M.2_MDT580M01001-No net
J8_24NCUnknownBus_M.2_MDT580M01001-No net
J8_26NCUnknownBus_M.2_MDT580M01001-No net
J8_28NCUnknownBus_M.2_MDT580M01001-No net
J8_30NCUnknownBus_M.2_MDT580M01001-No net
J8_32NCUnknownBus_M.2_MDT580M01001-No net
J8_34NCUnknownBus_M.2_MDT580M01001-No net
J8_36NCUnknownBus_M.2_MDT580M01001-No net
J8_38NCUnknownBus_M.2_MDT580M01001-No net
J8_46NCUnknownBus_M.2_MDT580M01001-No net
J8_48NCUnknownBus_M.2_MDT580M01001-No net
J8_56NCUnknownBus_M.2_MDT580M01001-No net
J8_58NCUnknownBus_M.2_MDT580M01001-No net
J8_67NCUnknownBus_M.2_MDT580M01001-No net
J8_69NCUnknownBus_M.2_MDT580M01001-No net
U8_1NCUnknown74LVC1G07_SOT-753-No net

3.2 NC Pins Connected to Nets

1 NC pin(s) connected to nets:

These pins are designated as NC (No Connect) in the datasheet but are connected to a net. This is informational - connecting an NC pin is often intentional. ESD protection diode arrays (and similar parts) in certain packages expose NC pins that designers connect as routing pass-throughs to ease signal layout. It may also be valid if the supplier issued datasheet errata after the schematic library model was created. Review to confirm the connection is intended.

Refdes_PinPin FunctionPin PropertyDevice TypeNet NameNotes
U6_21NCPassiveSIC477ED-T1-GE3Supply/5V_COMP2 pins on net

3.3 Implied/Hidden Net Connections

No components with implied/hidden net connections found.

3.4 Open-Collector Pull-up Audit

Examined 3 candidate pin(s) on 2 net(s). 1 to verify with destination IC. 1 unconnected (inaccessible).
Open-collector / open-drain outputs need an external pull-up resistor to a power rail to function. This audit lists pins where a pull-up appears to be missing or where the pin type may not match the schematic library.
FindingRecommended ActionSeverity
IC1_4 (FAULT) on USB/OTG_USB_FAULT
IC1 (NCP380LSNAJAAT1G)
on-board only · library: Bidirectional (name suggests OC)
Pin name suggests open-drain but the library property is set to Bidirectional. Verify that LED2_1 can be set to have an internal pull-up or add an external pull-up.Review
U2_5 (PGOOD) — No net — pin is unconnected. No trace exists to probe.
U2 (LM62440-Q1)
library: Open Collector (name suggests OC)
Add a test point with a pull-up resistor. Without a pull-up, a novice manually probing the test point may mistake the floating open-collector output for a device failure.Review

3.5 Diode Polarity / Orientation

Diode polarity and orientation are read from the schematic. IPC-7351B (surface mount) / IPC-7251 (through-hole) Zero Component Orientation (ZCO) requires that pin 1, the cathode, is on the left with the footprint at zero rotation. Tomachie will call out schematic-symbol problems that do not meet ZCO because the PCB layout may have an error, assembly may insert the part backwards, or a novice may wrongly indict a correct part — keeping consistent is the least-expensive path for everyone who handles the PCB.
DiodeConnectionsOrientationSeverity
D13
1N4148WS
unidirectional · pin_names
Pin 1 (K): Supply/Q
Pin 2 (A): Supply/QDEL
Consistent
D14
SMBJ33A
unidirectional · pin_names
Pin 1 (K): VIN
Pin 2 (A): GND
Consistent
D17
1N4148WS
unidirectional · pin_names · Reverse Polarity Protection
Pin 2 (A): 5V0_SYS
Pin 1 (K): 5V0_DBG
Consistent
D2
1N4148WS
unidirectional · pin_names
Pin 1 (K): Net-(D2-C)
Pin 2 (A): DP_PWR
Consistent
D4
1N4148WS
unidirectional · pin_names
Pin 1 (K): Net-(D4-C)
Pin 2 (A): HDMI_PWR
Consistent
D15
1N4148WS
unidirectional · pin_names
Pin 2 (A): 3V3_SYS
Pin 1 (K): ID Serial/EEPROM_PWR
Consistent
D9
ESD5B5.0ST1G
bidirectional · symbol_graphic
Pin 1 (C): GND
Pin 2 (A): 5V0_SYS
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D1
ESD5B5.0ST1G
bidirectional · symbol_graphic
Pin 1 (C): GND
Pin 2 (A): 3V3_SYS
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D3
PESD2USB5UV-TR
array · multi-pin
Pin 1: USB/DBG_USB_D_N
Pin 2: USB/DBG_USB_D_P
Pin 3: GND
3-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D6
TPD4E05U06QDQARQ1
array · multi-pin
Pin 1 (~): USB/C_USBSS_RX1_N
Pin 10 (~): USB/C_USBSS_RX1_N
Pin 2 (~): USB/C_USBSS_RX1_P
Pin 3 (~): GND
Pin 4 (~): USB/C_USBSS_TX1_P
Pin 5 (~): USB/C_USBSS_TX1_N
Pin 6 (~): USB/C_USBSS_TX1_N
Pin 7 (~): USB/C_USBSS_TX1_P
Pin 8 (~): GND
Pin 9 (~): USB/C_USBSS_RX1_P
10-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D7
TPD4E05U06QDQARQ1
array · multi-pin
Pin 1 (~): USB/C_USBSS_TX2_N
Pin 10 (~): USB/C_USBSS_TX2_N
Pin 2 (~): USB/C_USBSS_TX2_P
Pin 3 (~): GND
Pin 4 (~): USB/C_USBSS_RX2_P
Pin 5 (~): USB/C_USBSS_RX2_N
Pin 6 (~): USB/C_USBSS_RX2_N
Pin 7 (~): USB/C_USBSS_RX2_P
Pin 8 (~): GND
Pin 9 (~): USB/C_USBSS_TX2_P
10-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D8
TPD4E05U06QDQARQ1
array · multi-pin
Pin 1 (~): OTG_USB_D_N
Pin 10 (~): OTG_USB_D_N
Pin 2 (~): OTG_USB_D_P
Pin 3 (~): GND
Pin 4 (~): USB/OTG_USB_ID
Pin 5 (~): Net-(D8-Pad5)
Pin 6 (~): Net-(D8-Pad5)
Pin 7 (~): USB/OTG_USB_ID
Pin 8 (~): GND
Pin 9 (~): OTG_USB_D_P
10-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D5
PESD2USB5UV-TR
array · multi-pin
Pin 1: USB/C_CC2
Pin 2: USB/C_CC1
Pin 3: GND
3-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D11
PESD2USB5UV-TR
array · multi-pin
Pin 1: Display/TMDS_HPD_IN
Pin 2: Display/TMDS_CEC_IN
Pin 3: GND
3-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D12
PESD2USB5UV-TR
array · multi-pin
Pin 1: -
Pin 2: Display/DP_HPD_IN
Pin 3: GND
3-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D10
PESD2USB5UV-TR
array · multi-pin
Pin 1: Display/TMDS_SCL_5V0
Pin 2: Display/TMDS_SDA_5V0
Pin 3: GND
3-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information

3.6 Polarized Capacitor Orientation

Aluminum-electrolytic, tantalum, and polymer capacitors are polarized: pin 1 is the positive (+) terminal. IPC-7351B (surface-mount) and IPC-7251 (through-hole) fix pin 1 as positive in the land pattern — the square pad, the silkscreen "+", and (through-hole) the notch or plated hole all mark it. Footprint selection, pick-and-place assembly, and in-circuit / flying-probe test all reference pin 1, so the schematic symbol's pin 1 MUST match: pin 1 = positive. If a symbol instead draws "+" on pin 2, pin 1 — the footprint's positive pad — is wired to the wrong net and the assembled part sits backwards. (The part's own body marking is not a reliable guide: aluminum electrolytics stripe the NEGATIVE lead, tantalums mark the POSITIVE — so the land-pattern pin 1 = positive is the fixed reference.) Each polarized capacitor below is checked against this convention.
CapacitorConnectionsPolaritySeverity
C11
T520B337M006ATE040
Pin 1 (+): VDD_MOD
Pin 2: GND
C10
T520B337M006ATE040
Pin 1 (+): VDD_MOD
Pin 2: GND

3.7 Summary

Total NO_ERC markers in design119
Pins needing attention (warnings)30
Pins for information only0

3.8 Checks Not Performed

Items this report did not check, with the reason. None of these is a finding against the design - an item that was not checked says nothing about it either way.

Checks the AI review could not perform are listed at Review severity in each AI section's Findings table, each naming the input that was missing.

ItemNot checkedNotes
C251 part(s) use 1 numbering scheme(s) this tool does not decode yet, so their value, voltage and tolerance could not be cross-checked against the part number. Nothing is wrong with these parts - the check simply does not cover the scheme in this preliminary run. Decoding coverage grows as vendor numbering is added.
Part lifecycle (NRND / obsolete)The lifecycle status (NRND / obsolete) for this part is indeterminate from the datasheet - please review
Part Lifecycle and Silicon Errata
Status as found on the manufacturer's website by the AI enrichment run, on the date shown; the page read is linked. Silicon errata: whether the manufacturer publishes an errata sheet for the part - its presence only. No errata document is read or analysed, and no action is implied by its existence.
ItemLifecycleSilicon errataStatus
BAT1 (MS621FE-FL11E), D3, D5, D10, D11, D12 (PESD2USB5UV-TR), IC5 (FT232RQ-REEL), M2 (945-13541-0000-0000)Datasheet could not be obtained, so the lifecycle status (NRND / obsolete) could not be determinedNot determinedReview
L1 (XFL4020-222MEC), U6 (SIC477ED-T1-GE3)The lifecycle status (NRND / obsolete) for this part is indeterminate from the datasheet - please reviewNot determinedReview
BOOT1, LED1, LED2, NVME1, PWR1, USER1 (LED_G_0603_LG_L29K-G2J1-24-Z)Obsolete, as of 2026-09-11 Recommended replacement: KG EELP41.22.—High
C10, C11 (T520B337M006ATE040)No NRND / obsolete marking on the datasheet obtained 2026-09-11—
D1, D9 (ESD5B5.0ST1G)Active, as of 2026-09-11—
D2, D4, D13, D15, D17 (1N4148WS)Active, as of 2026-09-05—
D6, D7, D8 (TPD4E05U06QDQARQ1)Active, as of 2026-09-11—
D14 (SMBJ33A)Active, as of 2026-09-11—
F1, F2, F4, F5 (04671.25NR)Active, as of 2026-09-11—
F3 (3413.0329.22)No NRND / obsolete marking on the datasheet obtained 2026-09-11—
FB1, FB2 (74279221100)No NRND / obsolete marking on the datasheet obtained 2026-09-11—
FB3 (74279220181)No NRND / obsolete marking on the datasheet obtained 2026-09-11—
IC1, IC3 (NCP380LSNAJAAT1G)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC2, IC18 (TPD8S009DSMR)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC4, IC15 (TPS7A0518PDBVT)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC6 (PCA9517ADP)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC7 (HD3SS3220RNHT)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC11 (SN74LV1T125DBVR)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC12 (74HC00PW,118)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC13 (SN74LVC1G126DCKR)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
IC17 (AT24CS01-ST)No NRND / obsolete marking on the datasheet obtained 2026-09-11Not determined
L2, L3, L7, L8, L9, L10, L11 (BLM18SG121TN1D)No NRND / obsolete marking on the datasheet obtained 2026-09-09—
L4 (IHLP3232DZER3R3M01)Active, as of 2026-09-11—
L5, L6 (LQH32PN2R2NN0L)No NRND / obsolete marking on the datasheet obtained 2026-09-11—
REC1, RST1, USR1 (TL3340AF160QG)No NRND / obsolete marking on the datasheet obtained 2026-09-11—
T1, T2, T3, T4, T5, T6, T7, T8, T9 (BSS138PW)No NRND / obsolete marking on the datasheet obtained 2026-09-11—
U1, U5 (LM3671MF-3.3/NOPB)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
U2 (LMQ62440BPPQRJRRQ1)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
U3 (SN74LXC1T45DBVR)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
U4 (PCA9547BS,118)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
U7 (MAX3051EKA)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11
U8 (74LVC1G07GV,125)Active, as of 2026-09-11None found on the manufacturer's website, as of 2026-09-11

4 Power Overview

Power rails18
Power management sources identified4
Analysis of passive component footprint suitability, voltage ratings, and power dissipation is not performed in this revision.
Power architecture overview. For test point coverage, see Design-for-Test section.

4.1 Power Rail Analysis

USB/OTG_USB_VBUS, USB/USBC_VBUS: 5 V assumed by USB convention, because a USB connector power pin is on this net. A design that negotiates a higher USB Power Delivery voltage must state the rail's actual nominal, minimum and maximum voltage — preferably recorded in the design itself, otherwise entered when prompted before the AI review starts. Until it is stated, the assumed 5 V is taken as the intended level.
Power Rails
RailVoltageSourceConsumers
VIN12.00VJ4
External
-
5V0_DBG5.00VJ9
External
IC15 (TPS7A0518PDBVT),
IC5 (FT232RQ-REEL)
5V0_SYS5.00VU6
SIC477ED-T1-GE3
IC1 (NCP380LSNAJAAT1G),
IC12 (74HC00PW,118),
IC13 (SN74LVC1G126DCKR),
IC2 (TPD8S009DSMR),
IC3 (NCP380LSNAJAAT1G),
IC4 (TPS7A0518PDBVT),
IC7 (HD3SS3220RNHT),
U1 (LM3671MF-3.3/NOPB),
U3 (SN74LXC1T45DBVR),
U5 (LM3671MF-3.3/NOPB),
U8 (74LVC1G07GV,125)
Supply/5V_BOOT5.00V-U6 (SIC477ED-T1-GE3)
Supply/5V_COMP5.00V-U6 (SIC477ED-T1-GE3)
Supply/5V_PHASE5.00VU6
SIC477ED-T1-GE3
-
Supply/5V_SNS5.00V--
Supply/5V_SS5.00V-U6 (SIC477ED-T1-GE3)
Supply/5V_SW5.00VU6
SIC477ED-T1-GE3
-
Supply/5V_VIN5.00V-U6 (SIC477ED-T1-GE3)
Supply/VDD_5V_DCDC5.00VU6
SIC477ED-T1-GE3
-
USB/OTG_USB_VBUS5.00VIC1
NCP380LSNAJAAT1G
-
USB/USBC_VBUS5.00VIC3
NCP380LSNAJAAT1G
-
USB/USB_DBG_VBUS5.00VJ9
External
-
VDD_MOD5.00VU6
SIC477ED-T1-GE3
-
Supply/3V3_VCC3.30VU2
LMQ62440BPPQRJRRQ1
-
3V3_SYS-U2
LMQ62440BPPQRJRRQ1
IC6 (PCA9517ADP),
IC7 (HD3SS3220RNHT),
U4 (PCA9547BS,118),
U7 (MAX3051EKA)
GND-J10
External
-

4.1.1 Rail Voltage Annotation

The preferred way to state a rail's voltage is to record it in the design itself, where it travels with the schematic, survives every re-run, and can be read by anyone who opens the design: add VOLTAGE_NOM, VOLTAGE_MIN and VOLTAGE_MAX properties to the rail's net class directive, and VOLTAGE_EXCURSION_MAX for a survivable level outside normal operation.
2 power input(s) into this board were identified and characterized as follows. These are the levels the analysis uses.
RailVoltage supplied
VIN12.00 V nominal, 6.00-36.00 V operating
USB/USB_DBG_VBUS5.00 V nominal, 4.75-5.25 V operating

4.2 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

4.2.1 Power Tree Overview

AI-Assisted — Board power enters on the barrel jack J4 (MJ-179PH) through the series fuse F3 (Schurter UST1206, 12 A rated, 3.9 mOhm cold resistance) to the VIN net, which the schematic annotates as 12 V nominal with a 6.00-36.00 V operating window. The transient clamp D14 (SMBJ33A) sits on VIN, i.e. downstream of F3 — the correct order, connector first, then fuse, then clamp. VIN splits into two independent buck inputs through ferrites: FB1 (Wurth 74279221100, 10 Ohm@100MHz, 10.5 A, 1 mOhm typ DCR) to Supply/5V_VIN for U6, and FB3 (Wurth 74279220181, 180 Ohm@100MHz, 3.1 A, 26.5 mOhm typ DCR) to Supply/3V3_VIN for U2.

U6 (Vishay SiC477) produces 5V0_SYS at a computed 4.969 V, which feeds the Jetson module rail VDD_MOD through FB2 and 660 uF of polymer tantalum bulk (C10, C11), both USB power switches IC1/IC3, the two LM3671 camera converters U1/U5, the 1.8 V LDO IC4, and the 5 V logic (IC12, IC13, U8, IC2, IC7 VDD5). U2 (TI LMQ62440BPP-Q1, fixed 3.3 V option) produces 3V3_SYS through L1 for the M.2 socket J8, the I2C mux U4, the repeater IC6, the CAN transceiver U7 and IC7 VCC33. IC4 derives 1V8_SYS from 5V0_SYS. Separately, the debug USB micro-B J9 feeds 5V0_DBG through L3, diode-OR'd with 5V0_SYS through D17, supplying the FT232R (IC5) and the second 1.8 V LDO IC15 for its VCCIO domain. There is no bulk (non-ceramic) capacitance on the VIN side of FB1/FB3; the only VIN-side energy storage is inside the adapter cable.

4.2.2 SiC477 5 V Buck (U6)

AI-Assisted — U6 runs from Supply/5V_VIN with 20.1 uF of 1206/0402 X7R local input capacitance (C17, C22, C56, all 50 V parts, which will lose a substantial fraction of their capacitance under 12 V DC bias). VIN recommended range is 4.5-55 V and absolute maximum 60 V (Vishay SiC477 datasheet); derated 15% (regulator_input_voltage_pct = 85) the permitted value is 51 V, and the top of the stated 6-36 V window is applied — correctly rated.

Output is set by R117 52k3 / R120 10k on Supply/5V_FB, ratio 0.161 against the verified 0.800 V VFB reference, giving 4.969 V, inside the 0.8-15 V output range. Soft start: C58 33 nF on Supply/5V_SS with the 5 uA typical soft-start source (2-7 uA range) gives t = C*V/I = 33 nF x 0.8 V / 5 uA = 5.3 ms typical, 3.8-13.2 ms worst case. ILIMIT is tied to VDD through R76 0R (R77 60k4 is do-not-install), which the datasheet defines as the 100% setting, 10 A typical valley current limit. fSW is set by R90 26k7 to AGND and MODE by R74 10k to AGND; the resistor-to-mode and resistor-to-frequency tables are not present in the verified parameters, so neither setting can be decoded here. VDD (C84 1 uF) and VDRV (C85 4.7 uF) each carry their own bypass to GND; the bootstrap uses C57 100 nF from BOOT to the PHASE node through R89 3R3 for slew control. V_SNS is returned to 5V0_SYS through R93 0R — the ripple-injection sense point is on the output rail, correct; the alternate injection network R94 8k66 / C61 / C82 is do-not-install. PGOOD is pulled up by R96 100k to the device's own VDD LDO output and is also brought to TP40.

4.2.3 LMQ62440 3.3 V Buck (U2)

AI-Assisted — U2 is the fixed-3.3 V option, and FB is returned directly to 3V3_SYS through R48 0R exactly as the TI LMQ62440-Q1 datasheet requires for that option ("connect directly to output voltage node"); the alternative divider R118 100k / R119 44k2 is do-not-install. BIAS is tied to 3V3_SYS, the datasheet's recommended efficiency connection, and VCC carries only C87 1 uF with no external load, as required. The bootstrap network matches the datasheet: C89 100 nF between SW and CBOOT, with R70 100R from CBOOT to RBOOT setting the SW rise time. MODE is tied to GND; the datasheet gives no per-terminal outcome for that pin, so no behaviour is asserted here.

Input derating is the one issue. The absolute maximum VIN is 42 V and the recommended maximum is 36 V; derated 15% (regulator_input_voltage_pct = 85) the absolute maximum permits 35.7 V, and the permitted value is the lower of that and the un-derated 36 V recommended limit, so 35.7 V. The top of the stated 6-36 V input window applies 36 V to the part. At 12 V nominal there is ample margin; only the top of the declared window is affected.

Output capacitance on 3V3_SYS totals 67.6 uF across nine parts, plus C89 on the switch node. The datasheet minimum output capacitance is not among the verified parameters, so the stability floor cannot be checked against a stated number. L1 (Coilcraft XFL4020-222MEC, 2.2 uH) has Irms 6.0 A at 20 C rise and Isat 3.1 A at 10% inductance drop; at 12 V in, 3.3 V out and the 2.1 MHz typical switching frequency the ripple is Vout(1-D)/(L*fsw) = 3.3 x 0.725 / (2.2 uH x 2.1 MHz) = 0.52 A, so peak current exceeds Isat once the DC load passes about 2.85 A against the converter's 4 A rating.

4.2.4 LM3671 Camera Rails (U1, U5)

AI-Assisted — U1 and U5 are fixed 3.3 V LM3671MF-3.3 converters running from 5V0_SYS, each into L5/L6 (Murata LQH32PN2R2NN0L, 2.2 uH, Irms 1600 mA, Isat 1550 mA) with the feedback pin returned to the inductor output node — correct for the fixed-voltage option, no divider involved. Input abs max is 6 V; derated 15% (regulator_input_voltage_pct = 85) permits 5.1 V and the regulated 4.969 V of 5V0_SYS is applied, so both parts are correctly rated, and the 2.7-5.5 V recommended range is satisfied un-derated.

Output capacitance is C23 and C55, 10 uF 0603 X5R 10 V parts. At 3.3 V bias a 0603 10 V X5R part retains well under its nominal value, which matters because these converters use a fixed internal compensation; the datasheet minimum output capacitance is not in the verified parameter set, so the remaining capacitance cannot be checked against a stated floor.

Each output then passes through F1 / F2 (Littelfuse 467 series, 1.25 A, 32 V) to the camera FFC connectors J6 and J7. The fuse rating sits below the 1600 mA Irms of the series inductors it protects and above any load the converter can deliver, so the protection order is correct. Note that the LM3671 peak switch current limit is 1020 mA typical (830-1150 mA over temperature), so a downstream short is cleared by the converter's own limit and thermal shutdown rather than by the fuse; the fuse still stands against a failed source or a shorted cable, which is what it is there for. The 3V3_FFC1 / 3V3_FFC2 nets also reach the camera I2C pull-up nodes through R78 / R80 0R.

4.2.5 1.8 V LDOs (IC4, IC15)

AI-Assisted — Both 1.8 V rails use the TPS7A0518P fixed-1.8 V, 200 mA LDO. IC4 runs from 5V0_SYS into 1V8_SYS with C5 100 nF + C65 1 uF + C86 100 nF = 1.2 uF total, inside the datasheet's 0.47-22 uF output capacitor range; its EN is driven from the #RESET node through R92, so the rail follows the board reset chain. Input derating: abs max 6.0 V, derated 15% (regulator_input_voltage_pct = 85) permits 5.1 V, and the regulated 4.969 V of 5V0_SYS is applied — correctly rated.

IC15 runs from 5V0_DBG with EN tied to its own VIN, which the datasheet explicitly permits when shutdown is not needed, and drives 1V8_DBG (the FT232R VCCIO domain) with C66 1 uF, again inside the 0.47-22 uF range. 5V0_DBG originates at the debug USB VBUS on J9, whose stated window is 4.75-5.25 V; judged at the top of that band the 5.1 V derated permitted value is exceeded by the applied 5.25 V. When the port is unplugged the rail is instead fed from 5V0_SYS through D17 (1N4148WS), which drops up to 0.855 V at 10 mA, leaving roughly 4.1-4.3 V — still well above the 1.8 V output plus the 382 mV maximum dropout at 200 mA, so regulation holds on either source. Per-source decoupling is the same 2.3 uF on 5V0_DBG in both cases, since C67 and C72 sit on the common node.

4.2.6 USB Power Switches and Type-C Control

AI-Assisted — IC1 and IC3 are NCP380LSNAJAA current-limited high-side switches, both fed from 5V0_SYS (abs max 7 V, derated 15% permits 5.95 V against the applied 4.969 V). IC1 supplies the micro-B OTG port through L11 with C62 4.7 uF on the port side; IC3 supplies the Type-C port with C31 100 uF directly at its OUT pin, then L2 to USBC_VBUS where C35 10 uF sits. The onsemi datasheet's 15 kV air / 8 kV contact IEC 61000-4-2 figure is stated for the output with a 1 uF minimum bypass, which both ports satisfy — although for IC1 the only output capacitance is on the far side of the ferrite L11, so nothing bypasses the switch output pin locally.

Current-limit programming is the weak point: both ILIM pins use 10 kOhm to GND (R50, R138). The datasheet table gives 20 kOhm for 1.20 A and 40 kOhm for 0.700 A; 10 kOhm lies beyond the low end of that monotonic table and therefore programs a limit above 1.2 A, which is itself above the part's 1.0 A maximum rated output current — the setting is unspecified as drawn.

Enable polarity is correct on both. IC1's active-low EN is the OTG ID line, pulled to 5V0_SYS by R134 10k and pulled low by an OTG cable. IC3's active-low EN is held high by R102 100k and released by the HD3SS3220 (IC7) open-drain ID output through R49 0R. IC7's VBUS_DET uses R51 909k, inside the datasheet-required 880-910 kOhm series value; DIR uses R53 200k to 3V3_SYS and INT_N R67 200k to 5V0_SYS, both matching the datasheet's 200 kOhm requirement. R131 10k from USBC_VBUS to GND provides the source-side VBUS discharge path at 0.5 mA / 2.5 mW.

4.2.7 Enable and Sequencing Chain

AI-Assisted — U6 self-starts: R91 100k pulls EN up to Supply/5V_VIN, and with the device's 6 MOhm internal EN pull-down the pin sits at VIN x 6/6.1 = 0.984 x VIN, i.e. 35.4 V at the top of the 36 V window, inside the 55 V EN recommended maximum and 55 V absolute maximum. 5V0_SYS therefore appears as soon as the adapter is connected, carrying VDD_MOD to the module and the 5 V logic domain.

Everything else is gated by the #RESET node, which carries the module's ~SYS_RESET pin, the reset button RST1, and a 100 kOhm pull-down R139 to GND. From #RESET, R44 10k drives U2 EN, R39 and R52 10k drive U1 and U5 EN, and R92 drives IC4 EN — so 3V3_SYS, both camera 3.3 V rails and 1V8_SYS all come up only after the module releases reset. This ordering satisfies the HD3SS3220 requirement that VDD5 be present at least 2 ms before VCC33, since 5V0_SYS is up before 3V3_SYS by construction.

The power button path uses a 74HC00 latch (IC12) with the power-on-reset network R84 200k / C41 47 nF (9.4 ms) on ~PWR_SET, and an RC delay from Supply/Q to Supply/QDEL of R85 470k x C63 10 uF = 4.7 s, discharged quickly through D13 (orientation consistent: cathode on Q, anode on QDEL). IC13 buffers QDEL to PWR_EN at the module. The IC13 input threshold is not in the verified parameter set, so the resulting assert delay cannot be quantified, but with that time constant it is of the order of seconds — worth confirming against the intended button hold behaviour. PWR_GOOD from U6 additionally gates T4.

4.3 Observations

AI-Assisted — Fault indication is the most serious item. On Net-(IC3-FAULT) both terminals of LED1 (anode pin 2 and cathode pin 1) land on the same net, so the LED is shorted out and R43 470R connects 5V0_SYS straight to the open-drain FLAG pin; asserted, that pin must sink 5 V / 470 Ohm = 10.6 mA against a 1 mA absolute-maximum FLAG sink current (onsemi NCP380 datasheet). The IC1 indicator is wired correctly through LED2, but the same 470 Ohm series value applies: even taking an implausibly high 4 V LED forward drop the current is 2.1 mA, and at any realistic drop it is 5-7 mA — in both cases above the 1 mA limit. Drive the indicators from a small-signal transistor, or size the series resistor for under 1 mA and use a high-efficiency LED.

The VBUS-present detector on the OTG port does not have usable gate drive: R72 10k / R73 2k divide OTG_USB_VBUS to 0.167 x 5 V = 0.835 V at the gate of T6 (BSS138PW), whose source is at GND, against a gate threshold specified as 0.7 V minimum, 1.1 V typical and 1.5 V maximum (Nexperia/ElecSuper BSS138PW datasheet). Most parts will not turn on. Driving the gate from the rail directly, or with a much larger low-side resistor, resolves it.

F3's 12 A rating stands above both ferrites it feeds — FB1 at 10.5 A and FB3 at 3.1 A — so a fault in the 3.3 V converter input path can be carried indefinitely without the fuse acting. A rating in the 3-4 A class covers this board's demand and protects both ferrites.

The VIN input relies on ceramic capacitance placed after FB1/FB3; there is no bulk capacitance on the connector side. Hot-plugging a 12 V adapter into 20 uF of ceramic through cable inductance can ring to roughly twice the applied level, which both converters survive (60 V and 42 V absolute maxima) and which sits below the D14 standoff, so it is a ringing/EMI observation rather than a stress concern.

4.4 Findings

AI-Assisted —
#DeviceRailObservationRisk
4.4.1LED1 / IC3 (NCP380)USB/USBC_VBUSBoth LED1 terminals (pin 1 cathode, pin 2 anode) are on Net-(IC3-FAULT), shorting the indicator; R43 470R then ties 5V0_SYS directly to the open-drain FLAG pin. Rewire LED1 in series between R43 and the FLAG pin. Source: schematic connectivity.High
4.4.2IC3 (NCP380)5V0_SYSWith LED1 shorted, the FLAG pin sinks 5 V / 470 Ohm = 10.6 mA against the 1 mA maximum FLAG sink current (onsemi NCP380 datasheet). Raise the series resistance above 5 kOhm or buffer the output with a transistor.Medium
4.4.3IC1 (NCP380)5V0_SYSOTG_USB_FAULT drives LED2 through R135 470R from 5V0_SYS; even at a 4 V LED drop the sink is 2.1 mA, and at a normal drop 5-7 mA, against the 1 mA maximum FLAG sink current (onsemi NCP380 datasheet). Buffer the LED or size for under 1 mA.Medium
4.4.4T6 (BSS138PW)USB/OTG_USB_VBUSGate divider R72 10k / R73 2k applies 0.167 x 5 V = 0.835 V gate-to-source (source at GND), below the 1.5 V maximum VGS(th) (BSS138PW datasheet) - VBUS detection is not guaranteed to assert. Drive the gate from the rail or increase the low-side resistor.Medium
4.4.5F3 (Schurter UST1206)VINFuse rated 12 A protects FB1 (10.5 A) and FB3 (3.1 A) in series behind it; the fuse rating exceeds both, leaving a protection gap. A 3-4 A rating carries the board demand and protects both ferrites. Sources: Schurter UST1206 and Wurth 74279221100 / 74279220181 datasheets.Medium
4.4.6U4 (PCA9547)3V3_SYSThe NXP PCA9547 datasheet (page 7) requires a pull-up from RESET to VDD; the I2C_MUX_RESET net carries a 100 kOhm pull-down (R69) to GND and no pull-up, so the mux is held in reset absent an active driver. Add a pull-up to 3V3_SYS.Medium
4.4.7U2 (LMQ62440BPP-Q1)VINAbsolute maximum VIN 42 V; derated 15% (regulator_input_voltage_pct = 85) permits 35.7 V, and the top of the stated 6-36 V window applies 36 V. The recommended maximum 36 V is met un-derated, so only the derated limit is exceeded, and only at the window top. Source: TI LMQ62440-Q1 datasheet.Medium
4.4.8IC15 (TPS7A0518P)5V0_DBGAbsolute maximum VIN 6.0 V; derated 15% (regulator_input_voltage_pct = 85) permits 5.1 V, and the stated 4.75-5.25 V USB VBUS window applies 5.25 V at its top. Source: TI TPS7A05 datasheet.Medium
4.4.9F1, F2, F4, F5 (Littelfuse 467)3V3_FFC1 / 3V3_FFC2 / 3V3_SYSRated maximum operating temperature 90 C; the capacitor/fuse temperature rule requires the predicted temperature to sit at least 20 C below it (70 C), and the design's stated maximum ambient is 85 C. Source: Littelfuse 467 series datasheet.Medium
4.4.10IC7 (HD3SS3220)5V0_SYSVCONN_FAULT_N reaches only TP32; the datasheet lists a required 200 kOhm external pull-up for this open-drain output, so the pin floats as built. Add a 200 kOhm pull-up to VDD5. Source: TI HD3SS3220 datasheet.Low
4.4.11IC1 (NCP380)USB/OTG_USB_VBUSILIM uses R50 10k to GND; the datasheet table gives 20 kOhm = 1.20 A and 40 kOhm = 0.700 A. 10 kOhm lies beyond the low end of the monotonic table, so the programmed limit is unspecified and above the part's 1.0 A rated IOUT. Source: onsemi NCP380 datasheet.Review
4.4.12IC3 (NCP380)USB/USBC_VBUSILIM uses R138 10k to GND; same table mismatch as IC1 - the drawn value matches no row and implies a limit above the 1.0 A rated IOUT. Source: onsemi NCP380 datasheet.Review
4.4.13L1 (XFL4020-222MEC)3V3_SYSIsat 3.1 A at 10% drop; computed ripple 3.3 x 0.725 / (2.2 uH x 2.1 MHz) = 0.52 A means peak exceeds Isat above about 2.85 A DC. The 3V3_SYS load figure is not available, so the peak was not computed and the check is not closed. Sources: Coilcraft XFL4020 and TI LMQ62440-Q1 datasheets.Review
4.4.14L4 (IHLP3232DZER3R3M01)5V0_SYSIrms and Isat are not in the verified parameters and the fSW-setting resistor table for U6 is not either, so neither the ripple nor the peak current could be computed and the saturation and heating checks were not done. Source: Vishay IHLP3232DZ datasheet entry.Review
4.4.15C10, C11 (T520B337M006)VDD_MODKEMET confirms polymer tantalum dielectric, 6.3 V rated. The deterministic check cleared these under the ceramic limit; under the polymer tantalum line (60% derating) a 6.3 V part permits 3.78 V with 5 V applied. A 10 V class part removes the ambiguity. Source: KEMET T520 datasheet.Review
4.4.16C10, C11 (T520B337M006)VDD_MODMaximum category temperature 105 C requires the predicted temperature to be at or below 85 C; the design's stated maximum ambient is 85 C, leaving no margin for ripple self-heating (ripple rating 1260 mA rms at 85 C, ESR 40 mOhm). Self-heating was not computed. Source: KEMET T520 datasheet.Review
4.4.17D14 (SMBJ33A)VINVRWM 33 V, rail maximum 36 V, VBR(min) 36.7 V at 1 mA (a room-temperature figure): 0.7 V margin. At worst the part conducts its 1 mA test current at 36 V = 36 mW against a 5.0 W steady-state rating, so it is acceptable in the position; a 36 V class restores the leakage guarantee across the whole window. Source: Kyocera AVX SMBJ datasheet.Review
4.4.18D14 (SMBJ33A)VINClamping voltage at Ipp is not in the verified parameters, so the clamp level could not be compared against U2's 42 V and U6's 60 V input absolute maxima - the surge-coordination check was not done. Source: Kyocera AVX SMBJ datasheet.Review
4.4.19U2 (LMQ62440BPP-Q1)3V3_SYSPGOOD (pin 5) has no net at all - no pull-up, no test point, so the status output cannot be probed. Add at minimum a test point. Source: TI LMQ62440-Q1 datasheet (open-drain PGOOD).Review
4.4.20IC7 (HD3SS3220)5V0_SYSStrap options: PORT uses R55 2k where the datasheet recommends 4.7 kOhm for the tri-level pull-up (it still resolves high = DFP); ADDR options R126/R127 are 0R and do-not-install, so ADDR floats to its default; CURRENT_MODE option R54 is 0R and do-not-install, leaving the internal 250 kOhm pull-down and the 900 mA default advertisement. None of the drawn 0R values matches a table row. Source: TI HD3SS3220 datasheet.Review
4.4.21IC7 (HD3SS3220)5V0_SYSID is pulled up by R47 100k and, through R49 0R, also by R102 100k, giving roughly 50 kOhm to 5 V where the datasheet states 200 kOhm for this open-drain output; the sink current remains modest and the function is unaffected. Source: TI HD3SS3220 datasheet.Review
4.4.22U6 (SIC477)5V0_SYSMODE is set by R74 10k to AGND and fSW by R90 26k7 to AGND, but the resistor-to-mode and resistor-to-frequency tables are not in the verified parameters, so the selected operating mode and switching frequency were not decoded. Source: Vishay SiC477 datasheet.Review
4.4.23U6 (SIC477)5V0_SYSThe datasheet minimum output capacitance is not in the verified parameters, so the 168 uF fitted on 5V0_SYS could not be weighed against a stated floor; dielectric mix (3x47u + 10u + 10u + 3x2u2 + 4x100n) is appropriate for a ripple-injection control loop. Source: Vishay SiC477 datasheet.Review
4.4.24U2 (LMQ62440BPP-Q1)3V3_SYSThe datasheet minimum output capacitance is not in the verified parameters, so the 67.6 uF fitted on 3V3_SYS could not be weighed against a stated floor. Source: TI LMQ62440-Q1 datasheet.Review
4.4.25U1, U5 (LM3671-3.3)3V3_FFC1 / 3V3_FFC2Output capacitance is a single 10 uF 0603 10 V X5R part each (C23, C55), which loses significant capacitance at 3.3 V DC bias; the datasheet minimum output capacitance is not in the verified parameters, so the remaining value could not be checked against a stated floor. Source: TI LM3671 datasheet.Review
4.4.26U6 / U2VINNo bulk (non-ceramic) capacitance exists on the connector side of FB1/FB3; hot-plug ringing into 20.1 uF of ceramic is limited by cable inductance only. Both converters withstand the resulting overshoot (60 V and 42 V absolute maxima), so this is an EMI/ringing note. Sources: Vishay SiC477 and TI LMQ62440-Q1 datasheets.Review
4.4.275V0_SYS / VDD_MOD5V0_SYSNo load-current figure is available for the module or the 5 V logic, so the check of U6's 8 A rating (70% derating, 5.6 A permitted), of FB2's 10.5 A rating and of L4 was not done. Sources: Vishay SiC477 and Wurth 74279221100 datasheets.Review
4.4.28F3 (Schurter UST1206)VINThe maximum operating temperature is not stated in the verified parameters for this part, so the fuse temperature-margin check was not done against the 85 C stated ambient. Source: Schurter UST1206 datasheet.Review
4.4.29IC13 / IC12 (power latch)5V0_SYSR85 470k x C63 10 uF gives a 4.7 s time constant from Supply/Q to Supply/QDEL before PWR_EN asserts; the IC13 input threshold is not in the verified parameters, so the resulting delay was not quantified. Source: schematic values.Review
4.4.30C17, C22, C56, C71, C83, C88, C90, C72, C58Supply/5V_VIN, 5V0_SYS, 5V0_DBG50 V (and 25 V for C58) rated parts derated 20% (capacitor_voltage_pct) permit 40 V / 20 V against 5-5.25 V applied - correctly rated but over-specified for the position; a 16 V class serves. Review note only, not a fault.Review
4.4.31U6 (SIC477)VIN / Supply/5V_VINInput absolute maximum 60 V derated 15% (regulator_input_voltage_pct = 85) permits 51 V, and the top of the stated 6-36 V window applies 36 V; recommended range 4.5-55 V is met un-derated. Source: Vishay SiC477 datasheet.✓
4.4.32U6 (SIC477)Supply/5V_FBR117 52k3 / R120 10k, ratio 0.161 against the verified 0.800 V VFB reference, gives 4.969 V, inside the 0.8-15 V output range. Source: Vishay SiC477 datasheet.✓
4.4.33U6 (SIC477)Supply/5V_SSC58 33 nF with the 5 uA typical soft-start current gives 33 nF x 0.8 V / 5 uA = 5.3 ms (3.8-13.2 ms across the 2-7 uA range). Source: Vishay SiC477 datasheet.✓
4.4.34U6 (SIC477)Supply/5V_ILIMILIMIT tied to VDD through R76 0R selects the 100% setting, 10 A typical valley current limit; the 60k4 alternative R77 is do-not-install. Source: Vishay SiC477 datasheet.✓
4.4.35U6 (SIC477)PWR_GOODOpen-drain PGOOD pulled up by R96 100k to the device's own VDD LDO output and brought to TP40 - a valid pull-up arrangement for an open-drain status output. Source: Vishay SiC477 datasheet.✓
4.4.36U6 (SIC477)Supply/5V_ENEN pulled to Supply/5V_VIN through R91 100k; with the 6 MOhm internal pull-down the pin sits at 0.984 x VIN = 35.4 V at the window top, inside the 55 V recommended and absolute maximum. Valid auto-enable configuration. Source: Vishay SiC477 datasheet.✓
4.4.37U2 (LMQ62440BPP-Q1)Supply/3V3_FBFB returned to 3V3_SYS through R48 0R, exactly the connection the datasheet specifies for the fixed 3.3 V option; the alternative divider R118/R119 is do-not-install. Output 3.2587-3.3413 V at 13.5 V in. Source: TI LMQ62440-Q1 datasheet.✓
4.4.38U2 (LMQ62440BPP-Q1)Supply/3V3_R_C_BOOTC89 100 nF between SW and CBOOT and R70 100R from CBOOT to RBOOT match the datasheet's stated bootstrap and slew-control connections; BIAS tied to 3V3_SYS and VCC loaded only by C87 1 uF, as required. Source: TI LMQ62440-Q1 datasheet.✓
4.4.39IC4 (TPS7A0518P)1V8_SYSOutput capacitance 1.2 uF (C5 + C65 + C86) is inside the 0.47-22 uF range; input absolute maximum 6.0 V derated 15% permits 5.1 V against 4.969 V applied. Source: TI TPS7A05 datasheet.✓
4.4.40IC15 (TPS7A0518P)1V8_DBGOutput capacitance 1 uF (C66) is inside the 0.47-22 uF range; EN tied to VIN is the datasheet-permitted connection when shutdown is not needed. Source: TI TPS7A05 datasheet.✓
4.4.41D17 (1N4148WS)5V0_DBGCathode on 5V0_DBG, anode on 5V0_SYS - correct steering orientation, blocking back-feed from the debug USB VBUS into the system 5 V rail; 75 V reverse rating, derated 30%, permits 52.5 V against 5.25 V reverse. Source: Panjit 1N4148WS datasheet.✓
4.4.42D9, D1 (ESD5B5.0ST1G)5V0_SYS / 3V3_SYSBidirectional parts with no orientation to check; VRWM 5.0 V covers the 4.969 V and 3.3 V rail maxima, so leakage is fully guaranteed (1.0 uA maximum at 5 V). Source: onsemi ESD5B5.0ST1G datasheet.✓
4.4.43D14 (SMBJ33A)VINCathode on VIN, anode on GND - correct orientation for a unidirectional TVS on a positive rail, placed downstream of F3. Source: Kyocera AVX SMBJ datasheet.✓
4.4.44IC7 (HD3SS3220)USB/USBC_VBUSVBUS_DET series resistor R51 909k is inside the required 880-910 kOhm window; DIR pull-up R53 200k and INT_N pull-up R67 200k both match the stated 200 kOhm requirement. Source: TI HD3SS3220 datasheet.✓
4.4.45IC7 (HD3SS3220)5V0_SYS / 3V3_SYSVDD5 at 4.969 V is inside the 4.5-5.5 V range and VCC33 at 3.3 V inside the 3.0-3.6 V range; 5V0_SYS is established before 3V3_SYS by the reset gating, satisfying the 2 ms VDD5-before-VCC33 requirement. VDD5 sees 168 uF, covering the 10-200 uF VCONN bulk requirement. Source: TI HD3SS3220 datasheet.✓
4.4.46IC1, IC3 (NCP380)5V0_SYSInput absolute maximum 7.0 V derated 15% permits 5.95 V against 4.969 V applied; the 1 uF minimum input bypass is met on 5V0_SYS and the 1 uF minimum output bypass for the IEC 61000-4-2 figure is met by C62 4.7 uF and C31 100 uF respectively. Source: onsemi NCP380 datasheet.✓
4.4.47F1, F2 (Littelfuse 467, 1.25 A)3V3_FFC1 / 3V3_FFC2Fuse rating 1.25 A sits below the 1600 mA Irms of the series inductors L5/L6 it protects and above the converters' 1150 mA maximum switch current limit - correctly applied in the position. Sources: Littelfuse 467 and Murata LQH32PN2R2NN0L datasheets.✓
4.4.48U1, U5 (LM3671-3.3)5V0_SYSInput absolute maximum 6 V derated 15% permits 5.1 V against 4.969 V applied; recommended 2.7-5.5 V met un-derated. Source: TI LM3671 datasheet.✓
4.4.49IC12 (74HC00)5V0_SYSAbsolute maximum VCC 7 V; at the HC factor of 75% (MIL-STD-975M 3.8 note 4) the permitted value is 5.25 V and 4.969 V is applied; the 2.0-6.0 V recommended range is met. Source: Nexperia 74HC00 datasheet.✓
4.4.50U4 (PCA9547)3V3_SYSSupply 3.3 V is inside the 2.3-3.6 V recommended range, judged un-derated; A0/A1/A2 are tied to GND, matching the datasheet requirement for an external level-setting connection. Source: NXP PCA9547 datasheet.✓
4.4.51U7 (MAX3051)3V3_SYSSupply range 3.14-3.47 V is covered by U2's 3.2587-3.3413 V output; RS is tied to GND through R121 0R, selecting high-speed mode (up to 1 Mbps), which the datasheet pairs with shielded twisted-pair cabling. Source: Maxim MAX3051 datasheet.✓
4.4.52IC17 (AT24CS01)ID Serial/EEPROM_PWRSupplied from 3V3_SYS through D15 (anode on 3V3_SYS, cathode on EEPROM_PWR - correct orientation); with a forward drop up to 0.715 V at 1 mA the rail is at least 2.58 V, inside the 1.7-5.5 V supply range. Sources: Atmel AT24CS01 and Panjit 1N4148WS datasheets.✓
4.4.53R131USB/USBC_VBUS10 kOhm from USBC_VBUS to GND provides the Type-C source VBUS discharge path at 0.5 mA and 2.5 mW, inside the 45%-derated 0402 power convention. Source: schematic values.✓
4.4.54D6, D7, D8 (TPD4E05U06-Q1)USB data lines5.5 V standoff covers the 5.5 V Type-C worst case on the protected I/O; GND pins 3 and 8 returned to GND on every device. Source: TI TPD4E05U06-Q1 datasheet.✓
4.4.55U6, U2, U1, U5, IC4, IC15allAll supply and ground pins of every power device carry a DC path: U6 PGND (9,10,11,17) and AGND (23,28), U2 PGND (9,11) and AGND (3), U1/U5 GND (2), IC4/IC15 GND (2) are on GND; VIN/VCIN pins are on their respective input rails. No supply or ground pin terminates on capacitor plates alone. Source: schematic connectivity.✓

4.5 Citations

AI-Assisted —
References
04671.25 (Littelfuse) — datasheet
www.littelfuse.com/~/media/electronics/datasheets/fuses/l...
1N4148WS (Panjit International Inc.) — datasheet, cited pages 1,3
www.panjit.com.tw/upload/datasheet/1N4148WS.pdf
3413.0329 (SCHURTER AG) — datasheet, cited pages 4
us.schurter.com/pdf/english/typ_UST_1206.pdf
74279220181 (Würth Elektronik) — datasheet
www.we-online.com/components/products/datasheet/742792201...
74279221100 (Würth Elektronik) — datasheet
www.we-online.com/catalog/datasheet/74279221100.pdf
74HC00 (Nexperia) — datasheet
assets.nexperia.com/documents/data-sheet/74HC_HCT00.pdf
AT24CS01 (Atmel) — datasheet
ww1.microchip.com/downloads/en/devicedoc/Atmel-8815-SEEPR...
BLM18SG121TN1 (Murata Manufacturing Co., Ltd.) — datasheet
www.mouser.com/datasheet/2/281/ENFA0003-769587.pdf
BSS138PW (ElecSuper) — datasheet
ruelectronics.com/files/Datasheet_BSS138PW_ElecSuper-cfd8...
ESD5B5.0ST1G (onsemi) — datasheet
www.mouser.com/datasheet/2/308/ESD5B5_0ST1_D-1805066.pdf
HD3SS3220 (Texas Instruments) — datasheet, cited pages 1
www.ti.com/lit/ds/symlink/hd3ss3220.pdf?ts=1663000043694&...
IHLP/IHLG IHLP3232DZ / IHLG3232DZ Series Inductor (Vishay Dale) — datasheet
IHLP2020BZERR10M01.pdf
LG L29K-G2J1-24 (ams-OSRAM) — datasheet
www.farnell.com/datasheets/4535403.pdf
LM3671-3.3 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/lm3671.pdf?ts=1683686068398&ref...
LMQ62440BPP-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/lmq62440-q1.pdf?ts=1636528724430
LQH32PN2R2NN0 (Murata Manufacturing Co., Ltd.) — datasheet
pim.murata.com/asset/pim4/inductor/JELF243A-0061_PDF_INDU...
MAX3051 (Maxim Integrated) — datasheet
www.mouser.com/datasheet/2/256/MAX3051-1280983.pdf
NCP380LSNAJAA (onsemi (Semiconductor Components Industries, LLC)) — datasheet
www.onsemi.com/pub/Collateral/NCP380JP-D.PDF
PCA9547 (NXP Semiconductors) — datasheet
www.nxp.com/docs/en/data-sheet/PCA9547.pdf
SiC477 (Vishay Siliconix) — datasheet, cited pages 1
www.vishay.com/docs/77113/sic47x.pdf
SMBJ (Kyocera AVX) — datasheet, cited pages 1,2,3
datasheets.kyocera-avx.com/tvsdiodes.pdf
T520B337M006ATE040 (KEMET) — datasheet
www.yageogroup.com/component-documentation/download/specs...
TL3340 (E-Switch) — datasheet, cited pages 1,2
mouser.com/datasheet/2/140/TL3340-2065742.pdf
TPD4E05U06-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tpd4e05u06-q1.pdf?HQS=dis-mous-...
TPD8S009 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tpd8s009.pdf?ts=1679406571326&r...
TPS7A0518P (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tps7a05.pdf?ts=1678973651768&re...
XFL4020-222ME (Coilcraft) — datasheet
www.mouser.com/datasheet/2/597/xfl4020-270756.pdf

5 Connector Pinouts

Total connectors15

5.1 J1 467651001

J1 - 467651001 (467651001)
PinPin NameNetNotes
1HPD/HEAC-Display/TMDS_HPD_IN
2UTILITY/HEAC+NC
3D2+Display/TMDS_D2_C_P
4D2SHDMI_SHIELD
5D2-Display/TMDS_D2_C_N
6D1+Display/TMDS_D1_C_P
7D1SHDMI_SHIELD
8D1-Display/TMDS_D1_C_N
9D0+Display/TMDS_D0_C_P
10D0SHDMI_SHIELD
11D0-Display/TMDS_D0_C_N
12CK+Display/TMDS_CLK_C_P
13CKSHDMI_SHIELD
14CK-Display/TMDS_CLK_C_N
15CECDisplay/TMDS_CEC_IN
16GNDNet-(J1-GND)
17SCLDisplay/TMDS_SCL_5V0
18SDADisplay/TMDS_SDA_5V0
19+5VNet-(D4-C)
SHSHHDMI_SHIELD

5.2 J2 2129320-3

J2 - 2129320-3 (2129320-3)
PinPin NameNetNotes
1GNDGND
2HPDDisplay/DP_HPD_IN
3TXD0+Display/ML_C_LANE0_P
4CFG1Display/DP_MODE
5TXD0-Display/ML_C_LANE0_N
6CFG2Display/DP_CEC
7GNDGND
8GNDGND
9TXD1+Display/ML_C_LANE1_P
10TXD3+Display/ML_C_LANE3_P
11TXD1-Display/ML_C_LANE1_N
12TXD3-Display/ML_C_LANE3_N
13GNDGND
14GNDGND
15TXD2+Display/ML_C_LANE2_P
16AUX+Display/EDP_C_AUX_C_P
17TXD2-Display/ML_C_LANE2_N
18AUX-Display/EDP_C_AUX_C_N
19GNDGND
20DP_PWRNet-(D2-C)
SHSHGND

5.3 J3 SI-51005-F

J3 - SI-51005-F (SI-51005-F)
PinPin NameNetNotes
1GNDGND
2D0+ENET_TRD0_P
3D0-ENET_TRD0_N
4D1+ENET_TRD1_P
5D1-ENET_TRD1_N
6CTREFNC
7D2+ENET_TRD2_P
8D2-ENET_TRD2_N
9D3+ENET_TRD3_P
10D3-ENET_TRD3_N
1111ENET_LED1
1212Net-(J3-Pad12)
1313ENET_LED0
1414Net-(J3-Pad14)
SSHIELDEGND

5.4 J4 MJ-179PH

J4 - MJ-179PH (MJ-179PH)
PinPin NameNetNotes
11Net-(F3-Pad1)
22GND
33GND

5.5 J5 473460001

J5 - 473460001 (473460001)
PinPin NameNetNotes
1VBUSUSB/OTG_USB_VBUS
2D-OTG_USB_D_N
3D+OTG_USB_D_P
4IDUSB/OTG_USB_ID
5GNDGND
SHSHIELDNet-(J5-SHIELD)

5.6 J6 68715014522

J6 - 68715014522 (68715014522)
PinPin NameNetNotes
1~NC
2~NC
3~NC
4~NC
5~CSI/CSI_G_D1_N
6~CSI/CSI_G_D1_P
7~CSI/CSI_G_D0_N
8~CSI/CSI_G_D0_P
9~GND
10~CSI/CSI_G_CLK_N
11~CSI/CSI_G_CLK_P
12~GND
13~NC
14~NC
15~GND
16~NC
17~NC
18~GND
19~CSI/CSI_F_D1_N
20~CSI/CSI_F_D1_P
21~CSI/CSI_F_D0_N
22~CSI/CSI_F_D0_P
23~CSI/CSI_E_D1_N
24~CSI/CSI_E_D1_P
25~CSI/CSI_E_D0_N
26~CSI/CSI_E_D0_P
27~GND
28~CSI/CSI_E_CLK_N
29~CSI/CSI_E_CLK_P
30~GND
31~NC
32~VSYNC_CAM1_1
33~NC
34~VSYNC_CAM1_2
35~NC
36~NC
37~NC
38~NC
39~CSI/CAM0_SDA
40~CSI/CAM0_SCL
41~CSI/CAM1_SDA
42~CSI/CAM1_SCL
43~NC
44~NC
45~NC
46~NC
47~3V3_FFC1
48~3V3_FFC1
49~5V0_SYS
50~5V0_SYS
MP1MPNC
MP2MPNC

5.7 J7 68715014022

J7 - 68715014022 (68715014022)
PinPin NameNetNotes
1~5V0_SYS
2~5V0_SYS
3~3V3_FFC2
4~3V3_FFC2
5~NC
6~NC
7~NC
8~NC
9~CSI/CAM2_SCL
10~CSI/CAM2_SDA
11~CSI/CAM3_SCL
12~CSI/CAM3_SDA
13~NC
14~NC
15~NC
16~NC
17~VSYNC_CAM2_2
18~NC
19~VSYNC_CAM2_1
20~NC
21~GND
22~CSI/CSI_A_CLK_P
23~CSI/CSI_A_CLK_N
24~GND
25~CSI/CSI_A_D0_P
26~CSI/CSI_A_D0_N
27~CSI/CSI_A_D1_P
28~CSI/CSI_A_D1_N
29~CSI/CSI_B_D0_P
30~CSI/CSI_B_D0_N
31~CSI/CSI_B_D1_P
32~CSI/CSI_B_D1_N
33~GND
34~NC
35~NC
36~GND
37~NC
38~NC
39~GND
40~CSI/CSI_C_CLK_P
41~CSI/CSI_C_CLK_N
42~GND
43~CSI/CSI_C_D0_P
44~CSI/CSI_C_D0_N
45~CSI/CSI_C_D1_P
46~CSI/CSI_C_D1_N
47~CSI/CSI_D_D0_P
48~CSI/CSI_D_D0_N
49~CSI/CSI_D_D1_P
50~CSI/CSI_D_D1_N
MP1MPNC
MP2MPNC

5.8 J8 MDT580M01001

J8 - MDT580M01001 (MDT580M01001)
PinPin NameNetNotes
1GNDGND
23V33V3_SYS
3GNDGND
43V33V3_SYS
5PER3_NPCIE0_RX3_N
6NCNC
7PER3_PPCIE0_RX3_P
8NCNC
9GNDGND
10LEDNet-(J8-LED)
11PET3_NInterfaces/C_PCIE0_TX3_N
123V33V3_SYS
13PET3_PInterfaces/C_PCIE0_TX3_P
143V33V3_SYS
15GNDGND
163V33V3_SYS
17PER2_NPCIE0_RX2_N
183V33V3_SYS
19PER2_PPCIE0_RX2_P
20NCNC
21GNDGND
22NCNC
23PET2_NInterfaces/C_PCIE0_TX2_N
24NCNC
25PET2_PInterfaces/C_PCIE0_TX2_P
26NCNC
27GNDGND
28NCNC
29PER1_NPCIE0_RX1_N
30NCNC
31PER1_PPCIE0_RX1_P
32NCNC
33GNDGND
34NCNC
35PET1_NInterfaces/C_PCIE0_TX1_N
36NCNC
37PET1_PInterfaces/C_PCIE0_TX1_P
38NCNC
39GNDGND
40SMB_CLKNet-(J8-SMB_CLK)
41PER0_NPCIE0_RX0_N
42SMB_DATANet-(J8-SMB_DATA)
43PER0_PPCIE0_RX0_P
44ALERTM2_ALERT
45GNDGND
46NCNC
47PET0_NInterfaces/C_PCIE0_TX0_N
48NCNC
49PET0_PInterfaces/C_PCIE0_TX0_P
50PERST#PEX_L0_RST_N
51GNDGND
52CLKREQ#PEX_L0_CLKREQ_N
53REFCLK_NPCIE0_CLK_N
54PEWAKE#\PEWAKE_3V3
55REFCLK_PPCIE0_CLK_P
56NCNC
57GNDGND
58NCNC
67NCNC
68SUSCLKNC
69NCNC
703V33V3_SYS
71GNDGND
723V33V3_SYS
73GNDGND
743V33V3_SYS
75GNDGND
SH1SHIELDGND
SH2SHIELDGND

5.9 J9 473460001

J9 - 473460001 (473460001)
PinPin NameNetNotes
1VBUSUSB/USB_DBG_VBUS
2D-USB/DBG_USB_D_N
3D+USB/DBG_USB_D_P
4IDNC
5GNDGND
SHSHIELDGND

5.10 J10 5051101097

J10 - 5051101097 (5051101097)
PinPin NameNetNotes
1~3V3_SYS
2~PCIE1_RST
3~PCIE1_CLKREQ
4~PCIE1_CLK_P
5~PCIE1_CLK_N
6~PCIE1_TX0_P
7~PCIE1_TX0_N
8~PCIE1_RX0_P
9~PCIE1_RX0_N
10~GND
MP1MPNC
MP2MPNC

5.11 J11 632723300011

J11 - 632723300011 (632723300011)
PinPin NameNetNotes
A1GNDGND
A2TX1+USB/C_USBSS_TX1_P
A3TX1-USB/C_USBSS_TX1_N
A4VBUSUSB/USBC_VBUS
A5CC1USB/C_CC1
A6DA+USB1_D_P
A7DA-USB1_D_N
A8SBU1NC
A9VBUSUSB/USBC_VBUS
A10RX2-USB/C_USBSS_RX2_N
A11RX2+USB/C_USBSS_RX2_P
A12GNDGND
B1GNDGND
B2TX2+USB/C_USBSS_TX2_P
B3TX2-USB/C_USBSS_TX2_N
B4VBUSUSB/USBC_VBUS
B5CC2USB/C_CC2
B6DB+USB1_D_P
B7DB-USB1_D_N
B8SBU2Net-(J11-SBU2)
B9VBUSUSB/USBC_VBUS
B10RX1-USB/C_USBSS_RX1_N
B11RX1+USB/C_USBSS_RX1_P
B12GNDGND
SHSHGND

5.12 J12 0533980471

J12 - 0533980471 (0533980471)
PinPin NameNetNotes
11GND
225V0_SYS
33Supply/FAN_TACH_5V
44Supply/FAN_PMW_5V
MP1MP1NC
MP2MP2NC

5.13 J13 SM04B-SRSS-TB(LF)(SN)

J13 - SM04B-SRSS-TB(LF)(SN) (SM04B-SRSS-TB(LF)(SN))
PinPin NameNetNotes
1~Net-(F4-Pad2)
2~Interfaces/CANH
3~Interfaces/CANL
4~GND
MP~GND

5.14 J14 SM04B-SRSS-TB(LF)(SN) (I2C)

J14 - SM04B-SRSS-TB(LF)(SN) (I2C) (SM04B-SRSS-TB(LF)(SN))
PinPin NameNetNotes
1~GND
2~Net-(F5-Pad2)
3~I2C1_SDA
4~I2C1_SCL
MP~GND

5.15 J15 2309413-1

J15 - 2309413-1 (2309413-1)
PinPin NameNetNotes
1GNDGND
2GNDGND
3CSI1_D0_NCSI/CSI_B_D0_N
4CSI0_D0_NCSI/CSI_A_D0_N
5CSI1_D0_PCSI/CSI_B_D0_P
6CSI0_D0_PCSI/CSI_A_D0_P
7GNDGND
8GNDGND
9(CSI1_CLK)RSVDNet-(J15B-(CSI1_CLK)RSVD)
10CSI0_CLK_NCSI/CSI_A_CLK_N
11(CSI1_CLK)RSVDNet-(J15B-(CSI1_CLK)RSVD)
12CSI0_CLK_PCSI/CSI_A_CLK_P
13GNDGND
14GNDGND
15CSI1_D1_NCSI/CSI_B_D1_N
16CSI0_D1_NCSI/CSI_A_D1_N
17CSI1_D1_PCSI/CSI_B_D1_P
18CSI0_D1_PCSI/CSI_A_D1_P
19GNDGND
20GNDGND
21CSI3_D0_NCSI/CSI_F_D0_N
22CSI2_D0_NCSI/CSI_E_D0_N
23CSI3_D0_PCSI/CSI_F_D0_P
24CSI2_D0_PCSI/CSI_E_D0_P
25GNDGND
26GNDGND
27CSI3_CLK_NNC
28CSI2_CLK_NCSI/CSI_E_CLK_N
29CSI3_CLK_PNC
30CSI2_CLK_PCSI/CSI_E_CLK_P
31GNDGND
32GNDGND
33CSI3_D1_NCSI/CSI_F_D1_N
34CSI2_D1_NCSI/CSI_E_D1_N
35CSI3_D1_PCSI/CSI_F_D1_P
36CSI2_D1_PCSI/CSI_E_D1_P
37GNDGND
38GNDGND
39DP0_TXD0_NDisplay/EDP0_TX_N
40CSI4_D2_NCSI/CSI_D_D0_N
41DP0_TXD0_PDisplay/EDP0_TX_P
42CSI4_D2_PCSI/CSI_D_D0_P
43GNDGND
44GNDGND
45DP0_TXD1_NDisplay/EDP1_TX_N
46CSI4_D0_NCSI/CSI_C_D0_N
47DP0_TXD1_PDisplay/EDP1_TX_P
48CSI4_D0_PCSI/CSI_C_D0_P
49GNDGND
50GNDGND
51DP0_TXD2_NDisplay/EDP2_TX_N
52CSI4_CLK_NCSI/CSI_C_CLK_N
53DP0_TXD2_PDisplay/EDP2_TX_P
54CSI4_CLK_PCSI/CSI_C_CLK_P
55GNDGND
56GNDGND
57DP0_TXD3_NDisplay/EDP3_TX_N
58CSI4_D1_NCSI/CSI_C_D1_N
59DP0_TXD3_PDisplay/EDP3_TX_P
60CSI4_D1_PCSI/CSI_C_D1_P
61GNDGND
62GNDGND
63DP1_TXD0_NDisplay/TMDS_D2_N
64CSI4_D3_NCSI/CSI_D_D1_N
65DP1_TXD0_PDisplay/TMDS_D2_P
66CSI4_D3_PCSI/CSI_D_D1_P
67GNDGND
68GNDGND
69DP1_TXD1_NDisplay/TMDS_D1_N
70DSI_D0_NCSI/CSI_G_D0_N
71DP1_TXD1_PDisplay/TMDS_D1_P
72DSI_D0_PCSI/CSI_G_D0_P
73GNDGND
74GNDGND
75DP1_TXD2_NDisplay/TMDS_D0_N
76DSI_CLK_NCSI/CSI_G_CLK_N
77DP1_TXD2_PDisplay/TMDS_D0_P
78DSI_CLK_PCSI/CSI_G_CLK_P
79GNDGND
80GNDGND
81DP1_TXD3_NDisplay/TMDS_CLK_N
82DSI_D1_NCSI/CSI_G_D1_N
83DP1_TXD3_PDisplay/TMDS_CLK_P
84DSI_D1_PCSI/CSI_G_D1_P
85GNDGND
86GNDGND
87GPIO00OTG_USB_VBUS_DET
88DP0_HPDDisplay/DP_HPD
89SPI0_MOSINC
90DP0_AUX_NDisplay/EDP_AUX_N
91SPI0_SCKNC
92DP0_AUX_PDisplay/EDP_AUX_P
93SPI0_MISONC
94HDMI_CECDisplay/TMDS_CEC
95SPI0_CS0NC
96DP1_HPDTMDS_HPD
97SPI0_CS1NC
98DP1_AUX_NDisplay/TMDS_SDA
99UART0_TXDNC
100DP1_AUX_PDisplay/TMDS_SCL
101UART0_RXDNC
102GNDGND
103UART0_RTSNC
104SPI1_MOSINC
105UART0_CTSNC
106SPI1_SCKNC
107GNDGND
108SPI1_MISONC
109USB0_D_NOTG_USB_D_N
110SPI1_CS0NC
111USB0_D_POTG_USB_D_P
112SPI1_CS1NC
113GNDGND
114CAM0_PWDNVSYNC_CAM2_1
115USB1_D_NUSB1_D_N
116CAM0_MCLKNC
117USB1_D_PUSB1_D_P
118GPIO01Net-(J15B-GPIO01)
119GNDGND
120CAM1_PWDNNet-(J15B-CAM1_PWDN)
121USB2_D_NNC
122CAM1_MCLKNC
123USB2_D_PNC
124GPIO02NC
125GNDGND
126GPIO03NC
127GPIO04I2C_MUX_RESET
128GPIO05OTG_USB_ID_DET
129GNDGND
130GPIO06VSYNC_CAM2_2
131PCIE0_RX0_NPCIE0_RX0_N
132GNDGND
133PCIE0_RX0_PPCIE0_RX0_P
134PCIE0_TX0_NPCIE0_TX0_N
135GNDGND
136PCIE0_TX0_PPCIE0_TX0_P
137PCIE0_RX1_NPCIE0_RX1_N
138GNDGND
139PCIE0_RX1_PPCIE0_RX1_P
140PCIE0_TX1_NPCIE0_TX1_N
141GNDGND
142PCIE0_TX1_PPCIE0_TX1_P
143(CAN_RX)RSVDCAN_RXD
144GNDGND
145(CAN_TX)RSVDCAN_TXD
146GNDGND
147GNDGND
148PCIE0_TX2_NPCIE0_TX2_N
149PCIE0_RX2_NPCIE0_RX2_N
150PCIE0_TX2_PPCIE0_TX2_P
151PCIE0_RX2_PPCIE0_RX2_P
152GNDGND
153GNDGND
154PCIE0_TX3_NPCIE0_TX3_N
155PCIE0_RX3_NPCIE0_RX3_N
156PCIE0_TX3_PPCIE0_TX3_P
157PCIE0_RX3_PPCIE0_RX3_P
158GNDGND
159GNDGND
160PCIE0_CLK_NPCIE0_CLK_N
161USBSS_RX_NUSBSS_RX6_N
162PCIE0_CLK_PPCIE0_CLK_P
163USBSS_RX_PUSBSS_RX6_P
164GNDGND
165GNDGND
166USBSS_TX_NUSBSS_TX6_N
167PCIE1_RX0_NPCIE1_RX0_N
168USBSS_TX_PUSBSS_TX6_P
169PCIE1_RX0_PPCIE1_RX0_P
170GNDGND
171GNDGND
172PCIE1_TX0_NPCIE1_TX0_N
173PCIE1_CLK_NPCIE1_CLK_N
174PCIE1_TX0_PPCIE1_TX0_P
175PCIE1_CLK_PPCIE1_CLK_P
176GNDGND
177GNDGND
178MOD_SLEEPNC
179PCIE_WAKE\PEWAKE_3V3
180PCIE0_CLKREQPEX_L0_CLKREQ_N
181PCIE0_RSTPEX_L0_RST_N
182PCIE1_CLKREQPCIE1_CLKREQ
183PCIE1_RSTPCIE1_RST
184GBE_MDI0_NENET_TRD0_N
185I2C0_SCLGEN0_SCL
186GBE_MDI0_PENET_TRD0_P
187I2C0_SDAGEN0_SDA
188GBE_LED_LINKENET_LED1
189I2C1_SCLI2C1_SCL
190GBE_MDI1_NENET_TRD1_N
191I2C1_SDAI2C1_SDA
192GBE_MDI1_PENET_TRD1_P
193I2S0_DOUTNC
194GBE_LED_ACTENET_LED0
195I2S0_DINNC
196GBE_MDI2_NENET_TRD2_N
197I2S0_FSNC
198GBE_MDI2_PENET_TRD2_P
199I2S0_SCLKNC
200GNDGND
201GNDGND
202GBE_MDI3_NENET_TRD3_N
203PCIE1_CLKREQNC
204GBE_MDI3_PENET_TRD3_P
205PCIE1_CLKNC
206GPIO07USR_LED
207UART1_RTSNC
208GPIO08FAN_TACH
209PCIE1_RSTNC
210CLK_32K_OUTNC
211GPIO09NC
212GPIO10M2_ALERT
213CAM_I2C_SCLCSI/CAM_I2C_SCL
214FORCE_RECOVERY#RECOVERY
215CAM_I2C_SDACSI/CAM_I2C_SDA
216GPIO11VSYNC_CAM1_2
217GNDGND
218GPIO12USR_BUTTON
219SDMMC_DAT0NC
220I2S1_DOUTNC
221SDMMC_DAT1NC
222I2S1_DINNC
223SDMMC_DAT2NC
224I2S1_FSNC
225SDMMC_DAT3NC
226I2S1_SCLKNC
227SDMMC_CMDNC
228GPIO13VSYNC_CAM1_1
229SDMMC_CLKNC
230GPIO14FAN_PWM
231GNDGND
232I2C2_SCLNC
233SHUTDOWN_REQ#SHUTDOWN_REQ
234I2C2_SDANC
235PMIC_BBATSoM/PMIC_BBAT
236UART2_TXDUART1_TX
237POWER_ENPWR_EN
238UART2_RXDUART1_RX
239SYS_RESET#RESET
240SLEEP/WAKE#PWR_BUTTON
241GNDGND
242GNDGND
243GNDGND
244GNDGND
245GNDGND
246GNDGND
247GNDGND
248GNDGND
249GNDGND
250GNDGND
251VDD_INVDD_MOD
252VDD_INVDD_MOD
253VDD_INVDD_MOD
254VDD_INVDD_MOD
255VDD_INVDD_MOD
256VDD_INVDD_MOD
257VDD_INVDD_MOD
258VDD_INVDD_MOD
259VDD_INVDD_MOD
260VDD_INVDD_MOD
261MNTGND
262MNTGND

6 Indicator Documentation

6 indicator device(s) found.

6.1 Indicator Assignments

Indicators
RefDesTypeColorSignalSheetNotes
LED1LED_G_0603_LG_L29K-G2J1-24-Z-Net-(IC3-FAULT)usb-debug.kicad_schR43 (470R); A:Net-(IC3-FAULT) K:Net-(IC3-FAULT)
LED2LED_G_0603_LG_L29K-G2J1-24-Z-USB/OTG_USB_FAULTusb-debug.kicad_schLOW = On; R135 (470R); A:Net-(LED2-A) K:USB/OTG_USB_FAULT
NVME1LED_G_0603_LG_L29K-G2J1-24-Z-Net-(J8-LED)interfaces.kicad_schR128 (220R); A:Net-(NVME1-A) K:Net-(J8-LED)
USER1LED_G_0603_LG_L29K-G2J1-24-Z-Net-(T5-D)som.kicad_schR111 (470R); A:Net-(USER1-A) K:Net-(T5-D)
PWR1LED_G_0603_LG_L29K-G2J1-24-Z-Net-(PWR1-C)som.kicad_schR97 (470R); A:Net-(PWR1-A) K:Net-(PWR1-C)
BOOT1LED_G_0603_LG_L29K-G2J1-24-Z-Net-(BOOT1-C)som.kicad_schR14 (470R); A:Net-(BOOT1-A) K:Net-(BOOT1-C)

6.2 Indicator Testability

3 of 5 indicators have test coverage. 1 indicator(s) illuminate on their own (power-on / rail-fed / module-driven) and need no test point. 3 are transistor-driven.

Indicator Testability
RefDesDriverControl SignalDFT StatusTestable
LED1DirectNet-(IC3-FAULT)Design Warning: Test point needed on Net-(IC3-FAULT). Drive HIGH to turn on LED LED1.
LED2DirectUSB/OTG_USB_FAULTDesign Warning: Test point needed on USB/OTG_USB_FAULT. Drive LOW to turn on LED LED2.
NVME1DirectNet-(J8-LED)Driven by the mating module via J8 — the off-board side owns the stimulus. No on-board test point applicable.✓
USER1T5USR_LEDTestpoint available. Drive HIGH to turn on.✓
PWR1T4PWR_GOODTestpoint available. Drive HIGH to turn on.✓
BOOT1T2#RESETTestpoint available. Drive HIGH to turn on.✓

7 Switch Documentation

No switches or push buttons found in design.

8 Low-Speed Serial Interfaces (LSSI)

Detected: 8 I2C, 1 UART

8.1 I2C

I2C -> U4
Topology: Access (J6) » Targets (U4)
SigNetsConn/TPTarget Pin
SCL (needs pull-up)Net-(U4-SC0) »
R15 »
CSI/CAM0_SCL
J6_40U4_2 (SC0)
SDA (needs pull-up)Net-(U4-SD0) »
R13 »
CSI/CAM0_SDA
J6_39U4_1 (SD0)
AddressTargetIndustry TypeDescription
0x70 (port I2C (SCL on Net-(U4-SCL)), strap-set address, A0=GND (low), A1=GND (low), A2=GND (low))U4PCA9547_VQFN
I2C -> U4
Topology: Access (J6) » Targets (U4)
SigNetsConn/TPTarget Pin
SCL (needs pull-up)Net-(U4-SC1) »
R21 »
CSI/CAM1_SCL
J6_42U4_4 (SC1)
SDA (needs pull-up)Net-(U4-SD1) »
R17 »
CSI/CAM1_SDA
J6_41U4_3 (SD1)
AddressTargetIndustry TypeDescription
0x70 (port I2C (SCL on Net-(U4-SCL)), strap-set address, A0=GND (low), A1=GND (low), A2=GND (low))U4PCA9547_VQFN
I2C -> U4
Topology: Access (J7) » Targets (U4)
SigNetsConn/TPTarget Pin
SCL (needs pull-up)Net-(U4-SC2) »
R58 »
CSI/CAM2_SCL
J7_9U4_6 (SC2)
SDA (needs pull-up)Net-(U4-SD2) »
R19 »
CSI/CAM2_SDA
J7_10U4_5 (SD2)
AddressTargetIndustry TypeDescription
0x70 (port I2C (SCL on Net-(U4-SCL)), strap-set address, A0=GND (low), A1=GND (low), A2=GND (low))U4PCA9547_VQFN
I2C -> U4
Topology: Access (J7) » Targets (U4)
SigNetsConn/TPTarget Pin
SCL (needs pull-up)Net-(U4-SC3) »
R61 »
CSI/CAM3_SCL
J7_11U4_8 (SC3)
SDA (needs pull-up)Net-(U4-SD3) »
R59 »
CSI/CAM3_SDA
J7_12U4_7 (SD3)
AddressTargetIndustry TypeDescription
0x70 (port I2C (SCL on Net-(U4-SCL)), strap-set address, A0=GND (low), A1=GND (low), A2=GND (low))U4PCA9547_VQFN
I2C -> U4
Topology: Access (J15, TP1, TP10) » Targets (U4)
SigNetsConn/TPTarget Pin
SCL (needs pull-up)Net-(U4-SCL) »
R60 »
CSI/CAM_I2C_SCL
J15_213 / TP10_1U4_19 (SCL)
SDA (needs pull-up)Net-(U4-SDA) »
R57 »
CSI/CAM_I2C_SDA
J15_215 / TP1_1U4_20 (SDA)
AddressTargetIndustry TypeDescription
0x70 (port I2C (SCL on Net-(U4-SCL)), strap-set address, A0=GND (low), A1=GND (low), A2=GND (low))U4PCA9547_VQFN
I2C
Topology: Access (J1, J15, TP33, TP34)
SignalNet NameConnectorTest Point
SCL (needs pull-up)Display/TMDS_SCL / TMDS_SCLJ15_100, J1_17TP33_1
SDA (needs pull-up)Display/TMDS_SDA / TMDS_SDAJ15_98, J1_18TP34_1
I2C -> IC17
Topology: Access (J15, TP23, TP24, TP30) » Targets (IC17)
SignalNet NameConnectorTest PointTarget Pin
SCL (needs pull-up)GEN0_SCLJ15_185TP23_1, TP30_4IC17_1 (SCL)
SDA (needs pull-up)GEN0_SDAJ15_187TP24_1, TP30_3, TP30_6IC17_3 (SDA)
AddressTargetIndustry TypeDescription
0x50 (port I2C (SCL on GEN0_SCL), fixed address, also answers 0x58 - 0x50 addresses the EEPROM array; 0x58 addresses the serial-number/security register block on the same physical bus pins. No address-select pins exist on the SOT23-5 package.)IC17AT24CS01_SOT23
I2C
Topology: Access (J14, J15)
SignalNet NameConnectorTest Point
SCL (needs pull-up)I2C1_SCLJ14_4, J15_189(none)
SDA (needs pull-up)I2C1_SDAJ14_3, J15_191(none)
I2C Pull-up Check
NetComponentStatus
CSI/CAM0_SDAPull-up not found on CSI/CAM0_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM0_SCLPull-up not found on CSI/CAM0_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM1_SDAPull-up not found on CSI/CAM1_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM1_SCLPull-up not found on CSI/CAM1_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM2_SDAPull-up not found on CSI/CAM2_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM2_SCLPull-up not found on CSI/CAM2_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM3_SDAPull-up not found on CSI/CAM3_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM3_SCLPull-up not found on CSI/CAM3_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM_I2C_SDAPull-up not found on CSI/CAM_I2C_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
CSI/CAM_I2C_SCLPull-up not found on CSI/CAM_I2C_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-
Display/TMDS_SDAPull-up not found on Display/TMDS_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
Display/TMDS_SCLPull-up not found on Display/TMDS_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-
GEN0_SDAPull-up not found on GEN0_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
GEN0_SCLPull-up not found on GEN0_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-
I2C1_SDAPull-up not found on I2C1_SDA. It is acceptable to not have an on-PCB pull-up when the SDA is driven from off-board only. A pull-up will be required at the source I2C driver.-
I2C1_SCLPull-up not found on I2C1_SCL. It is acceptable to not have an on-PCB pull-up when the SCL is driven from off-board only. A pull-up will be required at the source I2C driver.-

8.2 UART

UART [UART1]
Topology: Access (J15)
SignalNet NameConnectorTest Point
TXUART1_TXJ15_236(none)
RXUART1_RXJ15_238(none)

8.3 LSSI DFT Analysis

12 signal(s) missing test point coverage. Test points allow ATE to run tests without requiring operator intervention and setup. They should be considered mandatory for high volume products.
During test, ATE can override functional operation to explicitly test through the interface in ways that functional operation cannot, or is not available at certain test stages.
Missing Test Points
SignalNet NameConnectorInterface
SCLCSI/CAM0_SCLJ6_40I2C -> U4
SDACSI/CAM0_SDAJ6_39I2C -> U4
SCLCSI/CAM1_SCLJ6_42I2C -> U4
SDACSI/CAM1_SDAJ6_41I2C -> U4
SCLCSI/CAM2_SCLJ7_9I2C -> U4
SDACSI/CAM2_SDAJ7_10I2C -> U4
SCLCSI/CAM3_SCLJ7_11I2C -> U4
SDACSI/CAM3_SDAJ7_12I2C -> U4
SCLI2C1_SCLJ14_4I2C
SDAI2C1_SDAJ14_3I2C
RXUART1_RXJ15_238UART
TXUART1_TXJ15_236UART

9 High-Speed Serial Interfaces (HSSI)

150 differential pair(s)

Differential pairs detected from _P/_N naming convention which KiCad uses for differential pair identification. Designer should consider explicit assignment to distinct net classes for each SERDES type to explicitly document layout intent.

9.1 Differential Pairs

Differential pairs with designer-specified class annotations.

None of the 75 differential pairs specify a target impedance (the Impedance column is blank). Strongly suggested: put the value in the class name - e.g. 100_OHM, 90_OHM, 50_OHM. The pairs are already identified by their nets, so the ohm value is the useful part to capture for layout.
Differential Pairs
Net NameClassImpedanceNotes
CSI/CSI_A_CLK_P/NDIFF_PAIR
CSI/CSI_A_D0_P/NDIFF_PAIR
CSI/CSI_A_D1_P/NDIFF_PAIR
CSI/CSI_B_D0_P/NDIFF_PAIR
CSI/CSI_B_D1_P/NDIFF_PAIR
CSI/CSI_C_CLK_P/NDIFF_PAIR
CSI/CSI_C_D0_P/NDIFF_PAIR
CSI/CSI_C_D1_P/NDIFF_PAIR
CSI/CSI_D_D0_P/NDIFF_PAIR
CSI/CSI_D_D1_P/NDIFF_PAIR
CSI/CSI_E_CLK_P/NDIFF_PAIR
CSI/CSI_E_D0_P/NDIFF_PAIR
CSI/CSI_E_D1_P/NDIFF_PAIR
CSI/CSI_F_D0_P/NDIFF_PAIR
CSI/CSI_F_D1_P/NDIFF_PAIR
CSI/CSI_G_CLK_P/NDIFF_PAIR
CSI/CSI_G_D0_P/NDIFF_PAIR
CSI/CSI_G_D1_P/NDIFF_PAIR
Interfaces/C_PCIE0_TX0_P/NDIFF_PAIR
Interfaces/C_PCIE0_TX1_P/NDIFF_PAIR
Interfaces/C_PCIE0_TX2_P/NDIFF_PAIR
Interfaces/C_PCIE0_TX3_P/NDIFF_PAIR
PCIE0_RX0_P/NDIFF_PAIR
PCIE0_RX1_P/NDIFF_PAIR
PCIE0_RX2_P/NDIFF_PAIR
PCIE0_RX3_P/NDIFF_PAIR
PCIE0_TX0_P/NDIFF_PAIR
PCIE0_TX1_P/NDIFF_PAIR
PCIE0_TX2_P/NDIFF_PAIR
PCIE0_TX3_P/NDIFF_PAIR
PCIE1_CLK_P/NDIFF_PAIR
PCIE1_RX0_P/NDIFF_PAIR
PCIE1_TX0_P/NDIFF_PAIR
Display/ML_C_LANE0_P/NZ100_ext
Display/ML_C_LANE1_P/NZ100_ext
Display/ML_C_LANE2_P/NZ100_ext
Display/ML_C_LANE3_P/NZ100_ext
Display/TMDS_C1_CLK_P/NZ100_ext
Display/TMDS_C1_D0_P/NZ100_ext
Display/TMDS_C1_D1_P/NZ100_ext
Display/TMDS_C1_D2_P/NZ100_ext
Display/TMDS_CLK_C_P/NZ100_ext
Display/TMDS_CLK_P/NZ100_ext
Display/TMDS_D0_C_P/NZ100_ext
Display/TMDS_D0_P/NZ100_ext
Display/TMDS_D1_C_P/NZ100_ext
Display/TMDS_D1_P/NZ100_ext
Display/TMDS_D2_C_P/NZ100_ext
Display/TMDS_D2_P/NZ100_ext
Display/EDP0_TX_P/NZ100_in
Display/EDP1_TX_P/NZ100_in
Display/EDP2_TX_P/NZ100_in
Display/EDP3_TX_P/NZ100_in
Display/EDP_AUX_P/NZ100_in
Display/EDP_C_AUX_C_P/NZ100_in
ENET_TRD0_P/NZ100_in
ENET_TRD1_P/NZ100_in
ENET_TRD2_P/NZ100_in
ENET_TRD3_P/NZ100_in
PCIE0_CLK_P/NZ85_in
USB/C_USBSS_RX1_P/NZ90_ext
USB/C_USBSS_RX2_P/NZ90_ext
USB/C_USBSS_RX6_P/NZ90_ext
USB/C_USBSS_TX1_P/NZ90_ext
USB/C_USBSS_TX2_P/NZ90_ext
USB/C_USBSS_TX6_P/NZ90_ext
OTG_USB_D_P/NZ90_in
USB/DBG_USB_D_P/NZ90_in
USB/USBSS_RX1_P/NZ90_in
USB/USBSS_RX2_P/NZ90_in
USB/USBSS_TX1_P/NZ90_in
USB/USBSS_TX2_P/NZ90_in
USB1_D_P/NZ90_in
USBSS_RX6_P/NZ90_in
USBSS_TX6_P/NZ90_in

9.2 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

9.2.1 PCIe Gen2 x4 link to the M.2 Key M socket (J15 to J8)

AI-Assisted — Four lanes run from the module connector J15 to the M.2 Key M socket J8 (Amphenol MDT580M01001, no datasheet supplied). Each transmit pair is AC coupled with 100 nF 0402 parts: C37/C38 on PCIE0_TX0, C49/C51 on TX1, C52/C68 on TX2, C69/C70 on TX3, landing on J8 PET0..PET3. PCI Express Base specification allows 75-200 nF per lane for 5 GT/s Gen2 signalling, so 100 nF is inside the window; the coupling sits on the source side of the connector, which is where the specification places it. The receive pairs PCIE0_RX0..RX3 go directly from J15 to J8 PER0..PER3 with no series parts - correct, since the endpoint card carries its own transmit-side capacitors. PCIE0_CLK_P/N reach J8 REFCLK_P/N DC coupled, which is what the M.2 specification expects for the 100 MHz differential reference clock; that pair carries an 85 ohm differential class. The eight data pairs carry only a generic differential grouping with no impedance class attached, so the layout tool will not enforce 85 ohm on them. Sideband signals are conventional: PEX_L0_RST_N and PEX_L0_CLKREQ_N each have a 10k pull-up to 3V3_SYS (R116 and R115, second pin on 3V3_SYS), and J8 SMB_CLK and SMB_DATA reach test points TP20 and TP7 only, so any SMBus bias must come from outside the board.

9.2.2 PCIe Gen2 x1 link on the FFC connector J10

AI-Assisted — A second single-lane PCIe port leaves J15 on PCIE1_TX0_P/N, PCIE1_RX0_P/N and PCIE1_CLK_P/N to the 0.5 mm flat-flex connector J10 (Molex 5051101097, no datasheet supplied). Unlike the M.2 port, the transmit pair reaches J10 pins 6 and 7 with no series capacitors of any kind, while the same module's PCIE0 transmit lanes are coupled with 100 nF. PCI Express requires AC coupling on each lane within the transmitter's component; with the coupling absent the link depends entirely on whatever the mated flex assembly provides, and a DC-coupled receiver of different common mode will not train. Fitting two 100 nF capacitors in the PCIE1_TX0 pair, matching C37/C38, closes this. The connector itself gives three multi-gigabit pairs a single ground contact (pin 10), with pin 1 carrying 3V3_SYS and pins 2/3 the reset and CLKREQ sidebands - there is no ground between adjacent pairs, so the return path for TX0, RX0 and the 100 MHz clock is shared and the crosstalk and mode-conversion budget for a 5 GT/s lane is not supportable on this pin-out. A flex connector with alternating ground contacts, or a board-to-board connector specified for 8 GT/s, is the appropriate part in this position. PCIE1_CLK_P/N is DC coupled, consistent with the reference-clock treatment on the M.2 port, and none of the three pairs carries an impedance class.

9.2.3 USB 3.0 SuperSpeed path through IC7 to the Type-C receptacle J11

AI-Assisted — IC7 (HD3SS3220) is the Type-C CC controller with an integrated 2:1 SuperSpeed mux; the TI datasheet gives 8 GHz mux bandwidth and -1.42 dB differential insertion loss at 5 GHz, which covers 5 Gbps Gen1 operation. The host side connects to J15 USBSS_TX_P/N and USBSS_RX_P/N through zero-ohm links R103, R105, R107, R108 into IC7 TX+/TX-/RX+/RX- - DC coupled, with no capacitors in that segment, which is correct because the coupling sits on the connector side. On the connector side, IC7 TX1+/TX1-/TX2+/TX2- are AC coupled by C48, C50, C53 and C54, all 100 nF, to J11 A2/A3 and B2/B3. USB 3.2 permits 75-265 nF per lane, so 100 nF is compliant, and one capacitor sits in each single lane path. The receive pairs RX1 and RX2 reach J11 B10/B11 and A10/A11 through zero-ohm links R104, R106, R109, R110 with no coupling capacitors - correct, since the far-end device transmitter supplies them. All twelve SuperSpeed nets carry a 90 ohm differential class, matching the USB 3.2 requirement, and the Würth 632723300011 receptacle is a Gen1-rated Type-C part. Termination is on-die in the module and the attached device; the 8 ohm maximum mux Ron is in the channel budget. SBU2 (J11 B8) lands only on test point TP19 and no alternate-mode sideband circuitry is fitted.

9.2.4 USB 2.0 ports on J11, J5 and J9

AI-Assisted — Three USB 2.0 paths exist. USB1_D_P/N runs from J15 to both Type-C contact rows of J11 (A6/A7 and B6/B7) - the required flip-independent connection for USB 2.0 on Type-C - with a 90 ohm differential class assigned and no series parts. OTG_USB_D_P/N goes from J15 to the micro-B receptacle J5 through D8 (TPD8S009), whose 0.8 pF typical I/O capacitance per the TI datasheet is negligible for 480 Mbps. The debug port DBG_USB_D_P/N connects J9 to IC5 (FT232RQ) with 47 pF shunt capacitors C15 and C29 to ground; at full-speed 12 Mbps signalling this loading is acceptable as edge-rate control, and the FT232RQ side is not a 480 Mbps path. IC5 OSCI and OSCO are left open, consistent with the device's internal oscillator, and its 3V3OUT pin is bypassed by C30, 100 nF. The Type-C USB 2.0 pair is the only connector-exposed high-speed pair with no transient protection fitted: the SuperSpeed lanes have D6 and D7, the CC lines have D5, and the micro-B port has D8, but USB1_D_P/N goes straight to the module. Adding a low-capacitance two-channel array on that pair, matched to D8's class, would make the connector's protection uniform.

9.2.5 HDMI TMDS output on J1

AI-Assisted — The module's DP1 output is used as HDMI: J15 DP1_TXD0..TXD3 feed 100 nF series capacitors C73-C80, then IC18 (TPD8S009) channels D0..D3, then 5R6 series resistors R1-R4 and R7-R10, and finally the micro-D receptacle J1. All sixteen TMDS nets carry a 100 ohm differential class, which is the HDMI requirement. IC18 is the correct device class for this position - the TI datasheet gives 0.8 pF typical channel capacitance and 9 V minimum breakdown with the VCC pin available for the Ioff feature; here IC18 VCC (pins 13 and 15) sits on HDMI_PWR, the 5 V branch through L9, bypassed by C27, 100 nF. Two points are worth the reviewer's attention rather than correction. First, series AC coupling on TMDS is not the HDMI convention, where the source is DC coupled into the sink's 50 ohm pull-ups to AVCC; it appears here because this is the module's shared DP/HDMI lane set and DisplayPort mandates coupling, and TMDS is DC-balanced encoded, so the topology functions. Second, the 5R6 elements add about 11 ohm to each loop and act as damping, not termination; TMDS defines no series resistance, so they trade a small insertion loss for reflection control. J1 pins 4, 7, 10 and 13 tie the per-pair shields to HDMI_SHIELD, returned to ground through L8.

9.2.6 DisplayPort main link and AUX channel on J2

AI-Assisted — The module's DP0 output drives the Mini DisplayPort receptacle J2 (TE 2129320-3). Each of the four main-link lanes is AC coupled with 100 nF - C39/C40 on lane 0, C42/C43 on lane 1, C6/C7 on lane 2, C8/C12 on lane 3 - into IC2 (TPD8S009) and then to J2 TXD0..TXD3. DisplayPort 1.2 specifies 75-265 nF of main-link coupling, so 100 nF is compliant, and the lanes carry a 100 ohm differential class. The AUX channel is coupled by C44 and C45, 100 nF each, again inside the DisplayPort 75-200 nF window, with the standard source-side bias fitted: R30, 100k from AUX+ to ground, and R26, 2k from AUX- to DP_PWR, the 3.3 V branch through L10. HPD from J2 pin 2 is pulled down by R100, 100k to ground, and buffered by IC11 to the module's DP0_HPD input. CFG1 and CFG2 (J2 pins 4 and 6) are pulled to ground by R31 and R32, 1M each, the DisplayPort cable-detect convention. One wiring gap: IC2's VCC pins 13 and 15 are not shown on any net, whereas the equivalent pins of IC18 and D8 are tied to a supply. The TPD8S009 datasheet describes VCC as tied either to 0 V or to the system supply plane and does not characterise a floating VCC, so IC2 should have those pins tied to ground or to the 3.3 V branch feeding this connector.

9.2.7 MIPI CSI-2 and DSI D-PHY lanes on J6 and J7

AI-Assisted — Sixty differential nets carry MIPI camera and display traffic to the two 50-pin 0.5 mm flat-flex connectors J6 and J7 (Würth 68715014x22). J7 takes CSI0, CSI1 and CSI4 clock and data lanes; J6 takes CSI2, CSI3 and the DSI clock and two DSI data lanes (the CSI_G group on J15 pins 70-84). These are MIPI D-PHY physical links - CSI-2 over D-PHY for the camera ports and DSI over D-PHY for the display port - governed by the MIPI D-PHY specification, which requires 100 ohm differential and, importantly, a DC path: the LP-11/LP-01 low-power signalling states are single-ended DC levels, so no AC coupling capacitors may be inserted. None are fitted on any lane, which is correct. All lanes are direct point-to-point from J15 to the connectors, with no series elements; HS termination is 100 ohm on-die in the module and in the sensor, and no external termination is required or fitted. The lanes carry only a generic differential grouping, with no 100 ohm impedance class attached, so the constraint will not propagate into layout. On connector suitability, the flat-flex parts give a reasonable ground ratio for D-PHY - J6 grounds at pins 9, 12, 15, 18, 27, 30 and J7 at pins 21, 24, 33, 36, 39, 42 - and 3V3_FFC1/3V3_FFC2 each reach the flex through a 1.25 A fuse (F1, F2) with a 2u2 inductor and 10 µF of local bypass.

9.2.8 Gigabit MDI pairs on J3

AI-Assisted — The module's integrated Gigabit Ethernet MAC/PHY drives four MDI pairs from J15 to the RJ45 jack J3 (Bel SI-51005-F, an integrated-magnetics part with no datasheet supplied): GBE_MDI0..MDI3 to J3 D0..D3. All eight nets carry a 100 ohm differential class, the IEEE 802.3ab requirement for 1000BASE-T, and no series or shunt components are fitted in the pairs - correct, because the transformer and the termination network are inside the jack. The two status LEDs are driven from the module's GBE_LED_LINK and GBE_LED_ACT pins into J3 pins 11 and 13, with pins 12 and 14 pulled to 3V3_SYS through R38 and R40, 220R each, setting the LED current. The jack shield returns to the chassis net EGND, which is coupled to system ground by C14, 100 pF, and carries the mounting spacer SP4 - the conventional single high-frequency shield bond.

9.3 Observations

AI-Assisted — Impedance class coverage is the largest cross-cutting gap. The HDMI, DisplayPort, MDI and USB nets all carry explicit 100 ohm or 90 ohm classes, and the PCIe reference clock carries 85 ohm, but the eight M.2 data pairs, the three J10 pairs and all sixty MIPI D-PHY lanes carry only a generic differential grouping. Impedance is a net-class property that must be set in the schematic so the constraint reaches layout; a note on the drawing will not do it. Transient protection is well matched on the display and micro-B ports, where D8, IC2 and IC18 are all 0.8 pF TPD8S009 parts, and on the SuperSpeed lanes, where D6 and D7 are 0.5 pF TPD4E05U06-Q1 arrays. On those SuperSpeed lanes, the TI datasheet gives a typical I/O-to-ground clamping level of 10 V at 1 A under a 100 ns transmission-line pulse, while IC7's SuperSpeed pins carry a 2.5 V absolute maximum that is a DC lifetime limit with no transient rating stated for that waveform; the two numbers are measured under different conditions, so the margin cannot be computed from the supplied data. It is worth noting that the RX1/RX2 pairs are DC coupled to IC7 through zero-ohm links, so those pins see the clamp directly, whereas the TX pairs are isolated by C48, C50, C53 and C54.

9.4 Findings

AI-Assisted —
#InterfaceProtocolFindingSeverity
9.4.1PCIE1 x1 (J15 to J10)PCIe Gen2PCIE1_TX0_P/N reaches J10 pins 6 and 7 with no series capacitors, while the sibling PCIE0 transmit lanes use 100 nF. Fit two 100 nF capacitors in the PCIE1_TX0 pair per the PCI Express Base specification lane-coupling requirement.Medium
9.4.2PCIE1 x1 connector J10PCIe Gen2J10 provides one ground contact (pin 10) for three 5 GT/s pairs, with no ground between adjacent pairs, so returns are shared. Replace with a flex or board-to-board connector that alternates ground contacts between pairs.Medium
9.4.3PCIE0 data lanesPCIe Gen2The eight transmit and receive pairs carry no impedance class; assign the same 85 ohm differential class used on PCIE0_CLK so the constraint reaches layout (PCI Express CEM specification).Low
9.4.4USB 2.0 (J11)USB 2.0The Type-C D+/D- pair has no transient protection, unlike the SuperSpeed lanes (D6, D7), CC lines (D5) and micro-B port (D8). Add a low-capacitance two-channel array of the TPD8S009 class on USB1_D_P/N.Low
9.4.5DisplayPort ESD (IC2)DisplayPort 1.2IC2 VCC pins 13 and 15 are not shown on any net. The TPD8S009 datasheet characterises VCC tied to 0 V or to the system supply plane only; tie those pins to ground or to the 3.3 V branch feeding J2, as done for IC18.Low
9.4.6MIPI CSI-2 / DSI lanesMIPI D-PHYSixty lanes carry no impedance class; assign the 100 ohm differential class the MIPI D-PHY specification requires so it propagates into layout.Low
9.4.7USB 3.0 ESD (D6, D7)USB 3.2 Gen1TPD4E05U06-Q1 clamps to 10 V typical at 1 A under a 100 ns transmission-line pulse; IC7's SuperSpeed pins state a 2.5 V DC absolute maximum with no transient rating for that waveform, so the comparison cannot be closed. A transient rating for IC7's SuperSpeed pins is the missing input.Review
9.4.8USB 2.0 debug (J9 to IC5)USB 2.0 full speedC15 and C29, 47 pF to ground on DBG_USB_D_P/N, are acceptable edge-rate control at 12 Mbps; IC5 OSCI/OSCO are open, consistent with the device's internal oscillator. No verified datasheet was supplied for IC5, so no numeric loading check was made.Review
9.4.9HDMI (J15 to J1)HDMI TMDSSeries 100 nF capacitors C73-C80 AC couple the TMDS lanes, which is not the HDMI DC-coupled convention; it follows from the module's shared DP/HDMI lane set and works with DC-balanced TMDS encoding. The 5R6 elements R1-R4, R7-R10 are damping, not termination.Review
9.4.10IC7 supply sequencingUSB Type-CThe datasheet asks for VDD5 to reach level at least 2 ms before VCC33 and to ramp within 25 ms; no sequencing element between the 5 V and 3.3 V sources is shown, and rail ramp timing is not available, so the ordering check was not performed.Review
9.4.11IC7 supply decouplingUSB Type-CPer-pin local bypass allocation for VDD5 and VCC33 is not available, so the local decoupling check was not performed; rail-level bulk is 168 µF on 5V0_SYS, above the 10-200 µF the datasheet asks for when VCONN is active, and 67.6 µF on 3V3_SYS.Review
9.4.12M.2 sideband (J8)PCIe Gen2SMB_CLK and SMB_DATA reach only test points TP20 and TP7, so any SMBus pull-up must come from the mated assembly or bench fixture; PERST# and CLKREQ# have 10k pull-ups to 3V3_SYS (R116, R115).Review
9.4.13PCIE0 x4 (J15 to J8)PCIe Gen2Transmit-side AC coupling C37/C38/C49/C51/C52/C68/C69/C70, all 100 nF, is inside the 75-200 nF window of the PCI Express Base specification for 5 GT/s; receive pairs correctly left uncoupled.✓
9.4.14PCIE0 reference clockPCIe Gen2PCIE0_CLK_P/N is DC coupled to J8 REFCLK_P/N and carries an 85 ohm differential class, as the M.2 and PCIe CEM specifications require for the 100 MHz differential clock.✓
9.4.15USB 3.0 (IC7 to J11)USB 3.2 Gen1AC coupling C48, C50, C53, C54, all 100 nF, on the TX1/TX2 pairs is inside the 75-265 nF USB 3.2 window, one capacitor per lane; RX1/RX2 correctly uncoupled.✓
9.4.16USB 3.0 (IC7 to J11)USB 3.2 Gen1All twelve SuperSpeed nets carry a 90 ohm differential class per USB 3.2, and IC7's 8 GHz mux bandwidth with -1.42 dB insertion loss at 5 GHz covers Gen1 (TI HD3SS3220 datasheet SLLSES1E).✓
9.4.17USB 2.0 (J11)USB 2.0USB1_D_P/N is connected to both Type-C contact rows (A6/A7 and B6/B7) with a 90 ohm class, giving flip-independent operation as the USB Type-C specification requires.✓
9.4.18HDMI (J15 to J1)HDMI TMDSAll sixteen TMDS nets carry a 100 ohm differential class; IC18 (TPD8S009, 0.8 pF typical channel capacitance, TI datasheet) is bypassed by C27, 100 nF, on HDMI_PWR.✓
9.4.19DisplayPort (J15 to J2)DisplayPort 1.2Main-link coupling C39/C40/C42/C43/C6/C7/C8/C12, all 100 nF, is inside the 75-265 nF DisplayPort window; AUX coupling C44, C45, 100 nF, is inside the 75-200 nF AUX window, with R30 (100k to ground) and R26 (2k to DP_PWR) as source bias.✓
9.4.20MIPI CSI-2 (J6, J7)MIPI D-PHYNo AC coupling is fitted on any camera lane, which is required by the MIPI D-PHY specification because the LP signalling states are DC levels; termination is on-die at both ends and no external termination is needed.✓
9.4.21MIPI DSI (J6)MIPI D-PHYThe DSI clock and two data lanes are DC coupled point-to-point with no series elements, correct for D-PHY; connector grounds are distributed across J6, and the flex supply is fused (F2) with local 10 µF bypass.✓
9.4.22Gigabit MDI (J15 to J3)1000BASE-TAll eight MDI nets carry a 100 ohm differential class per IEEE 802.3ab, with no series or shunt parts in the pairs, correct for an integrated-magnetics jack; the shield is bonded to the chassis net through C14, 100 pF.✓
9.4.23Type-C CC (IC7)USB Type-CVBUS_DET uses R51, 909 kohm, inside the mandated 880-910 kohm series window, and DIR uses R53, 200 kohm to 3V3_SYS, the required pull-up value and rail (TI HD3SS3220 datasheet).✓
9.4.24Type-C mux control (IC7)USB Type-CENn_CC low through R62 enables the CC controller, ENn_MUX low through R56 gives normal mux operation, PORT pulled to 5V0_SYS through R55 selects DFP mode, and ADDR floating (R126/R127 not installed) selects GPIO mode with I2C disabled, consistent with R124/R125 also not installed.✓

9.5 Citations

AI-Assisted —
References
HD3SS3220 (Texas Instruments) — datasheet, cited pages 1
www.ti.com/lit/ds/symlink/hd3ss3220.pdf?ts=1663000043694&...
TPD4E05U06-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tpd4e05u06-q1.pdf?HQS=dis-mous-...
TPD8S009 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tpd8s009.pdf?ts=1679406571326&r...

10 Memory Interface Analysis

Found 1 complete memory interface(s)

10.1 J15 SDMMC Connector

J15 (Bus_DDR4_SODIMM_CUSTOM_Jetson-Nano-H9.2mm-socket) - SDMMC Connector Interface [4-bit]
SignalPin NamePin #Net NameTest Point
CLOCKSDMMC_CLK229-
CMDSDMMC_CMD227-
DATA_0SDMMC_DAT0219-
DATA_1SDMMC_DAT1221-
DATA_2SDMMC_DAT2223-
DATA_3SDMMC_DAT3225-
Direct programming via test points is not needed since SD cards can be pre-programmed and inserted

10.2 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

10.2.1 Jetson Nano module socket (J15) — SDMMC interface

AI-Assisted — J15 is the 260-pin edge socket for the Jetson Nano compute module; the DRAM and eMMC are on the module, not on this baseboard, so the board-side review covers the socket interface only. The socket exposes a 4-bit SDMMC port (clock on pin 229, command on pin 227, data on pins 219, 221, 223, 225). None of these six signals is connected to any net on the baseboard, and no microSD or eMMC socket appears among the fitted connectors, so the module's removable-storage controller is unused as built and boots from module-resident storage. Because the bus is not routed, there is nothing on the board to assess for series termination, card-detect handling, or pull-ups on CMD/DAT; those obligations arise only once a card socket is fitted. If a microSD socket is added later, the CMD and DAT0-DAT3 lines require pull-ups to the card supply and the clock benefits from a series damping resistor near the socket. The two reserved CSI clock pins (9 and 11) are brought only to test points TP3 and TP4, consistent with them being unused.

10.2.2 Module supply rail and socket decoupling

AI-Assisted — VDD_MOD reaches the ten VDD_IN pins of J15 from 5V0_SYS through ferrite FB2 (10 A / 10 ohm class part), so the socket sits at the 5 V system rail level less the bead's DC drop. Bulk storage at the socket is two 330 uF polymer tantalums, C10 and C11, giving 660 uF. Both are KEMET T520B337M006ATE040, a 6.3 VDC part per the KEMET datasheet; derated 15 percent the maximum permitted working voltage is 5.36 V and 5 V is applied, so the parts are adequately rated for this position, with little margin for a rail excursion. Their 40 mOhm maximum ESR at 100 kHz and 8 percent dissipation factor make them suitable as bulk hold capacitance rather than high-frequency bypass, and no ceramic capacitors are fitted on VDD_MOD: all high-frequency return current for the module's ten supply pins must travel back through the 5 V system rail ceramics behind FB2, which is not local bypass. Adding 100 nF class ceramics distributed across the VDD_IN pin field is the correction. Rated ripple current is 1800 mA rms per part at 45 degrees C, 1260 mA at 85 degrees C and 450 mA at 105 degrees C; the module's input ripple is not derivable from the data supplied. Leakage of 207.9 uA typical per part is immaterial on a switched system rail. Load life is stated as 2000 h at 105 degrees C, which merits attention only for a continuously hot always-on application.

10.2.3 M.2 Key M NVMe storage socket (J8)

AI-Assisted — J8 is an Amphenol MDT580M01001 M.2 Key M socket carrying a PCIe x4 link from the module; the storage device is off-board. All four transmit pairs are AC-coupled on the baseboard with 100 nF capacitors (C37/C38 on lane 0, C49/C51 on lane 1, C52/C68 on lane 2, C69/C70 on lane 3), placing the coupling capacitors on the driving side as PCIe requires, while the receive pairs run directly from the socket to the module because their coupling capacitors live on the SSD. The 100 MHz reference clock pair and all four receive pairs are point-to-point with no stubs. PERST# and CLKREQ# each carry a 10 kOhm pull-up to 3V3_SYS (R116 and R115 respectively), which is the correct default for a socket that may be empty. PEWAKE# runs module-to-socket with no pull-up fitted on the board, so its idle level depends on the module's internal termination. The nine 3.3 V socket pins are fed directly from 3V3_SYS with no series fuse or local bulk capacitor dedicated to the socket; F4 and F5 (1.25 A) protect other branches of that rail, not J8. The rail carries 67.6 uF total, which is the pool an SSD's inrush draws from.

10.3 Observations

AI-Assisted — No DDR, SDRAM, SRAM, NVRAM or QSPI/SPI flash device is fitted on this baseboard, so no on-board DDR topology, fly-by versus T-branch choice, ODT or VTT termination, VREF generation or ZQ calibration resistor applies here; those belong to the module. The only board-level memory-class interfaces are the unrouted SDMMC port at the module socket, the PCIe storage socket J8, and the I2C identification EEPROM IC17. The dominant schematic-phase risks are the absence of high-frequency ceramic decoupling at the module's power pin field and the dependence of the identification bus on off-board pull-ups.

10.4 Findings

AI-Assisted —
#Memory / deviceInterfaceFindingSeverity
10.4.1VDD_MOD (J15 supply pin field)Module power deliveryNo ceramic decoupling is fitted on VDD_MOD; the ten VDD_IN pins are served only by 660 uF of polymer tantalum, with all ceramics on the far side of ferrite FB2 and therefore not local. Distribute 100 nF class ceramics across the VDD_IN pins at the socket.Medium
10.4.2J8 (M.2 Key M)3.3 V socket supplyThe nine 3.3 V socket pins are fed directly from 3V3_SYS with no series fuse and no capacitor dedicated to the socket; inrush of an inserted SSD is served from the rail's 67.6 uF pool. Consider local bulk at the socket and a current-limited feed for a hot-insertable slot.Low
10.4.3IC17 (AT24CS01)I2C bus pull-upsR124 and R125, the only resistors on GEN0_SCL and GEN0_SDA, are both do-not-install, so no board-side bus pull-up exists and the identification bus depends on pull-ups on the module across J15. Express the depopulated option through the eCAD variant feature and fit pull-ups on the board if the module cannot be relied on.Low
10.4.4IC17 (AT24CS01)Write protectThe write-protect pin is not shown tied to a rail or ground, so the protection state is left to the device default rather than defined by the board.Low
10.4.5Jetson Nano module socket (J15)SDMMCClock, command and the four data lines of the module's SDMMC port are not connected to any net on the baseboard and no card socket is fitted; the port is unused as built. If storage is added, fit pull-ups on CMD/DAT0-DAT3 and a series damping resistor on the clock at the new socket.Review
10.4.6Jetson Nano module socket (J15)SDMMCSeries termination, card-detect and pull-up review not performed: no card socket or routed bus exists on the board, so there is no board-side network to assess.Review
10.4.7C10, C11 (VDD_MOD)Module supply bulkRipple-current check not closed: rated 1800 mA rms at 45 degrees C / 1260 mA at 85 degrees C / 450 mA at 105 degrees C per part, but the module's input ripple current is not available from the schematic, so no margin can be computed. (KEMET datasheet)Review
10.4.8C10, C11 (VDD_MOD)Module supply bulk40 mOhm maximum ESR at 100 kHz and 8 percent dissipation factor suit these parts to bulk hold duty, not high-frequency bypass; 207.9 uA typical leakage is immaterial on this switched 5 V rail. Load life of 2000 h at 105 degrees C is worth noting for a continuously hot always-on installation. (KEMET datasheet)Review
10.4.9J8 (M.2 Key M)PCIe sidebandPEWAKE# runs module-to-socket with no pull-up fitted on the board, so its idle level relies on termination inside the module.Review
10.4.10C10, C11 (VDD_MOD)Module supply bulkKEMET T520B337M006ATE040 is a 6.3 VDC part; derated 15 percent it permits 5.36 V and 5 V is applied at the socket - correctly sized. (KEMET datasheet)✓
10.4.11VDD_MOD (J15 supply pin field)Module power deliverySupply reaches the socket from 5V0_SYS through FB2, a 10 A rated bead, and the rail is bulk-decoupled at 660 uF - source path and bulk hold are present as drawn.✓
10.4.12J8 (M.2 Key M)PCIe x4 storageAll four transmit pairs are AC-coupled on the driving side with 100 nF capacitors and receive pairs run direct to the module, matching PCIe Base Specification coupling placement; clock and data pairs are point-to-point with no stubs.✓
10.4.13J8 (M.2 Key M)PCIe sidebandPERST# and CLKREQ# carry 10 kOhm pull-ups to 3V3_SYS (R116, R115), giving defined levels with the socket empty.✓
10.4.14IC17 (AT24CS01)I2C EEPROM supplyFed from 3V3_SYS through series diode D15, placing the device near 2.6 V, inside the AT24CS01 operating supply window. (Atmel datasheet)✓
10.4.15Board-level memory busesDDR / SRAM / QSPINo DDR, SDRAM, SRAM, NVRAM or QSPI flash device is fitted on this board; topology, ODT/VTT termination, VREF and ZQ calibration checks are not applicable to the baseboard and belong to the module.✓

10.5 Citations

AI-Assisted —
References
T520B337M006ATE040 (KEMET) — datasheet
www.yageogroup.com/component-documentation/download/specs...

11 Functional Analysis

24 device(s) to review across 4 category(ies)

Device Inventory
RefDesCategoryPart NumberDescriptionInterfacesHSSI
BAT1BATTERYMS621FE-FL11E--
BOOT1DEVICELED_G_0603_LG_L29K-G2J1-24-Z--
IC12DEVICE74HC00PW,118--
IC17DEVICEAT24CS01-STI2C-
IC18DEVICETPD8S009DSMR--
IC2DEVICETPD8S009DSMR--
IC5DEVICEFT232RQ-REEL--
IC7DEVICEHD3SS3220RNHT--
NVME1DEVICELED_G_0603_LG_L29K-G2J1-24-Z--
PWR1DEVICELED_G_0603_LG_L29K-G2J1-24-Z--
REC1DEVICETL3340AF160QG--
RST1DEVICETL3340AF160QG--
U1DEVICELM3671MF-3.3/NOPB--
U4DEVICEPCA9547BS,118I2C-
U5DEVICELM3671MF-3.3/NOPB--
U6DEVICESIC477ED-T1-GE3--
U7DEVICEMAX3051EKA--
USER1DEVICELED_G_0603_LG_L29K-G2J1-24-Z--
USR1DEVICETL3340AF160QG--
D13DIODE1N4148WS--
D2DIODE1N4148WS--
D4DIODE1N4148WS--
T3Trans.BSS138PW--
T9Trans.BSS138PW--

11.1 Reset-Time Strap Configuration

Each device below takes part of its start-up configuration from resistors the board fits on pins it samples at reset. Every setting is resolved against that device's own datasheet tables - the combination this board selects, and whether the datasheet marks that combination reserved or invalid.

RefDesConfigurationThis Board SelectsRead FromStatus
IC7Type-C Current Advertisement for GPIO and I2C ModesUnresolved - not fixed by this board: ADDR (level "NC" is not a level this build recognises), PORT (level "H" is not a level this build recognises), CURRENT_MODE (level "L" is not a level this build recognises), CURRENT_MODE (level "M" is not a level this build recognises), CURRENT_MODE (level "H" is not a level this build recognises)ADDR = IC7_22 open (no strap resistor fitted); PORT = IC7_4 up (R55 to 5V0_SYS); CURRENT_MODE = IC7_3 open (no strap resistor fitted)
RefDesPinRead FromSets
IC7CURRENT_MODE (IC7_3)open - at the datasheet default (internally pulled low): no strap resistor fittedcurrent advertisement in DFP (or DFP in DRP) mode while in GPIO mode = L – Low - Default – 900mA
IC7PORT (IC7_4)no row of this pin's table describes how the board wires it (up, R55 to 5V0_SYS)

11.2 Functional Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

11.2.1 Backup cell BAT1 (MS621FE-FL11E)

AI-Assisted — BAT1 is wired with its positive terminal on SoM/PMIC_BBAT, which reaches the module connector J15 pin 235 (PMIC_BBAT), and its negative terminal on GND. No series resistance, no blocking diode and no bypass capacitor sit between the cell and the module pin, so the cell is directly across the module's backup-battery input. The manufacturer datasheet for this cell is not among the supplied documents, so the permitted charge current, the maximum charge voltage and any required series current-limiting element could not be checked against the module's backup-battery pin behaviour. Polarity is correct as drawn: the positive terminal faces the supply pin and the negative terminal faces ground.

11.2.2 Indicator LEDs BOOT1, NVME1 and PWR1 (LG L29K-G2J1-24)

AI-Assisted — All three indicators are wired anode-to-supply through a series resistor and cathode to a low-side sink, which is the correct orientation for this part. BOOT1 draws (5 V - Vf)/470R with R14 470R from 5V0_SYS, approximately 6.2 mA, and its cathode is switched by T2 whose gate is on #RESET. NVME1 draws approximately 5.9 mA through R128 220R from 3V3_SYS and sinks into J8 pin 10 (LED), the M.2 socket's activity output. PWR1 draws approximately 1.6 mA through R97 2k from 5V0_SYS and is switched by T4 from PWR_GOOD, so it indicates the 5 V converter's power-good state; at 1.6 mA it sits close to the 2 mA characterisation point of the ams-OSRAM datasheet and will be visibly dimmer than BOOT1 - a brightness choice, not a fault. Every one of the three currents is below the derated forward-current limit, and reverse voltage is never applied because each cathode is pulled up only through its own series resistor, well inside the 12 V reverse rating. The one rating that does not close is thermal: with 500 K/W junction-to-ambient and 3 mW to 13 mW of dissipation, the predicted junction temperatures land between roughly 86 C and 92 C against a policy ceiling of 70 C derived from the 110 C datasheet maximum. Source: ams-OSRAM LG L29K-G2J1-24 datasheet.

11.2.3 Power-latch logic IC12 (74HC00)

AI-Assisted — IC12 is supplied from 5V0_SYS at pin 14 and grounded at pin 7, inside the 2.0 V to 6.0 V recommended range of the Nexperia 74HC00 datasheet. Gates 1 and 2 form a cross-coupled NAND set-reset latch: 1A is the Supply/PWR_SET node formed by R84 2k to 5V0_SYS and C41 47n to GND (the power-on set pulse), 2A is #SHUTDOWN_REQ pulled up by R86 2k to 5V0_SYS, and the outputs are cross-tied - 1Y to Supply/Q feeding 2B, 2Y feeding 1B. Supply/Q then drives the R85 470k / C63 10u delay to Supply/QDEL with D13 across it for fast reset discharge, and QDEL is buffered to PWR_EN by IC13. Gate 4 (4A and 4B both on QDEL) and gate 3 (3A and 3B both on gate 4's output) form a two-inverter chain whose output at pin 8 reaches only R130, which is not installed; PWR_EN is driven by IC13 instead, so this is a de-populated alternative drive path rather than dead logic. No input of the four gates is left floating, which is the requirement that matters for HC-series CMOS. The only level question is on 2A: with VCC at 5 V the HC input high threshold is 0.7 x VCC, about 3.5 V, and although R86 pulls the net to 5 V the resulting high level depends on the output structure of the module pin driving that net, which is not in the supplied data.

11.2.4 Board-ID EEPROM IC17 (AT24CS01-ST)

AI-Assisted — IC17 is supplied on ID Serial/EEPROM_PWR through D15, whose anode is on 3V3_SYS and whose cathode feeds the EEPROM and TP30 pin 1 - an isolation diode that lets the Tag-Connect footprint power the device alone without back-feeding the board rail. At the datasheet's 1 mA read and 3 mA write currents the 1N4148WS drops roughly 0.7 V, so the supply sits near 2.55 V to 2.7 V, comfortably inside the 1.7 V to 5.5 V range of the Microchip/Atmel AT24CS01 datasheet. That node carries no capacitance at all: its only members are the diode cathode, the VCC pin and the test point. The 5-lead SOT23 package has no A0/A1/A2 pins, so no address strapping is required and the corresponding software address bits are fixed at zero per the datasheet - the device answers on the single fixed address plus its serial-number address. WP (pin 5) reaches only R132 0R and TP30 pin 2; the datasheet states no internal pull-up or pull-down on WP, so the write-protect state is undefined unless a programmer is attached, and the datasheet defines only the tied-to-GND (writable) and tied-to-VCC (protected) states. GEN0_SDA and GEN0_SCL run to J15 pins 187 and 185 and to the Tag-Connect footprint; the two bus pull-up positions R124 and R125 are marked do-not-install, so the open-drain bus depends entirely on pull-ups on the mating module. Because the pull-up rail on that side is not in the supplied data, the relationship between the bus high level and the EEPROM's own 2.6 V supply could not be closed; a Schottky in place of D15 would recover about 0.4 V of that headroom.

11.2.5 ESD arrays IC18 (HDMI) and IC2 (DisplayPort) - TPD8S009

AI-Assisted — IC18 protects the four HDMI TMDS pairs. Its VCC pins are tied to HDMI_PWR, the 5 V-derived node behind L9, which is inside the 6 V absolute maximum of the TI TPD8S009 datasheet; the protected lines sit at TMDS levels well below the 5.5 V standoff and the 9 V minimum breakdown. Each channel connects between a 100n series coupling capacitor on the module side and a 5R6 series resistor (R1 to R10) to J1, so the array sits one series element back from the connector contacts; the resistors limit strike current into the clamp, but they also add about 11.2 Ohm differentially into a nominally 100 Ohm pair. IC2 is the same part on the four DisplayPort main lanes, correctly placed on the connector side of the 100n coupling capacitors C39/C40/C42/C43/C6/C7/C8/C12 so that J2's TXD0 to TXD3 contacts are clamped directly. Its ground pins are on GND and pin 14 is unconnected, matching the datasheet's no-internal-connection description. Unlike IC18, IC2's supply pins are not shown on any net. The datasheet calls VCC optional and describes only two states, tied to 0 V or tied to the system supply plane, and it also fixes the I/O absolute maximum at VCC - so leaving it open removes the defined ceiling and the Ioff behaviour that the pin exists for. The DisplayPort AUX pair reaches J2 pins 16 and 18 with only the AC coupling capacitors C44/C45 in the path; the eight IC2 channels are all consumed by the four main lanes, and HPD is separately clamped by D12.

11.2.6 USB-UART bridge IC5 (FT232RQ)

AI-Assisted — No manufacturer datasheet for the FT232RQ is included in the supplied documents, so the supply range, the oscillator arrangement, the RESET# behaviour and the permitted D+/D- loading could not be checked against verified parameters; what follows is read from the connectivity alone. VCC (pin 19) is on 5V0_DBG, the debug micro-B VBUS behind L3, decoupled by C67 2u2 and C72 100n, and VCCIO (pin 1) is on 1V8_DBG from IC15 with C66 1u, so the bridge and its I/O rail are both powered only while the debug cable is present. 3V3OUT carries C30 100n to GND, TEST (pin 26) is tied to GND, and all ground pins including the exposed pad are on GND. The USB pair runs to J9 pins 2 and 3 with C29 47p and C15 47p to GND and the D3 array to GND; OSCI and OSCO are left open with no crystal fitted, and RESET# and all CBUS and modem-control pins are left unconnected. The UART is correctly crossed: TXD (pin 30) reaches UART1_RX and J15 pin 238 (UART2_RXD) through R20 22R, and J15 pin 236 (UART2_TXD) reaches RXD (pin 2) through R41 22R, both with series damping. One consequence of the cable-powered arrangement is worth recording: with the debug cable removed, the module continues to drive UART2_TXD into the unpowered RXD input of IC5 through R41, and the tolerance of that input to a driven signal with its rails down cannot be established without the manufacturer datasheet.

11.2.7 USB Type-C port controller and SuperSpeed mux IC7 (HD3SS3220)

AI-Assisted — Supplies are correct: VDD5 (pin 30) is on 5V0_SYS, inside the 4.5 V to 5.5 V recommended window, and VCC33 (pin 8) is on 3V3_SYS, inside 3.0 V to 3.6 V, both per the TI HD3SS3220 datasheet. VBUS_DET uses R51 909k from USB/USBC_VBUS, squarely inside the required 880 kOhm to 910 kOhm series value; ENn_CC is held low through R62 0R to GND (CC controller enabled) and ENn_MUX low through R56 0R to GND (mux in normal operation), with the depop option R68 available to link ENn_MUX to the ID net. DIR carries R53 200k to 3V3_SYS and INT_N/OUT3 carries R67 200k to 5V0_SYS, both matching the datasheet's stated 200 kOhm external pull-up for these open-drain outputs; neither output is routed to a host, so the orientation and interrupt status are not observable on this board. That is consistent with the port being configured for GPIO rather than I2C operation, since the ADDR strap positions and the R124/R125 links from SDA/SCL to the module I2C0 bus are all do-not-install. CC1 and CC2 reach J11 A5 and B5 through R63 and R65 0R with D5 clamping both, and the alternates R64/R66 are not fitted. On the SuperSpeed side the coupling convention is right - 100n in each transmit leg to the connector and no capacitors in the receive legs - but the transmit pairs are crossed through them: TX1+ (pin 17) reaches J11 A3 (TX1-) through C50 while TX1- (pin 16) reaches J11 A2 (TX1+) through C48, and TX2 is crossed the same way through C53 and C54, whereas both receive pairs keep polarity. The specified orderable variant is the 0 C to 70 C grade.

11.2.8 Tactile switches REC1, RST1 and USR1 (TL3340AF160QG)

AI-Assisted — All three switches are wired the same way: pins 1 and 3 plus the shield tab to GND, pin 2 to the signal. REC1 pin 2 drives #RECOVERY to J15 pin 214 (FORCE_RECOVERY) and TP39 with no on-board pull-up, so the idle level comes from the module. USR1 pin 2 drives USR_BUTTON, which R112 10k pulls up to 1V8_SYS, giving 180 uA of contact current against the 50 mA rating and 1.8 V against the 12 VDC rating of the E-Switch TL3340 datasheet - well inside both. RST1 pin 2 drives #RESET, which carries R139 100k to GND and fans out through R39, R52, R44 and R92 to the enable inputs of U1, U5, U2 and IC4, so pressing RST1 does not only assert the module reset, it also removes the 3.3 V FFC rails, the main 3.3 V rail and the 1.8 V rail. No debounce network is fitted on any of the three; on RST1 that bounce reaches four regulator enable pins directly, and an RC on the enable branch would keep the converters from restarting several times inside the bounce window. Contact current in the pressed state on #RESET and #RECOVERY is set entirely by whatever drives those nets from the module, and the datasheet states an initial contact resistance of 500 mOhm maximum but no minimum wetting current, so dry-circuit reliability cannot be judged from the supplied data. The TL3340 datasheet gives the terminal pairing only as a schematic diagram, with no text pin table, so which of the grounded pins is internally common with the signal pin is not established by the supplied document.

11.2.9 FFC rail converters U1 and U5 (LM3671MF-3.3)

AI-Assisted — Both parts are the fixed 3.3 V option and are wired to match it: VIN on 5V0_SYS, GND to ground, SW into L5 and L6 respectively, and FB tied directly to the output node rather than through a divider, which is exactly what the TI LM3671 datasheet specifies for the fixed versions. Each output node carries a 10 uF ceramic and a test point (TP5, TP8) and then passes through F1 or F2 to 3V3_FFC1 and 3V3_FFC2, which supply J6 and J7 pins 47/48 and 3/4 and, through R78 and R80, the reference rail for the camera I2C pull-ups R18/R22/R24/R25 and R27/R28/R29/R33. The enable inputs are not floating: R39 and R52 10k connect them to #RESET, which R139 100k holds at ground until the module drives it, so both converters start disabled and release with system reset - the EN input current of 1 uA maximum makes the drop across 10k irrelevant to the 1 V enable threshold. Inductor selection closes cleanly: at the regulator's 600 mA rated output the ripple is 3.3 x (1 - 3.3/5) / (2.2 uH x 2 MHz) = 255 mA peak-to-peak, giving a 728 mA peak against the 1550 mA Isat of the Murata LQH32PN2R2NN0 datasheet, and even the open-loop switch current limit maximum of 1150 mA stays below saturation; the 1600 mA Irms derated 30% permits 1120 mA against a 600 mA maximum load.

11.2.10 Camera I2C multiplexer U4 (PCA9547)

AI-Assisted — VCC sits on 3V3_SYS inside the 2.3 V to 3.6 V range of the NXP PCA9547 datasheet, with the ground pin and the exposed pad both on GND. A0, A1 and A2 are tied directly to GND, selecting slave address 0x70 and satisfying the datasheet's requirement that these inputs be driven to a fixed level, since the part provides no internal pull-ups. The upstream bus is pulled up by R34 and R35 2k to 3V3_SYS, giving 1.65 mA of sink current at the 0.4 V output-low point against the 3 mA specified drive - comfortable and fast. Channels 0 to 3 carry the four camera buses to J6 and J7, each pair pulled up by 2k resistors referenced to 3V3_FFC1 and 3V3_FFC2; because the pass gates cannot pass more than VDD, matching those channel rails to the 3.3 V supply is the correct arrangement. Channels 4 to 7 are unconnected, and the datasheet asks for channel pull-ups only where a channel is used. The reset input is held high by R122 10k from 3V3_SYS - the pull-up the datasheet requires on this pin - and is pulled low by T8, whose gate is held off by R69 100k to GND, so the multiplexer is released by default and module GPIO04 asserts reset only when driven high. The logic level that GPIO04 presents is not stated in the schematic, so the gate-source voltage applied to T8 was not computed; at any level above the 1.5 V maximum threshold of the Nexperia BSS138PW datasheet the drop across the 10k pull-up is a few millivolts.

11.2.11 CAN transceiver U7 (MAX3051EKA)

AI-Assisted — VCC is on 3V3_SYS against a 3.14 V to 3.47 V supply window in the Maxim MAX3051 datasheet - one of the narrowest supply requirements on the board - and the stated regulation band of the 3.3 V converter, 3.2587 V to 3.3413 V, sits inside it with margin at both ends. TXD and RXD reach J15 pins 145 and 143 through R71 and R101 0R links; the receiver's output-high minimum of 0.8 x VCC gives 2.64 V into the module input. RS is tied to GND through R121 0R, which the datasheet defines as high-speed mode with transmission up to 1 Mbps and which it pairs with the recommendation to use shielded twisted-pair cable to avoid EMI at that slew rate - if the installed cabling is unshielded, the alternative is a resistor from RS to GND sized as roughly 12000 divided by the maximum bit rate in kbps. SHDN is left unconnected, which the datasheet explicitly equates to normal operation because of the internal 50 kOhm to 100 kOhm pull-down, so no external part is needed. R123 120R sits across CANH and CANL as the datasheet requires for a bus end; J13 is the only CAN connector on the board, so the node is necessarily an end node and the fixed termination is correct. The bus pins run straight to J13 with no series or clamping elements, and while the datasheet gives a 12 kV Human Body Model rating for those pins it states no IEC 61000-4-2 figure, so cable-level ESD coverage cannot be established; the same document notes the part is not intended to meet ISO 11898 automotive fault protection.

11.2.12 User indicator USER1 (LG L29K-G2J1-24)

AI-Assisted — USER1 is wired anode to 5V0_SYS through R111 2k and cathode to the drain of T5, whose gate is on USR_LED from J15 pin 206 with R113 100k holding it off - correct orientation and a correct low-side switch. Forward current is (5 V - 1.9 V) / 2 kOhm = 1.55 mA, far inside the 20 mA maximum of the ams-OSRAM LG L29K-G2J1-24 datasheet but only just above the 2 mA point at which the part's forward voltage and luminous data are characterised, so the indicator will read dim next to BOOT1 at 6.2 mA. Reverse voltage is never applied: the cathode can rise no higher than the anode through the series resistor, against a 12 V reverse rating. The only rating that does not close is thermal, driven by the 500 K/W junction-to-ambient figure and the design's stated 85 C maximum ambient.

11.2.13 Latch discharge diode D13 (1N4148WS)

AI-Assisted — D13 bridges the power-latch delay network with its cathode on Supply/Q, the NAND output node, and its anode on Supply/QDEL, the R85 470k / C63 10u node - the orientation is consistent with the schematic's own cathode marking. In that direction the diode is reverse-biased while Q is high, so C63 charges only through R85 and produces the intended slow turn-on delay, and it conducts as soon as Q falls, discharging C63 into the NAND's low-side output within microseconds so that the latch re-arms immediately rather than waiting out a 4.7 s RC. Reverse stress is at most the 5 V rail: against the 75 V reverse rating in the Panjit 1N4148WS datasheet, derated 30% to 52.5 V permitted, the part is correctly rated and comfortably over-specified for the position, which is normal for a general-purpose switching diode. The discharge peak is bounded by the driving output rather than by the diode - the Nexperia 74HC00 datasheet limits output current to 25 mA absolute maximum per pin, against the diode's 200 mA average and 1.5 A ten-millisecond surge ratings - so neither part is stressed by the discharge event.

11.2.14 DisplayPort supply blocking diode D2 (1N4148WS)

AI-Assisted — D2 feeds J2 pin 20 (DP_PWR) from the 3.3 V branch behind ferrite L10, with the anode on the board side and the cathode at the connector, which is the correct blocking direction: an externally powered sink cannot back-feed the board rail. The connector-side node carries C3 and C4, 4u7 each, for 9.4 uF of local bulk, and the same feed biases the AUX- line through R26 100k while R30 100k pulls AUX+ down, the conventional source-side AUX bias arrangement. The functional weakness is the drop: the Panjit 1N4148WS datasheet gives 0.855 V maximum at 10 mA and 1.0 V at 50 mA, so a 3.3 V feed presents roughly 2.45 V at the connector under a light dongle load and about 2.3 V at 50 mA, before the ferrite's 25 mOhm adds to it. A Schottky in the same position recovers roughly half a volt and would be the better part here; the blocking function is unchanged and the reverse leakage penalty is irrelevant on a 3.3 V feed. The part is also small-signal rated at 200 mA average forward current, which after the 35% diode current derating leaves 130 mA permitted - adequate only if the intended DP_PWR budget is modest.

11.2.15 HDMI +5 V blocking diode D4 (1N4148WS)

AI-Assisted — D4 sits between HDMI_PWR, the 5 V branch behind ferrite L9, and J1 pin 19 (+5V), with the anode on the board side and the cathode at the connector - the correct blocking direction, so an externally powered HDMI sink cannot back-feed the board rail. The connector-side node carries C1 and C2, 4u7 each, for 9.4 uF of local bulk. Importantly, the level-shifting and protection loads on this branch hang off the un-dropped side: IC18's VCC pins, IC6's B-side supply and enable, and the DDC pull-ups R5 and R6 all sit on HDMI_PWR at the full 5 V, so only the cable's +5 V contact sees the diode drop. That drop is the functional weakness. The Panjit 1N4148WS datasheet gives 0.855 V maximum at 10 mA and 1.0 V at 50 mA, so the +5 V contact presents roughly 4.15 V lightly loaded and about 4.0 V at 50 mA, below the 4.8 V minimum the HDMI specification requires of a source's +5 V Power pin at its stated 55 mA minimum supply capability. A Schottky in the same footprint recovers about 0.6 V and is the better part here; blocking behaviour is unchanged and reverse leakage is immaterial on a 5 V feed, though even then the remaining margin to 4.8 V is thin, so a low-drop ideal-diode or load-switch feed is the option if full compliance at 55 mA is required. Thermally the part is tight rather than comfortable: at 500 K/W and the design's stated 85 C maximum ambient, the 110 C junction ceiling permits only a 25 K rise, that is about 50 mW, which a 0.9 V drop reaches at roughly 55 mA.

11.2.16 Fan tachometer level shifter T3 (BSS138PW)

AI-Assisted — T3 implements the standard bidirectional open-drain level shifter and is wired correctly for it: gate on 1V8_SYS, source on FAN_TACH with R95 10k pulling up to 1V8_SYS, drain on Supply/FAN_TACH_5V with R46 10k pulling up to 5V0_SYS and reaching the fan connector J12 pin 3. FAN_TACH runs on to J15 pin 208 (GPIO08) and TP14. With both sides idle high the gate-source voltage is zero and the channel is off; when the fan's open-drain tach output pulls the 5 V side down, the body diode (anode at source) conducts first and the channel then enhances, which is the intended sequence for this topology. Pull-up currents are 500 uA on the 5 V side and 180 uA on the 1.8 V side, negligible against the 300 mA continuous drain current of the Nexperia BSS138PW datasheet. The one parameter that does not close is the on-resistance. The gate sits at 1.8 V while the source is at ground, so the applied gate-source voltage is 1.8 V against a maximum threshold of 1.5 V - conduction is guaranteed, but with only 0.3 V of worst-case overdrive, and the datasheet characterises Rds(on) only at 4.5 V (3.0 Ohm maximum) and 10 V (2.2 Ohm maximum), giving no bound on the resistance at 1.8 V drive. Where a body diode is the element doing the clamping in a signal path, a Schottky is the lower-drop part; here the channel takes over immediately afterwards, so the diode drop appears only during the transition and no additional part is needed.

11.2.17 OTG VBUS detect switch T9 (BSS138PW)

AI-Assisted — T9's drain is on OTG_USB_VBUS_DET to J15 pin 87 (GPIO00), its gate on USB/OTG_USB_ID (pulled up by R134 10k to 5V0_SYS and shared with IC1's enable input and U8), and its source not on ground but on Net-(T6-D), the drain of T6, whose own source is on GND. The two transistors therefore form a series AND: the detect line can only be pulled low while T6 conducts as well as T9. Read against the signal names that arrangement looks deliberate - the line asserts when the micro-B ID contact is high (no OTG host cable) and VBUS is present, which is the device-mode detect condition - though T6's gate divider is addressed elsewhere in this review and limits how reliably the second half of the AND closes. Gate-to-source stress on T9 is 5 V, taken as the gate at 5 V through R134 with the source pulled to ground by T6; against the +/-20 V gate-source rating derated 30% (mosfet_vgs_pct) that permits 14 V, so the part is correctly rated, and at 4.5 V drive the datasheet gives 3.0 Ohm maximum on-resistance. Drain-source stress is at most 5 V against a 60 V rating derated 30% to 42 V permitted. R129, which is marked do-not-install, bridges T9's drain to its source and would short the transistor out, leaving T6 alone to drive the detect line - a build alternative rather than a fault. The detect net itself carries no on-board pull-up, so its idle high level is set entirely by the module.

11.2.18 Type-C configuration, mux control and PHY supply context

AI-Assisted — IC7's configuration matches the TI datasheet requirements. VBUS_DET is fed from USBC_VBUS through R51, 909k - inside the mandated 880-910 kohm series window - so the 5 V sense input is held below its 4 V absolute maximum. DIR has R53, 200k, to 3V3_SYS, exactly the pull-up value the datasheet requires for that open-drain output, and referenced to the same rail as VCC33, whose absolute maximum bounds DIR. ENn_CC is tied low through R62, 0R to ground, enabling the CC controller; ENn_MUX is tied low through R56, 0R to ground, giving normal mux operation; PORT is pulled to 5V0_SYS through R55, 2k, selecting DFP-only mode. ADDR is left floating because R126 and R127 are both do-not-install, which selects GPIO mode with I2C disabled - consistent with SDA/OUT1 and SCL/OUT2 reaching only the do-not-install resistors R124 and R125. CURRENT_MODE's pull-up R54 is also do-not-install, leaving the internal pull-down and the default 900 mA advertisement. INT_N/OUT3 has R67, 100k to 5V0_SYS, and ID has R47, 100k to 5V0_SYS. Supply-side: VDD5 is on 5V0_SYS (168 µF of rail bulk, above the 10-200 µF the datasheet asks for when VCONN is active) and VCC33 on 3V3_SYS (67.6 µF). The datasheet asks for VDD5 to reach its level at least 2 ms before VCC33 and to ramp within 25 ms; no sequencing element between U6 and U2 is shown in the supply design.

11.2.19 Serial identification EEPROM (IC17)

AI-Assisted — IC17 is an Atmel AT24CS01 1 kbit I2C EEPROM with a factory-programmed serial number, sitting on the GEN0 I2C bus alongside the module's I2C0 port and test points TP23, TP24 and TP30. Its supply is taken from 3V3_SYS through series diode D15 (1N4148WS, anode on 3V3_SYS, cathode on the EEPROM supply node), whose forward drop places the device near 2.6 V; that is inside the AT24CS01 operating window and the diode also isolates the EEPROM from the 3.3 V rail's discharge path. No bus pull-ups are fitted on the board for GEN0_SCL and GEN0_SDA: R124 and R125, the only resistors on those nets, are both marked do-not-install, so the bus depends on pull-ups inside the module across J15. The write-protect pin is not shown tied to either rail or ground, leaving the write-protect state set by the device's internal default rather than by the board.

11.3 Findings

AI-Assisted —
#DeviceFindingSeverity
11.3.1BOOT1, NVME1, PWR1 (LG L29K-G2J1-24)Maximum junction temperature 110 C; the junction-temperature rule permits 70 C (40 C below the datasheet maximum), and with 500 K/W and 3 mW to 13 mW dissipation the predicted junction is 86 C to 92 C at the design's stated 85 C maximum ambient - the parts are not rated for this position. Select indicator LEDs with a higher maximum junction temperature. Source: ams-OSRAM LG L29K-G2J1-24 datasheet.Medium
11.3.2IC17 (AT24CS01-ST)The EEPROM supply node carries no capacitance - its only members are the D15 cathode, the VCC pin and the test point - so a diode-fed supply feeds the device with no local bypass. Fit a 100 nF ceramic from that node to GND at the device.Medium
11.3.3IC17 (AT24CS01-ST)WP reaches only R132 0R and the Tag-Connect footprint, and the datasheet states no internal pull-up or pull-down on WP, so the write-protect state is undefined in normal operation. Add a pull resistor to GND (writable) or to the EEPROM supply (protected) so the state is defined when no programmer is attached. Source: Microchip/Atmel AT24CS01 datasheet.Medium
11.3.4IC7 (HD3SS3220RNHT)The specified orderable part is the 0 C to 70 C temperature grade; the design's stated maximum ambient is 85 C, so the part's maximum operating temperature is exceeded in this position. Specify the industrial grade of the same device (-40 C to 85 C, identical pinout and electricals per the family datasheet). Source: TI HD3SS3220 datasheet.Medium
11.3.5USER1 (LG L29K-G2J1-24)Maximum junction temperature 110 C; the junction-temperature rule permits 70 C (40 C below the datasheet maximum), and at 500 K/W with about 3 mW dissipated the predicted junction is roughly 86 C at the design's stated 85 C maximum ambient - the part is not rated for this position. Select an indicator with a higher maximum junction temperature. Source: ams-OSRAM LG L29K-G2J1-24 datasheet.Medium
11.3.6D4 (1N4148WS)Forward drop 0.855 V maximum at 10 mA and 1.0 V at 50 mA leaves roughly 4.15 V to 4.0 V at the HDMI +5 V contact, below the 4.8 V minimum the HDMI specification requires of a source's +5 V Power pin at its 55 mA minimum supply capability. Replace D4 with a Schottky of the same footprint to recover about 0.6 V, or feed the contact through a low-drop ideal-diode or load switch if full compliance at 55 mA is required. Source: Panjit 1N4148WS datasheet.Medium
11.3.7T9 (BSS138PW)T9's source is not on GND but on Net-(T6-D), the drain of T6, so the pull-down on OTG_USB_VBUS_DET acts only while T6 also conducts - the two transistors form an AND of the micro-B ID state (T9 gate, pulled up by R134 10k to 5V0_SYS) and the VBUS-present state (T6 gate). The signal names make a device-mode detect AND plausible; if the AND is not intended, return T9's source to GND.Medium
11.3.8IC2 (TPD8S009)IC18's supply pins are tied to HDMI_PWR, but the corresponding supply pins of IC2 are not shown on any net. The datasheet calls VCC optional yet fixes the I/O absolute maximum at VCC and documents only two states, tied to 0 V or to the system supply plane; tie IC2's supply pins to DP_PWR or GND to match IC18. Source: TI TPD8S009 datasheet.Low
11.3.9IC7 (HD3SS3220RNHT)SuperSpeed transmit pairs are crossed through the coupling capacitors: TX1+ reaches J11 A3 (TX1-) via C50 and TX1- reaches J11 A2 (TX1+) via C48, with TX2 crossed the same way via C53/C54, while both receive pairs keep polarity. USB 3.x link training tolerates polarity inversion, so the link still trains, but the asymmetry with the receive pairs should be resolved to the intended pin mapping.Low
11.3.10D2 (1N4148WS)Forward drop 0.855 V maximum at 10 mA and 1.0 V at 50 mA leaves roughly 2.45 V to 2.3 V at the DisplayPort power contact from a 3.3 V feed. Replace D2 with a Schottky of the same package to recover about half a volt at the connector. Source: Panjit 1N4148WS datasheet.Low
11.3.11T3 (BSS138PW)Applied gate-source voltage is 1.8 V (gate on 1V8_SYS, source pulled to ground by the fan tach output) against a 1.5 V maximum threshold - conduction is guaranteed with only 0.3 V of worst-case overdrive, and Rds(on) is characterised only at 4.5 V (3.0 Ohm) and 10 V (2.2 Ohm), so the low level presented to GPIO08 through R95 10k is not bounded by the datasheet. Substitute a MOSFET whose on-resistance is specified at 1.8 V gate drive. Source: Nexperia BSS138PW datasheet.Low
11.3.12BAT1 (MS621FE-FL11E)Positive terminal on SoM/PMIC_BBAT (J15 pin 235), negative terminal on GND, with no series element between them. The cell's manufacturer datasheet is not available, so the permitted charge current and any required series current-limiting or blocking element could not be checked.Review
11.3.13IC12 (74HC00)Input 2A (#SHUTDOWN_REQ) must reach 0.7 x VCC, about 3.5 V, at the 5 V supply; the net is pulled to 5 V by R86 2k, so the achieved high level depends on the output structure of the module pin on that net, which is not in the supplied data - the level check could not be closed. Source: Nexperia 74HC00 datasheet.Review
11.3.14IC12 (74HC00)Output pin 8 drives only R130, which is marked do-not-install; PWR_EN is driven by IC13 instead. This alternative drive path is a build option and would be unambiguous if expressed through the eCAD variant feature rather than an ad-hoc do-not-install marking.Review
11.3.15IC17 (AT24CS01-ST)SDA is open-drain and the datasheet requires an external bus pull-up; the two pull-up positions R124 and R125 are do-not-install, so the bus depends on pull-ups on the mating module reached through J15 pins 185 and 187. Source: Microchip/Atmel AT24CS01 datasheet.Review
11.3.16IC17 (AT24CS01-ST)The pull-up rail for GEN0_SCL/GEN0_SDA on the mating module is not available, so the comparison of the bus high level against the EEPROM's own diode-dropped 2.6 V supply was not done. A Schottky in place of D15 would recover about 0.4 V of supply headroom and reduce the mismatch.Review
11.3.17IC18 (TPD8S009)Each protected TMDS leg reaches J1 through a 5R6 series resistor (R1 to R10), adding about 11.2 Ohm differentially to a nominally 100 Ohm pair and placing the clamp one series element back from the connector contacts.Review
11.3.18IC2 (TPD8S009)All eight IC2 channels are consumed by the four main lanes; the AUX pair reaches J2 pins 16 and 18 with only the C44/C45 coupling capacitors and no ESD array on those contacts.Review
11.3.19IC5 (FT232RQ)No manufacturer datasheet for this part is available, so the supply-voltage range, the oscillator arrangement (OSCI/OSCO left open, no crystal fitted), the RESET# pin state and the permitted D+/D- capacitance with C15 47p and C29 47p were not checked.Review
11.3.20IC5 (FT232RQ)VCC on 5V0_DBG and VCCIO on 1V8_DBG make the bridge entirely cable-powered, while the module keeps driving UART2_TXD into the RXD input through R41 with the cable removed; the tolerance of that input when its rails are down could not be checked because the manufacturer datasheet is not available.Review
11.3.21REC1, RST1, USR1 (TL3340)The datasheet gives the terminal pairing only as a schematic diagram and carries no text pin table, so the internal pairing of the two grounded pins against the signal pin is not established by the supplied document.Review
11.3.22REC1, RST1, USR1 (TL3340)Initial contact resistance is specified at 500 mOhm but no minimum wetting current is stated, and on #RESET and #RECOVERY the contacts switch only whatever the module drives - dry-circuit contact reliability could not be judged. Source: E-Switch TL3340 datasheet.Review
11.3.23RST1 (TL3340)#RESET fans out through R39, R52, R44 and R92 to the enable inputs of U1, U5, U2 and IC4, so the reset button also removes the 3.3 V FFC rails, the 3.3 V system rail and the 1.8 V rail. No debounce is fitted; an RC on the enable branch would prevent repeated converter restarts inside the contact bounce window.Review
11.3.24U1, U5 (LM3671-3.3)The load current on 3V3_FFC1 and 3V3_FFC2 is not available (both rails leave the board through J6 and J7), so the 600 mA rated output current derated 30% to 420 mA permitted was not checked against an actual demand.Review
11.3.25F1, F2 (Littelfuse 467, 1.25 A)Each fuse sits between a 600 mA-rated converter and an FFC connector; the contact current rating of J6 and J7 is not in evidence, so the coordination of the 1.25 A rating against the protected element was not closed.Review
11.3.26U4 (PCA9547)The RESET pull-up the datasheet requires is present as R122 10k from 3V3_SYS; T8 is held off by R69 100k to GND, so the multiplexer is released by default and module GPIO04 asserts reset only when driven high. Source: NXP PCA9547 datasheet.Review
11.3.27U4 (PCA9547)The logic level presented on I2C_MUX_RESET by the module is not stated in the schematic, so the gate-source voltage applied to T8 against the 1.5 V maximum threshold was not computed. Source: Nexperia BSS138PW datasheet.Review
11.3.28U7 (MAX3051)CANH and CANL run to J13 with no series or clamping element; the datasheet gives 12 kV Human Body Model on the bus pins but states no IEC 61000-4-2 contact-discharge figure, so cable-level ESD coverage could not be closed, and the same document notes the part is not intended to meet ISO 11898 fault protection. Source: Maxim MAX3051 datasheet.Review
11.3.29D2 (1N4148WS)IF(AV) 200 mA derated 35% permits 130 mA; the DP_PWR load current is not available, so the forward-current and junction-temperature checks for this position were not done. Source: Panjit 1N4148WS datasheet.Review
11.3.30D4 (1N4148WS)Maximum junction temperature 150 C; the junction-temperature rule permits 110 C, which at 500 K/W and the design's stated 85 C maximum ambient allows only a 25 K rise, that is about 50 mW or roughly 55 mA at a 0.9 V drop. The HDMI sink's actual +5 V draw is off-board and not available, so the forward-current (200 mA derated 35% to 130 mA) and junction-temperature checks were not closed against a real load. Source: Panjit 1N4148WS datasheet.Review
11.3.31T9 (BSS138PW)OTG_USB_VBUS_DET carries only J15 pin 87, T9's drain and the do-not-install R129, so no on-board pull-up sets the idle high level - the detect line depends on the module's own pull-up at GPIO00.Review
11.3.32T9 (BSS138PW)R129 is marked do-not-install and would bridge T9's drain to its source, shorting the transistor out and leaving T6 alone to drive the detect line. This build alternative would be unambiguous if expressed through the eCAD variant feature rather than an ad-hoc do-not-install marking.Review
11.3.33BOOT1 (LG L29K-G2J1-24)Anode fed by R14 470R from 5V0_SYS, cathode switched by T2: approximately 6.2 mA forward current against a 20 mA maximum derated 35% (diode IF(AV)) to 13 mA - correctly sized, and orientation is correct. Source: ams-OSRAM LG L29K-G2J1-24 datasheet.✓
11.3.34NVME1 (LG L29K-G2J1-24)Anode fed by R128 220R from 3V3_SYS, cathode on J8 pin 10 (M.2 LED sink): approximately 5.9 mA, below the 13 mA derated forward current, orientation correct for an open-drain sink. Source: ams-OSRAM LG L29K-G2J1-24 datasheet.✓
11.3.35PWR1 (LG L29K-G2J1-24)Anode fed by R97 2k from 5V0_SYS, cathode switched by T4 from PWR_GOOD: approximately 1.6 mA, within rating but noticeably dimmer than the other indicators - a brightness choice, not a defect. Source: ams-OSRAM LG L29K-G2J1-24 datasheet.✓
11.3.36IC12 (74HC00)VCC on 5V0_SYS at 5 V, inside the 2.0 V to 6.0 V recommended supply range; absolute maximum 7 V derated 25% (CMOS HC, MIL-STD-975M 3.8 note 4) permits 5.25 V, and 5 V is applied - correctly rated. Source: Nexperia 74HC00 datasheet.✓
11.3.37IC12 (74HC00)Gates 1 and 2 are cross-coupled into a set-reset latch (set from the R84/C41 power-on node, reset from #SHUTDOWN_REQ), gates 3 and 4 form a two-inverter chain from Supply/QDEL, and every gate input is driven - no floating CMOS inputs. Source: Nexperia 74HC00 datasheet.✓
11.3.38IC17 (AT24CS01-ST)Supply reaches VCC through D15 from 3V3_SYS, giving roughly 2.55 V to 2.7 V at the datasheet's 1 mA read / 3 mA write currents - inside the 1.7 V to 5.5 V supply range, and the diode correctly isolates the Tag-Connect footprint from the board rail. Source: Microchip/Atmel AT24CS01 datasheet, Panjit 1N4148WS datasheet.✓
11.3.39IC17 (AT24CS01-ST)The 5-lead package carries no A0/A1/A2 pins, so no address strapping is required and the corresponding address bits are fixed at zero - the wiring is complete as drawn. Source: Microchip/Atmel AT24CS01 datasheet.✓
11.3.40IC18 (TPD8S009)VCC pins on HDMI_PWR at 5 V against a 6 V absolute maximum, grounds on GND, and the protected TMDS lines sit below the 5.5 V standoff and the 9 V minimum breakdown - correctly applied. Source: TI TPD8S009 datasheet.✓
11.3.41IC2 (TPD8S009)The four DisplayPort main lanes are clamped on the connector side of the 100n AC coupling capacitors, directly at J2's TXD0 to TXD3 contacts - correct placement for connector ESD. Source: TI TPD8S009 datasheet.✓
11.3.42IC5 (FT232RQ)UART is correctly crossed: TXD reaches J15 pin 238 (UART2_RXD) through R20 22R and J15 pin 236 (UART2_TXD) reaches RXD through R41 22R, both with series damping.✓
11.3.43IC5 (FT232RQ)TEST is tied to GND, all ground pins and the exposed pad are on GND, 3V3OUT carries C30 100n, and the VBUS supply carries C67 2u2 with C72 100n - supply and ground connectivity is complete.✓
11.3.44IC7 (HD3SS3220RNHT)VBUS_DET is fed through R51 909k from USB/USBC_VBUS, inside the required 880 kOhm to 910 kOhm series resistor value. Source: TI HD3SS3220 datasheet.✓
11.3.45IC7 (HD3SS3220RNHT)ENn_CC is held low through R62 0R to GND (CC controller enabled) and ENn_MUX low through R56 0R to GND (mux normal operation), both matching the datasheet's stated tied-low states. Source: TI HD3SS3220 datasheet.✓
11.3.46IC7 (HD3SS3220RNHT)DIR carries R53 200k to 3V3_SYS and INT_N/OUT3 carries R67 200k to 5V0_SYS, matching the datasheet's stated 200 kOhm external pull-up for these open-drain outputs; neither output is routed to a host, so orientation and interrupt status are not observable on-board. Source: TI HD3SS3220 datasheet.✓
11.3.47IC7 (HD3SS3220RNHT)The ADDR strap positions and the R124/R125 links from SDA/SCL to the module I2C0 bus are all do-not-install, which is a self-consistent GPIO-mode build; expressing the choice through the eCAD variant feature would make the fitted configuration unambiguous to test and BOM tools.✓
11.3.48IC7 (HD3SS3220RNHT)AC coupling is applied only in the transmit legs to the connector (100n each) with no capacitors in the receive legs - the correct convention for a USB SuperSpeed link.✓
11.3.49IC7 (HD3SS3220RNHT)VDD5 on 5V0_SYS is inside the 4.5 V to 5.5 V recommended range and VCC33 on 3V3_SYS is inside 3.0 V to 3.6 V. Source: TI HD3SS3220 datasheet.✓
11.3.50REC1, RST1, USR1 (TL3340)Rated 12 VDC and 50 mA; the highest applied level is 1.8 V on USR_BUTTON through R112 10k at 180 uA of contact current - correctly rated for all three positions. Source: E-Switch TL3340 datasheet.✓
11.3.51U1, U5 (LM3671-3.3)VIN on 5V0_SYS: recommended range 2.7 V to 5.5 V is met, and the 6 V absolute maximum derated 15% (regulator_input_voltage_pct = 85) permits 5.1 V against 5 V applied - correctly rated. Source: TI LM3671 datasheet.✓
11.3.52U1, U5 (LM3671-3.3)FB is tied directly to the output capacitor node with no divider, which the datasheet specifies for the fixed-voltage versions. Source: TI LM3671 datasheet.✓
11.3.53U1, U5 (LM3671-3.3)EN is driven from #RESET through R39 and R52 10k, with R139 100k holding that net at ground until the module releases it, so neither enable floats and the 1 uA maximum EN input current makes the series drop negligible against the 1 V enable threshold. Source: TI LM3671 datasheet.✓
11.3.54L5, L6 (LQH32PN2R2NN0)At the regulator's 600 mA rated output the ripple is 3.3 x (1 - 3.3/5) / (2.2 uH x 2 MHz) = 255 mA peak-to-peak, giving a 728 mA peak against 1550 mA Isat, and the 1150 mA maximum open-loop switch limit also stays below it; Irms 1600 mA derated 30% permits 1120 mA. Correctly sized. Source: Murata LQH32PN2R2NN0 and TI LM3671 datasheets.✓
11.3.55U4 (PCA9547)VCC on 3V3_SYS is inside the 2.3 V to 3.6 V recommended supply range, with the ground pin and the exposed pad both on GND. Source: NXP PCA9547 datasheet.✓
11.3.56U4 (PCA9547)A0, A1 and A2 are tied directly to GND, giving slave address 0x70 and satisfying the datasheet requirement that these inputs be held at a defined level, as the part has no internal pull-ups. Source: NXP PCA9547 datasheet.✓
11.3.57U4 (PCA9547)Upstream SDA and SCL are pulled up by R34 and R35 2k to 3V3_SYS: 1.65 mA of sink at the 0.4 V output-low point against 3 mA specified drive - correctly sized. Source: NXP PCA9547 datasheet.✓
11.3.58U4 (PCA9547)Channels 0 to 3 each carry 2k pull-ups referenced to 3V3_FFC1 and 3V3_FFC2, matching the pass-gate ceiling of VDD; channels 4 to 7 are unconnected and the datasheet asks for pull-ups only on used channels. Source: NXP PCA9547 datasheet.✓
11.3.59U7 (MAX3051)VCC on 3V3_SYS against a 3.14 V to 3.47 V supply window; the 3.3 V converter's stated 3.2587 V to 3.3413 V output band sits inside it - correctly applied. Source: Maxim MAX3051 datasheet.✓
11.3.60U7 (MAX3051)RS is tied to GND through R121 0R, which the datasheet defines as high-speed mode up to 1 Mbps; the same document pairs that setting with shielded twisted-pair cabling, and slope-control mode via a resistor of about 12000/(kbps) from RS to GND is the alternative for unshielded cable. Source: Maxim MAX3051 datasheet.✓
11.3.61U7 (MAX3051)SHDN is left unconnected; the datasheet states an internal 50 kOhm to 100 kOhm pull-down and equates unconnected with normal operation, so no external part is required. Source: Maxim MAX3051 datasheet.✓
11.3.62U7 (MAX3051)R123 120R is fitted across CANH and CANL as the datasheet requires for a bus end, and J13 is the only CAN connector on the board, so the node is necessarily an end node. Source: Maxim MAX3051 datasheet.✓
11.3.63U7 (MAX3051)TXD and RXD reach J15 pins 145 and 143 through R71 and R101 0R links; the receiver output-high minimum of 0.8 x VCC gives 2.64 V into the module input. Source: Maxim MAX3051 datasheet.✓
11.3.64USER1 (LG L29K-G2J1-24)Anode fed by R111 2k from 5V0_SYS, cathode on the drain of T5: 1.55 mA forward current against a 20 mA maximum, correct orientation, and no reverse voltage applied - correctly wired, though dim next to the 6.2 mA indicators. Source: ams-OSRAM LG L29K-G2J1-24 datasheet.✓
11.3.65D13 (1N4148WS)Cathode on Supply/Q and anode on Supply/QDEL: reverse-biased while Q is high so R85 470k and C63 10u set the intended delay, and conducting the moment Q falls so C63 discharges immediately and the latch re-arms - orientation consistent with the schematic's cathode marking.✓
11.3.66D13 (1N4148WS)Reverse stress is at most 5 V against a 75 V reverse rating derated 30% to 52.5 V permitted - correctly rated. Source: Panjit 1N4148WS datasheet.✓
11.3.67D13 (1N4148WS)Discharge current is bounded by the driving output's 25 mA absolute-maximum per-pin rating, well inside the diode's 200 mA average and 1.5 A ten-millisecond surge ratings. Source: Nexperia 74HC00 and Panjit 1N4148WS datasheets.✓
11.3.68D2 (1N4148WS)Anode on the 3.3 V feed behind L10 and cathode at J2 pin 20 - correct blocking orientation, preventing an externally powered sink from back-feeding the board rail; 9.4 uF of local bulk (C3, C4) sits on the connector-side node.✓
11.3.69D4 (1N4148WS)Anode on HDMI_PWR behind L9 and cathode at J1 pin 19 - correct blocking orientation, preventing an externally powered HDMI sink from back-feeding the board 5 V branch; 9.4 uF of local bulk (C1, C2) sits on the connector-side node.✓
11.3.70D4 (1N4148WS)Reverse stress is at most the 5 V branch level against a 75 V reverse rating derated 30% (diode_vrrm_pct) to 52.5 V permitted - correctly rated. Source: Panjit 1N4148WS datasheet.✓
11.3.71D4 (1N4148WS)IC18's VCC pins, IC6's B-side supply and the DDC pull-ups R5 and R6 are all on HDMI_PWR ahead of the diode, so they see the undropped 5 V branch and only the cable contact carries the forward drop - correct partitioning.✓
11.3.72T3 (BSS138PW)Standard bidirectional open-drain level shifter: gate on 1V8_SYS, source on FAN_TACH with R95 10k to 1V8_SYS, drain on Supply/FAN_TACH_5V with R46 10k to 5V0_SYS and the fan connector J12 pin 3. Body diode orientation (anode at source) gives the correct high-to-low conduction path before the channel enhances. Source: Nexperia BSS138PW datasheet.✓
11.3.73T3 (BSS138PW)Gate-source 1.8 V against the +/-20 V rating derated 30% (mosfet_vgs_pct) permits 14 V; drain-source 5 V against the 60 V rating derated 30% permits 42 V; drain current 500 uA against 300 mA derated 40% permits 180 mA - correctly rated in every axis. Source: Nexperia BSS138PW datasheet.✓
11.3.74T3 (BSS138PW)Body-diode conduction occurs only during the high-to-low transition before the channel takes over, so the diode drop does not set the steady low level and no parallel Schottky is warranted in this position. Source: Nexperia BSS138PW datasheet.✓
11.3.75T9 (BSS138PW)Gate-source stress 5 V (gate at 5 V through R134, source pulled to ground by T6) against the +/-20 V rating derated 30% (mosfet_vgs_pct) permitting 14 V, and drain-source 5 V against 60 V derated 30% permitting 42 V - correctly rated; at 4.5 V drive Rds(on) is 3.0 Ohm maximum. Source: Nexperia BSS138PW datasheet.✓

11.4 Citations

AI-Assisted —
References
04671.25 (Littelfuse) — datasheet
www.littelfuse.com/~/media/electronics/datasheets/fuses/l...
1N4148WS (Panjit International Inc.) — datasheet, cited pages 1,3
www.panjit.com.tw/upload/datasheet/1N4148WS.pdf
3413.0329 (SCHURTER AG) — datasheet, cited pages 4
us.schurter.com/pdf/english/typ_UST_1206.pdf
74279220181 (Würth Elektronik) — datasheet
www.we-online.com/components/products/datasheet/742792201...
74279221100 (Würth Elektronik) — datasheet
www.we-online.com/catalog/datasheet/74279221100.pdf
74HC00 (Nexperia) — datasheet
assets.nexperia.com/documents/data-sheet/74HC_HCT00.pdf
AT24CS01 (Atmel) — datasheet
ww1.microchip.com/downloads/en/devicedoc/Atmel-8815-SEEPR...
BLM18SG121TN1 (Murata Manufacturing Co., Ltd.) — datasheet
www.mouser.com/datasheet/2/281/ENFA0003-769587.pdf
BSS138PW (ElecSuper) — datasheet
ruelectronics.com/files/Datasheet_BSS138PW_ElecSuper-cfd8...
ESD5B5.0ST1G (onsemi) — datasheet
www.mouser.com/datasheet/2/308/ESD5B5_0ST1_D-1805066.pdf
HD3SS3220 (Texas Instruments) — datasheet, cited pages 1
www.ti.com/lit/ds/symlink/hd3ss3220.pdf?ts=1663000043694&...
LG L29K-G2J1-24 (ams-OSRAM) — datasheet
www.farnell.com/datasheets/4535403.pdf
LM3671-3.3 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/lm3671.pdf?ts=1683686068398&ref...
LMQ62440BPP-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/lmq62440-q1.pdf?ts=1636528724430
LQH32PN2R2NN0 (Murata Manufacturing Co., Ltd.) — datasheet
pim.murata.com/asset/pim4/inductor/JELF243A-0061_PDF_INDU...
MAX3051 (Maxim Integrated) — datasheet
www.mouser.com/datasheet/2/256/MAX3051-1280983.pdf
NCP380LSNAJAA (onsemi (Semiconductor Components Industries, LLC)) — datasheet
www.onsemi.com/pub/Collateral/NCP380JP-D.PDF
PCA9547 (NXP Semiconductors) — datasheet
www.nxp.com/docs/en/data-sheet/PCA9547.pdf
SiC477 (Vishay Siliconix) — datasheet, cited pages 1
www.vishay.com/docs/77113/sic47x.pdf
SMBJ (Kyocera AVX) — datasheet, cited pages 1,2,3
datasheets.kyocera-avx.com/tvsdiodes.pdf
T520B337M006ATE040 (KEMET) — datasheet
www.yageogroup.com/component-documentation/download/specs...
TL3340 (E-Switch) — datasheet, cited pages 1,2
mouser.com/datasheet/2/140/TL3340-2065742.pdf
TPD4E05U06-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tpd4e05u06-q1.pdf?HQS=dis-mous-...
TPD8S009 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tpd8s009.pdf?ts=1679406571326&r...
TPS7A0518P (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tps7a05.pdf?ts=1678973651768&re...
XFL4020-222ME (Coilcraft) — datasheet
www.mouser.com/datasheet/2/597/xfl4020-270756.pdf

12 Designer Annotated Nets

Annotated signals19

Designer-placed annotation markers on nets that are not already analyzed as HSSI differential pairs or Memory Bus signals.

Designer Annotations
Net NameAnnotationImpedanceNotes
Display/TMDS_CECZ100_ext
Display/TMDS_CEC_INZ100_ext
Display/TMDS_HPD_INZ100_ext
Display/TMDS_SCLZ100_ext
Display/TMDS_SCL_5V0Z100_ext
Display/TMDS_SDAZ100_ext
Display/TMDS_SDA_5V0Z100_ext
TMDS_HPDZ100_ext
USB/CC1Z90_in
USB/CC2Z90_in
USB/C_CC1Z90_in
USB/C_CC2Z90_in
USB/EN_MUXZ90_in
USB/USBC_ADDRZ90_in
USB/USBC_FAULTZ90_in
USB/USBC_IDZ90_in
USB/USBC_INTNZ90_in
USB/USBC_SCLZ90_in
USB/USBC_SDAZ90_in

13 EMC & ESD Protection Checks

Checks run1
Passed0
Issues found4
EMC Check Summary
CheckIssuesStatus
Connector Shell Grounding4

13.1 Connector Shell Grounding

RefDesTypeIssueRecommendationSeverity
J11USB-C_WE_632723300011J11 (632723300011): Shell pins connected directly to logic GND which masks design intent for layout.Per USB Type-C Specification R2.5, Section 3.2.1: the receptacle shell shall be connected to the PCB ground plane — this is a directive to prevent a floating shell, not a directive to ignore IEC 61000-4-2 ESD requirements and mandate a direct short. Place shell/shield tabs on a dedicated schematic net per connector (e.g. SHIELD_GND_TYPE_C, SHIELD_GND_SD). This net represents the copper pour under the shielded connector. For plastic enclosed products with no earth ground, add a schematic note for dense via stitching of the shield copper pours to the ground plane with no isolation network. For earth ground connected products, review if the product requires R||C isolation of shields from logic GND to meet ESD compliance (IEC 61000-4-2).
J2DisplayPort-Mini_TE_2129320-3J2 (2129320-3): Shield pins SH connected directly to logic GND which masks design intent for layout.Place shell/shield tabs on a dedicated schematic net per connector (e.g. SHIELD_GND_TYPE_C, SHIELD_GND_SD). This net represents the copper pour under the shielded connector. For plastic enclosed products with no earth ground, add a schematic note for dense via stitching of the shield copper pours to the ground plane with no isolation network. For earth ground connected products, review if the product requires R||C isolation of shields from logic GND to meet ESD compliance (IEC 61000-4-2).
J8Bus_M.2_MDT580M01001J8 (MDT580M01001): Shield pins SHIELD, SHIELD connected directly to logic GND which masks design intent for layout.Place shell/shield tabs on a dedicated schematic net per connector (e.g. SHIELD_GND_TYPE_C, SHIELD_GND_SD). This net represents the copper pour under the shielded connector. For plastic enclosed products with no earth ground, add a schematic note for dense via stitching of the shield copper pours to the ground plane with no isolation network. For earth ground connected products, review if the product requires R||C isolation of shields from logic GND to meet ESD compliance (IEC 61000-4-2).
J9USB-Micro-B_Molex_473460001J9 (473460001): Shield pins SHIELD connected directly to logic GND which masks design intent for layout.Place shell/shield tabs on a dedicated schematic net per connector (e.g. SHIELD_GND_TYPE_C, SHIELD_GND_SD). This net represents the copper pour under the shielded connector. For plastic enclosed products with no earth ground, add a schematic note for dense via stitching of the shield copper pours to the ground plane with no isolation network. For earth ground connected products, review if the product requires R||C isolation of shields from logic GND to meet ESD compliance (IEC 61000-4-2).

13.2 ESD/TVS Protection Audit

Audit of connector-facing signal nets for ESD/TVS protection presence and orientation correctness.

Connector-facing signal nets analyzed:58 connector-facing signal(s). 20 protected, 38 unprotected, 20 orientation issue(s).

13.2.1 Unprotected Signal Nets

Signal NetConnectorStatus
USB1_D_NJ11No ESD Protection
USB1_D_PJ11No ESD Protection
Net-(J11-SBU2)J11No ESD Protection
ENET_TRD1_NJ3No ESD Protection
ENET_TRD3_NJ3No ESD Protection
ENET_LED1J3No ESD Protection
ENET_LED0J3No ESD Protection
ENET_TRD2_PJ3No ESD Protection
ENET_TRD3_PJ3No ESD Protection
ENET_TRD0_PJ3No ESD Protection
ENET_TRD2_NJ3No ESD Protection
ENET_TRD0_NJ3No ESD Protection
Net-(J3-Pad14)J3No ESD Protection
ENET_TRD1_PJ3No ESD Protection
Net-(J3-Pad12)J3No ESD Protection
Display/TMDS_CLK_C_NJ1No ESD Protection
Display/ML_C_LANE3_PJ2No ESD Protection
Display/ML_C_LANE2_NJ2No ESD Protection
Display/EDP_C_AUX_C_NJ2No ESD Protection
Display/DP_CECJ2No ESD Protection
Display/ML_C_LANE2_PJ2No ESD Protection
Display/TMDS_CLK_C_PJ1No ESD Protection
Display/ML_C_LANE0_NJ2No ESD Protection
Display/TMDS_D1_C_PJ1No ESD Protection
Display/TMDS_D2_C_NJ1No ESD Protection
Net-(D2-C)J2No ESD Protection
Display/DP_MODEJ2No ESD Protection
Display/TMDS_D1_C_NJ1No ESD Protection
Display/EDP_C_AUX_C_PJ2No ESD Protection
Display/TMDS_D0_C_PJ1No ESD Protection
Display/ML_C_LANE1_PJ2No ESD Protection
Display/ML_C_LANE3_NJ2No ESD Protection
Net-(J1-GND)J1No ESD Protection
Display/TMDS_D0_C_NJ1No ESD Protection
Net-(D4-C)J1No ESD Protection
Display/ML_C_LANE1_NJ2No ESD Protection
Display/ML_C_LANE0_PJ2No ESD Protection
Display/TMDS_D2_C_PJ1No ESD Protection

13.2.2 Protected Signal Nets

Signal NetConnectorProtection DeviceDevice TypeRail ConnectionOrientationStatus
USB/C_USBSS_RX1_PJ11D6TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/C_USBSS_TX1_NJ11D6TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/C_USBSS_TX1_PJ11D6TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/C_USBSS_TX2_PJ11D7TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/OTG_USB_IDJ5D8TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/DBG_USB_D_NJ9D3PESD2USB5UV-TRGNDSuspectOrientation Warning
USB/C_CC2J11D5PESD2USB5UV-TRGNDSuspectOrientation Warning
USB/C_USBSS_RX2_NJ11D7TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
OTG_USB_D_NJ5D8TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/C_CC1J11D5PESD2USB5UV-TRGNDSuspectOrientation Warning
USB/DBG_USB_D_PJ9D3PESD2USB5UV-TRGNDSuspectOrientation Warning
USB/C_USBSS_RX1_NJ11D6TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/C_USBSS_RX2_PJ11D7TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
USB/C_USBSS_TX2_NJ11D7TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
OTG_USB_D_PJ5D8TPD4E05U06QDQARQ1GNDSuspectOrientation Warning
Display/TMDS_SCL_5V0J1D10PESD2USB5UV-TRGNDSuspectOrientation Warning
Display/TMDS_HPD_INJ1D11PESD2USB5UV-TRGNDSuspectOrientation Warning
Display/DP_HPD_INJ2D12PESD2USB5UV-TRGNDSuspectOrientation Warning
Display/TMDS_CEC_INJ1D11PESD2USB5UV-TRGNDSuspectOrientation Warning
Display/TMDS_SDA_5V0J1D10PESD2USB5UV-TRGNDSuspectOrientation Warning

13.3 EMC & ESD Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

13.3.1 EMC Architecture — Grounding, Filtering and Shielding

AI-Assisted — The board runs a single digital ground domain (GND). J3 (RJ45) is the only connector with a separated shield net: its shell sits on EGND, bonded to GND through C14 (100p) only. That is a capacitive-only bond — no bleed resistor is fitted, so static charge on the RJ45 shell has no DC drain path, and the 100p value gives roughly 1.6 kohm at 1 MHz, a high impedance for the low-frequency content of an IEC 61000-4-2 discharge. The usual industrial arrangement is 1 Mohm in parallel with a capacitor rated 2 kV or higher. J1 (HDMI) returns HDMI_SHIELD to GND through ferrite L8 (BLM18SG, 120 ohm at 100 MHz) and J5 (micro-B) through the identical L7; these bonds deliberately raise shield impedance at radiated-emission frequencies (EN 55032 class A/B, 30 MHz–1 GHz) but present an inductive path to ESD current, which is the trade-off the designer chose. J2, J8, J9 and J11 place their shell pins directly on the main GND net. HDMI DDC lines are filtered only by the 2k pull-ups R5/R6 to HDMI_PWR; TMDS pairs carry 5R6 series resistors (R1–R10) and 100n AC coupling (C73–C80), which attenuates common-mode ingress but provides no clamp on the connector side. CAN at J13 is terminated by R123 (120 ohm class split-less single resistor) with no common-mode choke.

13.3.2 HDMI Connector J1

AI-Assisted — J1 is a panel-facing micro-HDMI receptacle — fully external and hot-pluggable. The four TMDS pairs run from J1 through 5R6 series resistors into IC18 (TPD8S009DSMR), so the clamp array sits on the IC side of the series resistors rather than at the connector contacts; the 5R6 resistors add useful series impedance ahead of the clamp, and IC18's VCC is on HDMI_PWR, which is fed from 5V0_SYS through ferrite L9 and referenced by C27 (100n). DDC (Display/TMDS_SCL_5V0, Display/TMDS_SDA_5V0) is clamped by D10 (PESD2USB5UV) with pin 3 on GND, and HPD/CEC by D11 on the same part, both at the connector. J1 pin 19 (+5V) feeds HDMI_PWR through blocking diode D4 (1N4148WS, cathode on the connector-side net Net-(D4-C), anode on HDMI_PWR) with C1 (4u7) and C2 local — orientation is consistent for blocking sink-side current back into the source, and 1N4148WS 75 V/150 mA suits the DDC-level load. There is no transient clamp on the J1 +5V contact itself; that contact is an externally exposed 5 V pin and the arriving transient sees only D4 and its bypass. J1 pin 16 (ground) goes to Net-(J1-GND) through R12 (0R) to GND.

13.3.3 DisplayPort Connector J2 and PCIe-Class Connector J10

AI-Assisted — J2 is an external Mini DisplayPort receptacle. The four main lanes are AC-coupled (C39/C40, C42/C43, C6/C7, C8/C12) and clamped by IC2 (TPD8S009DSMR) on the lane nets between the coupling caps and the connector. AUX± reaches J2 through C44/C45 with no clamp fitted on those two contacts. HPD is clamped by D12 (PESD2USB5UV, pin 3 on GND) before buffer IC11, and CFG1/CFG2 are only pulled down by R31/R32. DP_PWR at J2 pin 20 is fed through D2 (1N4148WS, cathode to Net-(D2-C) at the connector, anode to DP_PWR) with C3/C4 — correct blocking orientation, with no clamp on the exposed DP_PWR contact. J10 is a 12-way FFC socket carrying PCIE1 lanes, CLK, RST and CLKREQ with a 3V3_SYS supply pin; an FFC ribbon inside an enclosure is an internal board-to-board link, and per the internal-backplane guidance no external TVS is expected. The PCIE1 pairs run connector-to-module direct with no AC coupling on this board, so any ESD arriving on the ribbon reaches J15 unattenuated — worth weighing if that ribbon ever leaves the enclosure.

13.3.4 Ethernet Connector J3

AI-Assisted — J3 is a Bel SI-51005-F integrated-magnetics RJ45. The four pairs ENET_TRD0..3 run straight from J3 to the module socket J15 with no external clamp, which is the correct choice: the internal transformer provides galvanic isolation and attenuates the discharge before it reaches the PHY, and IEEE 802.3 requires 1500 V rms isolation on this interface. If PHY-side robustness is later wanted, the clamp belongs between the magnetics and J15, referenced to GND. J3 pin 6 (CTREF) is unused. Bob Smith termination is present only in part — J3 pins 12 and 14 go through R38 and R40, and the shell path is C14 to GND via EGND. The shell bond is the one real EMC weakness on this connector: a single 100p with no parallel bleed resistor leaves the shell without a DC discharge path (IEC 61000-4-2 contact discharge at ±4 kV or ±8 kV for industrial equipment), and the low capacitance value keeps the shell impedance high through the sub-30 MHz band where common-mode cable current dominates conducted emissions under EN 55032.

13.3.5 USB Type-C Connector J11

AI-Assisted — J11 is an external USB Type-C receptacle. Both SuperSpeed lane sets are clamped: D6 (TPD4E05U06-Q1) across TX1/RX1 and D7 across TX2/RX2, each with pins 3 and 8 on GND, giving ±12 kV IEC 61000-4-2 contact and ±15 kV air-discharge capability with 0.5 pF typical I/O capacitance — low enough not to disturb 5 Gbit/s eyes (Texas Instruments TPD4E05U06-Q1 datasheet). CC1/CC2 are clamped by D5 (PESD2USB5UV) at the connector. The USB2 pair USB1_D_N/USB1_D_P runs from J11 pins A6/A7/B6/B7 directly to J15 pins 115/117 with no clamp on that pair and no series element — this is the only high-exposure external signal path on the Type-C port left unclamped. SBU2 lands on a test point only; SBU1 (A8) is unused. VBUS (A4/A9/B4/B9) is sourced by load switch IC3 and carries no transient clamp at the receptacle contacts. Note the TX2 lane assignment: USB/C_USBSS_TX2_P appears on the connector with only C53 and D7 in its path, while USB/C_USBSS_TX2_N pairs to USB/USBSS_TX2_P at the mux — the TX2 pair mapping between J11, D7 and IC7 is not symmetric with the TX1 pair.

13.3.6 USB Micro-B Connectors J5 and J9

AI-Assisted — J5 is the external OTG micro-B port. D8 (TPD4E05U06-Q1) clamps OTG_USB_D_N, OTG_USB_D_P and USB/OTG_USB_ID with pins 3 and 8 on GND — four channels used on a four-channel part, correctly placed at the connector. J5 VBUS is on USB/OTG_USB_VBUS sourced by IC1 and has no clamp at the receptacle contact. The J5 shell returns through L7 to GND. J9 is the debug micro-B port: D3 (PESD2USB5UV) clamps DBG_USB_D_N/DBG_USB_D_P to GND at the connector, and the shell is directly on GND. Both ports are hot-plug, direct-to-IC interfaces with no isolation, so the clamps present are appropriate. The PESD2USB5UV parts (D3, D5, D10, D11, D12) are bidirectional dual arrays with the common pin on GND in every instance; none is a directional device, so no orientation check applies. Their clamping and standoff figures were not supplied, so the clamp level against the protected pin ratings could not be closed.

13.3.7 M.2 Socket J8, FFC Camera Sockets J6/J7 and Low-Speed Headers

AI-Assisted — J8 is an internal M.2 Key-M socket with SH1/SH2 directly on GND; PCIe TX lanes are AC-coupled through C37/C38, C49/C51, C52/C68, C69/C70 and the RX lanes run direct to J15. Internal backplane-class connectors of this type do not normally carry external TVS, and none is fitted. J6 and J7 are 52-way FFC camera sockets carrying MIPI CSI pairs with 5V0_SYS and fused 3V3_FFC1/3V3_FFC2 rails (F1, F2). These are internal ribbon links; the CSI pairs go direct to J15 with no clamps, and each camera I2C branch has its own pull-up pair. J12 (fan, PicoBlade) exposes FAN_PWM and FAN_TACH at 5 V through level shifter U3 and T3 with no clamp — a fan pigtail inside an enclosure is a moderate ESD exposure and a short one. J13 (CAN, JST SH) is the highest-risk low-speed port: CANH/CANL reach U7 (MAX3051EKA) with only R123 across them and no bus clamp, and CAN cabling in industrial installations is routinely subject to ±8 kV contact discharge and IEC 61000-4-4 burst per IEC 61000-6-2. J14 (I2C) runs I2C1_SCL/I2C1_SDA straight to J15 unclamped. J4 is a barrel jack on VIN (6–36 V) feeding through F3 with no transient suppression at the jack.

13.4 Observations

AI-Assisted — The design's ESD strategy is strong on the high-speed display and USB ports and thin on the low-speed industrial ports. Four multi-channel clamp arrays (IC2, IC18, D6, D7, D8) plus five dual arrays cover HDMI, DisplayPort, Type-C SuperSpeed, OTG and debug USB. The gaps are consistent in character: externally exposed power contacts (J1 pin 19, J2 pin 20, J11 VBUS, J5 VBUS, J4 VIN) carry no transient clamp, and the low-speed field interfaces (J13 CAN, J14 I2C, J12 fan) carry none either. For an industrial classification the applicable immunity baseline is IEC 61000-6-2, which calls for ±4 kV contact / ±8 kV air on enclosure ports and ±2 kV line-to-ground surge on signal lines longer than 3 m — J13 and J14 are the two ports where that matters most. Shield-bond design intent is captured on the schematic for J1, J3 and J5 through named shield nets; J2, J8, J9 and J11 place shell pins on the main GND net, so the layout engineer has no net-level guidance for separating those shield copper pours. In a plastic enclosure the correct treatment is a direct, densely stitched bond of each shield pour to the logic ground plane so the plane rises common-mode with the shell. In a metal chassis with earth ground, review whether 1 Mohm parallel 4.7 nF rated 2 kV or above between each shield pour and logic ground is required, with the pour bonded mechanically to chassis at the panel opening.

13.5 Findings

AI-Assisted —
#ConnectorFindingSeverity
13.5.1J3Shell bond to GND is capacitive-only: C14 (100p) between EGND and GND with no parallel bleed resistor, leaving the RJ45 shell without a DC static-drain path and at high impedance below 30 MHz. Add a 1 Mohm bleed resistor in parallel with C14 and raise the capacitor to a 2 kV-rated value (4.7 nF class) per the IEC 61000-4-2 and EN 55032 shield-bond practice.Medium
13.5.2J13CANH/CANL arrive from external field cabling with only R123 across the pair and no bus clamp or common-mode choke ahead of U7 (MAX3051EKA). Fit a bidirectional CAN-rated TVS array from CANH and CANL to GND at J13 to meet the IEC 61000-6-2 industrial signal-port immunity level.Medium
13.5.3J14I2C1_SCL and I2C1_SDA run from the external JST header directly to J15 pins 189/191 with no clamp or series element. Fit a dual bidirectional clamp array to GND at J14 if this header leaves the enclosure. Source: IEC 61000-6-2 signal-port requirement.Medium
13.5.4J11USB2 pair USB1_D_N/USB1_D_P runs from J11 pins A6/A7/B6/B7 directly to J15 pins 115/117 with no clamp, while both SuperSpeed lane sets are protected by D6/D7. Fit a two-channel bidirectional clamp to GND on the USB2 pair at J11. Source: USB Type-C specification R2.5 and IEC 61000-4-2.Medium
13.5.5J11TX2 lane mapping is not symmetric with TX1: USB/C_USBSS_TX2_N on J11 pin B3 pairs to USB/USBSS_TX2_P at IC7, and USB/C_USBSS_TX2_P (pin B2) carries only C53 and D7 with no corresponding mux net shown. Trace and correct the TX2 pair assignment between J11, D7, C53/C54 and IC7 so both polarities map consistently.Medium
13.5.6J4Barrel jack on VIN (6.00-36.00 V) passes through F3 with no transient suppressor at the jack. Fit a bidirectional TVS of suitable standoff from the VIN contact to GND at J4 to meet the IEC 61000-6-2 surge level for a DC power port.Medium
13.5.7J11VBUS contacts A4/A9/B4/B9 have no transient clamp at the receptacle; the only series element is load switch IC3. Consider a 6 V-class bidirectional TVS from VBUS to GND at the connector — the 6 V class covers the 5.5 V vSafe5V ceiling of the USB Type-C specification with a guaranteed leakage figure.Low
13.5.8J11Shell pin SH is on the main GND net, so the shield-bond strategy is not captured as design intent and layout has no net-level guidance for a separate shield pour. Assign a dedicated SHIELD_GND net for J11 with the bond components explicit on the sheet.Low
13.5.9J5VBUS contact (USB/OTG_USB_VBUS, sourced by IC1) has no transient clamp at the receptacle. Consider a 6 V-class bidirectional TVS from the VBUS contact to GND at J5.Low
13.5.10J9Shell pin SH shares the main GND net, so no separate shield pour intent is expressed for the layout engineer. Assign a dedicated SHIELD_GND net.Low
13.5.11J1Pin 19 (+5V) is an externally exposed 5 V contact with no transient clamp; the only series part is blocking diode D4. Consider a 6 V-class bidirectional TVS from the connector-side +5V node to GND at J1.Low
13.5.12J2AUX+ and AUX- reach the connector through C44/C45 with no clamp on those two contacts. Fit a two-channel bidirectional clamp to GND at J2 on the AUX pair.Low
13.5.13J2DP_PWR at pin 20 has no transient clamp; D2 (1N4148WS, cathode to the connector-side node, anode to DP_PWR) blocks reverse current correctly and its 75 V rating suits the position. Consider a 6 V-class TVS at the contact.Low
13.5.14J2Shell pin SH and seven ground contacts are on the main GND net; no dedicated shield net expresses the pour separation intent for layout. Assign a SHIELD_GND net for J2.Low
13.5.15J12Fan header exposes FAN_PWM and FAN_TACH at 5 V through U3 and T3 with no clamp on either contact. Fit a two-channel bidirectional clamp to GND at J12 if the fan pigtail can be handled during service.Low
13.5.16J5Shell returns through ferrite L7 (BLM18SG 120 ohm at 100 MHz) to GND — a deliberate high-frequency shield bond; note the ferrite presents series inductance to ESD current, so the low-inductance path per IEC 61000-4-2 depends on the pour and via stitching under the connector.Review
13.5.17J1Shield returns via ferrite L8 to GND on a dedicated HDMI_SHIELD net — design intent captured; the ferrite raises shield impedance to ESD current, so the ESD return depends on layout stitching.Review
13.5.18J8Shield pins SH1/SH2 share the main GND net; for an internal socket this is normal practice, but the pour intent is not expressed as a separate net.Review
13.5.19J1012-way FFC socket carries PCIE1 lanes direct to J15 with no AC coupling on this board and no clamp. Acceptable as an internal ribbon link; if the ribbon exits the enclosure, fit clamps on the differential pairs at J10.Review
13.5.20J4VIN is an external DC input rated 6.00-36.00 V; the voltage rating of the parts on this rail against the actual supply used in the installation was not assessed because no rail load or part-rating data for the VIN branch is available, so the surge-energy coordination between F3 and downstream parts was not done.Review
13.5.21All shielded connectorsClamping voltage and standoff of the PESD2USB5UV devices (D3, D5, D10, D11, D12) are not available, so the clamp level against the ratings of IC5, IC6, IC7 and IC11 inputs and the standoff-versus-rail comparison on the 5 V DDC lines were not done.Review
13.5.22Board levelSingle digital ground domain with no chassis domain declared; shield returns are per-connector (EGND via C14, HDMI_SHIELD via L8, Net-(J5-SHIELD) via L7) and all other shells sit on GND. Architecture is coherent for a plastic-enclosure product; for a metal chassis, review whether 1 Mohm parallel 4.7 nF rated 2 kV or above is needed between each shield pour and logic GND.Review
13.5.23J3Ethernet pairs ENET_TRD0..3 run unclamped from the integrated-magnetics jack to J15 — correct, the transformer provides the IEEE 802.3 1500 V rms isolation and attenuates the discharge; any added clamp belongs on the J15 side. Source: IEEE 802.3 clause 14/40 isolation requirement.✓
13.5.24J11SuperSpeed lanes clamped by D6/D7 (TPD4E05U06-Q1) with pins 3 and 8 on GND: ±12 kV IEC 61000-4-2 contact, ±15 kV air, 0.5 pF typical I/O capacitance, 0 to 5.5 V recommended I/O range — correct for 5 Gbit/s lanes on a 5 V-referenced port. Source: Texas Instruments TPD4E05U06-Q1 datasheet.✓
13.5.25J5OTG data pair and ID line clamped by D8 (TPD4E05U06-Q1), pins 3 and 8 on GND, ±12 kV contact per IEC 61000-4-2 — correct placement at the connector for a hot-plug direct-to-IC port. Source: Texas Instruments TPD4E05U06-Q1 datasheet.✓
13.5.26J9Debug port data pair clamped by D3 (PESD2USB5UV) with pin 3 on GND at the connector; shell directly on GND. Placement is correct for a hot-plug port.✓
13.5.27J1TMDS pairs protected by IC18 (TPD8S009DSMR) placed after the 5R6 series resistors R1–R10 and the 100n coupling caps C73–C80; DDC clamped by D10 and HPD/CEC by D11, both bidirectional with pin 3 on GND at the connector. Correct topology for an external HDMI port.✓
13.5.28J1D4 (1N4148WS) blocks reverse current from HDMI_PWR into the connector +5V contact; cathode on the connector-side net, anode on HDMI_PWR — orientation consistent with the blocking role, and the 75 V / 150 mA rating covers the DDC-level load. Source: schematic polarity and 1N4148WS device class.✓
13.5.29J2Main DisplayPort lanes AC-coupled and clamped by IC2 (TPD8S009DSMR) on the connector side; HPD clamped by D12 to GND ahead of IC11. Correct for an external port.✓
13.5.30J8M.2 Key-M socket is an internal board-to-board interface with SH1/SH2 on GND and PCIe TX lanes AC-coupled; no external TVS expected or fitted, consistent with internal backplane practice.✓
13.5.31J6, J752-way FFC camera sockets carry CSI pairs direct to J15 with no clamps; rails 3V3_FFC1/3V3_FFC2 are fused by F1/F2. Consistent with internal ribbon interconnect, no external TVS expected.✓

13.6 Citations

AI-Assisted —
References
TPD4E05U06-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/tpd4e05u06-q1.pdf?HQS=dis-mous-...

14 Design-for-Test

Design for Testability (DFT) analysis for ICT/bed-of-nails test coverage.

14.1 DFx Options Selected

OptionSettingDescription
Test Point Insertion
Insert on power railsYesPlace test points on power rail nets in schematic
Insert on all netsNoExtend TP insertion to signal nets beyond power rails
Exclude HSSI netsYesExclude HSSI/differential pair nets from TP insertion
Exclude DRAM netsYesExclude SDRAM/DDR nets from TP insertion
Exclude BSCAN opens (full)YesExclude nets with 100% boundary scan opens coverage
Exclude BSCAN opens (partial)NoExclude nets with partial boundary scan opens coverage
Exclude BSCAN shortsNoExclude nets with boundary scan shorts coverage
GND test points6Number of GND test points to insert for BON fixture ground connections
Target PCOLA-SOQ0%Insert TPs in priority order until this PCOLA-SOQ % is reached
Target fault coverage0%Insert TPs in priority order until this shorts/opens fault coverage % is reached
Kelvin min resistance0.000 ohmLower bound (ohms) for Kelvin 4-wire TP insertion range
Kelvin max resistance1.000 ohmUpper bound (ohms) for Kelvin 4-wire TP insertion range
Tester Styles
OpticalAOIAutomated Optical Inspection of visible solder joints
AXIYesAutomated X-ray Inspection of hidden solder joints (BGA, QFN)
ATEFlying_probeDigital IO, DMM, shorts/opens via flying probe
Test Access
JTAG/LSSI ConnectorYesConnector access to JTAG, SPI, I2C buses
IO ConnectorsNoIO connectors available for external stimulus/observation
TP AccessFlying_probeFlying probe access without fixture
Test Point Identification
BON TP refdesTP#,TP-*,TP_*,TP#*Refdes patterns identifying BON test points
BON TP footprints*All footprints accepted
FP TP refdesTP#,TP-*,TP_*,TP#*,MP#Refdes patterns identifying flying probe test points
FP TP footprints*All footprints accepted
LoopbackNoneNo loopback cables
Test Types
Powered-Off Shorts/OpensYesUnpowered shorts and opens detection via probe access
PassivesYesR, C, L value measurement via probe or fixture access
Active AnalogNoVoltage regulator, reference, and op-amp output verification
Non-BSCAN DigitalNoDigital ICs without boundary scan: pin observability analysis
Boundary Scan1149.1_1149.6IEEE 1149.1-2001 + 1149.6-2003 AC boundary scan
LSSINoJTAG chain, SPI, I2C, UART bus test coverage analysis
JTAG FunctionalNoFunctional verification beyond structural scan
Require Rail TPs for Diode TestNoRequire TPs on all IO power rails for ESD diode opens test (default: basic test with GND TP only)
Capacitance Probe Plate Target Devices—Refdes or footprint patterns for capacitance probe plate targets (ICs and vertical connectors)
Use Boundary Scan for Capacitance Probe Plate StimulusNoCount boundary scan drive cells on other devices as valid stimulus for the capacitance probe plate (applicable to VTEP / IEEE 1149.8.1-capable hardware)
NVM Programming
Default MethodDirectProgram via direct pin access; TPs on flash data/control lines
Environment
Test environmentlabPrototype/NPI: manual probing, bench JTAG, longer test times acceptable

14.2 Power Rail Test Point Check

Power rails found18
Rails with TPs5
Rails without TPs13
13 power rail(s) need test points in the submitted design.
21 test point(s) inserted in modified output. Download modified schematics to see placements.
Power Rail Coverage
Net NameAnnotationTest PointStatus
3V3_SYS- NEEDS TP
5V0_DBG- NEEDS TP
5V0_SYSTP41, TP42✓
GNDTP12, TP17, TP30, TP44✓
Supply/3V3_VCC- NEEDS TP
Supply/5V_BOOT- NEEDS TP
Supply/5V_COMP- NEEDS TP
Supply/5V_PHASE- NEEDS TP
Supply/5V_SNS- NEEDS TP
Supply/5V_SS- NEEDS TP
Supply/5V_SW- NEEDS TP
Supply/5V_VINTP11✓
Supply/VDD_5V_DCDC- NEEDS TP
USB/OTG_USB_VBUS- NEEDS TP
USB/USBC_VBUS- NEEDS TP
USB/USB_DBG_VBUS- NEEDS TP
VDD_MODTP38✓
VINTP16✓
Inserted Test Points (Modified Output)
Test PointNetSheet
TP483V3_SYSinterfaces.kicad_sch
TP49Supply/3V3_VCCsupply.kicad_sch
TP50Supply/5V_BOOTsupply.kicad_sch
TP51Supply/5V_PHASEsupply.kicad_sch
TP52Supply/5V_SNSsupply.kicad_sch
TP53Supply/5V_SSsupply.kicad_sch
TP54Supply/5V_SWsupply.kicad_sch
TP55Supply/VDD_5V_DCDCsupply.kicad_sch
TP56Supply/5V_COMPsupply.kicad_sch
TP575V0_DBGusb-debug.kicad_sch
TP58USB/OTG_USB_VBUSusb-debug.kicad_sch
TP59USB/USBC_VBUSusb-debug.kicad_sch
TP60USB/USB_DBG_VBUSusb-debug.kicad_sch
TP63GNDusb-debug.kicad_sch
TP64GNDsupply.kicad_sch
TP65GNDsom.kicad_sch
TP66GNDdisplay.kicad_sch
TP67GNDcsi.kicad_sch
TP68GNDinterfaces.kicad_sch
Signal Net Test Points (Modified Output)
Test PointNetSheet
TP61Net-(IC3-FAULT)usb-debug.kicad_sch
TP62USB/OTG_USB_FAULTusb-debug.kicad_sch

14.3 IC Enable Test Point Check

ICs with enable pins (power switches, regulators, etc.) require test points for fixture-based test to disable the device during test.

ICTypePin NamePin #Issue
IC13SN74LVC1G126_SC-70OE1tied to VCC - recommend pull-up resistor and test point
U1LM3671MF-3.3_SOTEN3EN has pull resistor but no test point at R39_2, U1_3
U5LM3671MF-3.3_SOTEN3EN has pull resistor but no test point at R52_2, U5_3
IC4TPS7A0518P_SOT23-5EN3EN has pull resistor but no test point at IC4_3, R92_2
U2LM62440-Q1EN7EN has pull resistor but no test point at R44_2, U2_7
IC15TPS7A0518P_SOT23-5EN3tied to VCC - recommend pull-up resistor and test point
IC6PCA9517ADPEN5EN has pull resistor but no test point at C27_1, D4_2, IC18_13, IC18_15, IC6_5, IC6_8, L9_2, R5_1, R6_1
IC11SN74LV1T125DBVROE1tied to GND - recommend pull-down resistor and test point

14.4 Kelvin Test Points Check

Threshold0.000 < R ≤ 1.000 Ω
Current sense resistors found0

No current sense resistors found in range (0 < R < 1.000 ohm).

14.5 Current Test Points

Total test points42
Test Points by Footprint
FootprintDescriptionCount
TP_SMD_1.5mmTP_1.5mm_SMD42

14.5.1 By Sheet

Test PointNet NameFootprint
csi (6 test points)
TP1CSI/CAM_I2C_SDATP_SMD_1.5mm
TP3Net-(J15B-(CSI1_CLK)RSVD)TP_SMD_1.5mm
TP4Net-(J15B-(CSI1_CLK)RSVD)TP_SMD_1.5mm
TP6Net-(J15B-CAM1_PWDN)TP_SMD_1.5mm
TP9Net-(J15B-GPIO01)TP_SMD_1.5mm
TP10CSI/CAM_I2C_SCLTP_SMD_1.5mm
display (7 test points)
TP2M2_ALERTTP_SMD_1.5mm
TP25TMDS_HPDTP_SMD_1.5mm
TP26Display/TMDS_CECTP_SMD_1.5mm
TP33Display/TMDS_SCLTP_SMD_1.5mm
TP34Display/TMDS_SDATP_SMD_1.5mm
TP35USR_LEDTP_SMD_1.5mm
TP36USR_BUTTONTP_SMD_1.5mm
interfaces (2 test points)
TP7Net-(J8-SMB_DATA)TP_SMD_1.5mm
TP20Net-(J8-SMB_CLK)TP_SMD_1.5mm
som (11 test points)
TP13FAN_PWMTP_SMD_1.5mm
TP14FAN_TACHTP_SMD_1.5mm
TP23GEN0_SCLTP_SMD_1.5mm
TP24GEN0_SDATP_SMD_1.5mm
TP27PWR_ENTP_SMD_1.5mm
TP28#SHUTDOWN_REQTP_SMD_1.5mm
TP29#RESETTP_SMD_1.5mm
TP31#PWR_BUTTONTP_SMD_1.5mm
TP37#RESETTP_SMD_1.5mm
TP38VDD_MODTP_SMD_1.5mm
TP39#RECOVERYTP_SMD_1.5mm
supply (12 test points)
TP5Net-(U1-FB)TP_SMD_1.5mm
TP8Net-(U5-FB)TP_SMD_1.5mm
TP11Supply/5V_VINTP_SMD_1.5mm
TP12GNDTP_SMD_1.5mm
TP15Supply/5V_ENTP_SMD_1.5mm
TP16VINTP_SMD_1.5mm
TP17GNDTP_SMD_1.5mm
TP40PWR_GOODTP_SMD_1.5mm
TP415V0_SYSTP_SMD_1.5mm
TP425V0_SYSTP_SMD_1.5mm
TP44GNDTP_SMD_1.5mm
TP471V8_SYSTP_SMD_1.5mm
usb-debug (4 test points)
TP18USB/USBC_IDTP_SMD_1.5mm
TP19Net-(J11-SBU2)TP_SMD_1.5mm
TP21USB/USBC_ADDRTP_SMD_1.5mm
TP32USB/USBC_FAULTTP_SMD_1.5mm

14.5.2 All Test Points

Test PointNet NameSheetFootprint
TP1CSI/CAM_I2C_SDAcsiTP_SMD_1.5mm
TP2M2_ALERTdisplayTP_SMD_1.5mm
TP3Net-(J15B-(CSI1_CLK)RSVD)csiTP_SMD_1.5mm
TP4Net-(J15B-(CSI1_CLK)RSVD)csiTP_SMD_1.5mm
TP5Net-(U1-FB)supplyTP_SMD_1.5mm
TP6Net-(J15B-CAM1_PWDN)csiTP_SMD_1.5mm
TP7Net-(J8-SMB_DATA)interfacesTP_SMD_1.5mm
TP8Net-(U5-FB)supplyTP_SMD_1.5mm
TP9Net-(J15B-GPIO01)csiTP_SMD_1.5mm
TP10CSI/CAM_I2C_SCLcsiTP_SMD_1.5mm
TP11Supply/5V_VINsupplyTP_SMD_1.5mm
TP12GNDsupplyTP_SMD_1.5mm
TP13FAN_PWMsomTP_SMD_1.5mm
TP14FAN_TACHsomTP_SMD_1.5mm
TP15Supply/5V_ENsupplyTP_SMD_1.5mm
TP16VINsupplyTP_SMD_1.5mm
TP17GNDsupplyTP_SMD_1.5mm
TP18USB/USBC_IDusb-debugTP_SMD_1.5mm
TP19Net-(J11-SBU2)usb-debugTP_SMD_1.5mm
TP20Net-(J8-SMB_CLK)interfacesTP_SMD_1.5mm
TP21USB/USBC_ADDRusb-debugTP_SMD_1.5mm
TP23GEN0_SCLsomTP_SMD_1.5mm
TP24GEN0_SDAsomTP_SMD_1.5mm
TP25TMDS_HPDdisplayTP_SMD_1.5mm
TP26Display/TMDS_CECdisplayTP_SMD_1.5mm
TP27PWR_ENsomTP_SMD_1.5mm
TP28#SHUTDOWN_REQsomTP_SMD_1.5mm
TP29#RESETsomTP_SMD_1.5mm
TP31#PWR_BUTTONsomTP_SMD_1.5mm
TP32USB/USBC_FAULTusb-debugTP_SMD_1.5mm
TP33Display/TMDS_SCLdisplayTP_SMD_1.5mm
TP34Display/TMDS_SDAdisplayTP_SMD_1.5mm
TP35USR_LEDdisplayTP_SMD_1.5mm
TP36USR_BUTTONdisplayTP_SMD_1.5mm
TP37#RESETsomTP_SMD_1.5mm
TP38VDD_MODsomTP_SMD_1.5mm
TP39#RECOVERYsomTP_SMD_1.5mm
TP40PWR_GOODsupplyTP_SMD_1.5mm
TP415V0_SYSsupplyTP_SMD_1.5mm
TP425V0_SYSsupplyTP_SMD_1.5mm
TP44GNDsupplyTP_SMD_1.5mm
TP471V8_SYSsupplyTP_SMD_1.5mm

14.6 Powered-off Testing

39 nets with test points: 61 pins with opens coverage, 4 pins with partial opens, 467 pins with shorts coverage.

Open pin faults may be masked when two or more IC pins share a net (current flow through one internal pin ESD diode may mask the open on another).
Powered-off Test Coverage by Net
Pin ⇅Net ⇅Type ⇅Opens ⇅Shorts ⇅
J15_240#PWR_BUTTONConnector-●
J15_214#RECOVERYConnector-●
REC1_2#RECOVERYPassive●●
J15_239#RESETConnector-●
RST1_2#RESETPassive●●
R39_1#RESETPassive-●
R44_1#RESETPassive-●
R52_1#RESETPassive-●
R92_1#RESETPassive-●
R139_1#RESETPassive●●
T2_1#RESETTransistor-●
IC12_4#SHUTDOWN_REQIC●●
J15_233#SHUTDOWN_REQConnector-●
R86_2#SHUTDOWN_REQPassive●●
C5_11V8_SYSCapacitor-●
C65_11V8_SYSCapacitor-●
C86_11V8_SYSCapacitor-●
IC4_51V8_SYSIC◐●
IC11_51V8_SYSIC◐●
R23_11V8_SYSPassive-●
R79_11V8_SYSPassive-●
R88_11V8_SYSPassive●●
R95_11V8_SYSPassive●●
R112_11V8_SYSPassive●●
R114_11V8_SYSPassive●●
R133_11V8_SYSPassive-●
T3_11V8_SYSTransistor-●
U3_11V8_SYSIC◐●
U3_51V8_SYSIC◐●
C16_15V0_SYSCapacitor-●
C18_15V0_SYSCapacitor-●
C32_15V0_SYSCapacitor-●
C34_15V0_SYSCapacitor-●
C59_15V0_SYSCapacitor-●
C60_15V0_SYSCapacitor-●
C64_15V0_SYSCapacitor-●
C71_15V0_SYSCapacitor-●
C81_15V0_SYSCapacitor-●
C82_25V0_SYSCapacitor-●
C83_15V0_SYSCapacitor-●
C88_15V0_SYSCapacitor-●
C90_15V0_SYSCapacitor-●
D9_25V0_SYSPassive●●
D17_25V0_SYSPassive-●
FB2_15V0_SYSPassive●●
IC1_15V0_SYSIC-●
IC2_135V0_SYSIC-●
IC2_155V0_SYSIC-●
IC3_15V0_SYSIC-●
IC4_15V0_SYSIC-●
IC7_305V0_SYSIC-●
IC12_145V0_SYSIC-●
IC13_15V0_SYSIC-●
IC13_55V0_SYSIC-●
J6_495V0_SYSConnector-●
J6_505V0_SYSConnector-●
J7_15V0_SYSConnector-●
J7_25V0_SYSConnector-●
J12_25V0_SYSConnector-●
L4_25V0_SYSPassive-●
L9_15V0_SYSPassive-●
R14_15V0_SYSPassive-●
R16_15V0_SYSPassive-●
R36_15V0_SYSPassive-●
R42_15V0_SYSPassive-●
R43_15V0_SYSPassive-●
R46_15V0_SYSPassive-●
R47_15V0_SYSPassive●●
R54_15V0_SYSPassive-●
R55_15V0_SYSPassive-●
R67_15V0_SYSPassive-●
R84_15V0_SYSPassive-●
R86_15V0_SYSPassive●●
R93_25V0_SYSPassive-●
R97_15V0_SYSPassive-●
R102_15V0_SYSPassive-●
R111_15V0_SYSPassive-●
R117_15V0_SYSPassive-●
R126_15V0_SYSPassive●●
R134_15V0_SYSPassive-●
R135_15V0_SYSPassive-●
R136_15V0_SYSPassive-●
U1_15V0_SYSIC-●
U3_65V0_SYSIC-●
U5_15V0_SYSIC-●
U8_55V0_SYSIC-●
J15_213CSI/CAM_I2C_SCLConnector-●
R35_2CSI/CAM_I2C_SCLPassive-●
R60_1CSI/CAM_I2C_SCLPassive-●
J15_215CSI/CAM_I2C_SDAConnector-●
R34_2CSI/CAM_I2C_SDAPassive-●
R57_1CSI/CAM_I2C_SDAPassive-●
J15_94Display/TMDS_CECConnector-●
J15_100Display/TMDS_SCLConnector-●
R98_1Display/TMDS_SCLPassive-●
J15_98Display/TMDS_SDAConnector-●
R99_1Display/TMDS_SDAPassive-●
J15_230FAN_PWMConnector-●
U3_3FAN_PWMIC●●
J15_208FAN_TACHConnector-●
R95_2FAN_TACHPassive●●
T3_2FAN_TACHTransistor-●
IC17_1GEN0_SCLIC●●
J15_185GEN0_SCLConnector-●
R124_1GEN0_SCLPassive-●
IC17_3GEN0_SDAIC●●
J15_187GEN0_SDAConnector-●
R125_1GEN0_SDAPassive-●
BAT1_2GNDPassive-●
C1_2GNDCapacitor-●
C2_2GNDCapacitor-●
C3_2GNDCapacitor-●
C4_2GNDCapacitor-●
C5_2GNDCapacitor-●
C9_2GNDCapacitor-●
C10_2GNDCapacitor-●
C11_2GNDCapacitor-●
C13_2GNDCapacitor-●
C14_2GNDCapacitor-●
C15_2GNDCapacitor-●
C16_2GNDCapacitor-●
C17_2GNDCapacitor-●
C18_2GNDCapacitor-●
C19_2GNDCapacitor-●
C20_2GNDCapacitor-●
C21_2GNDCapacitor-●
C22_2GNDCapacitor-●
C23_2GNDCapacitor-●
C25_2GNDCapacitor-●
C26_2GNDCapacitor-●
C27_2GNDCapacitor-●
C28_2GNDCapacitor-●
C29_2GNDCapacitor-●
C30_2GNDCapacitor-●
C31_2GNDCapacitor-●
C32_2GNDCapacitor-●
C33_2GNDCapacitor-●
C34_2GNDCapacitor-●
C35_2GNDCapacitor-●
C36_2GNDCapacitor-●
C41_2GNDCapacitor-●
C46_2GNDCapacitor-●
C47_2GNDCapacitor-●
C55_2GNDCapacitor-●
C56_2GNDCapacitor-●
C58_2GNDCapacitor-●
C59_2GNDCapacitor-●
C60_2GNDCapacitor-●
C62_2GNDCapacitor-●
C63_2GNDCapacitor-●
C64_2GNDCapacitor-●
C65_2GNDCapacitor-●
C66_2GNDCapacitor-●
C67_2GNDCapacitor-●
C71_2GNDCapacitor-●
C72_2GNDCapacitor-●
C81_2GNDCapacitor-●
C83_2GNDCapacitor-●
C84_2GNDCapacitor-●
C85_2GNDCapacitor-●
C86_2GNDCapacitor-●
C87_2GNDCapacitor-●
C88_2GNDCapacitor-●
C90_2GNDCapacitor-●
D1_1GNDPassive-●
D3_3GNDPassive-●
D5_3GNDPassive-●
D6_3GNDPassive-●
D6_8GNDPassive-●
D7_3GNDPassive-●
D7_8GNDPassive-●
D8_3GNDPassive-●
D8_8GNDPassive-●
D9_1GNDPassive●●
D10_3GNDPassive-●
D11_3GNDPassive-●
D12_3GNDPassive-●
D14_2GNDPassive●●
IC1_2GNDIC-●
IC2_2GNDIC-●
IC2_5GNDIC-●
IC2_8GNDIC-●
IC2_11GNDIC-●
IC3_2GNDIC-●
IC4_2GNDIC-●
IC5_4GNDIC-●
IC5_17GNDIC-●
IC5_20GNDIC-●
IC5_24GNDIC-●
IC5_26GNDIC-●
IC5_33GNDIC-●
IC6_4GNDIC-●
IC7_13GNDIC-●
IC7_28GNDIC-●
IC7_31GNDIC-●
IC11_1GNDIC-●
IC11_3GNDIC-●
IC12_7GNDIC-●
IC13_3GNDIC-●
IC15_2GNDIC-●
IC17_2GNDIC-●
IC18_2GNDIC-●
IC18_5GNDIC-●
IC18_8GNDIC-●
IC18_11GNDIC-●
J2_SHGNDConnector-●
J2_1GNDConnector-●
J2_7GNDConnector-●
J2_8GNDConnector-●
J2_13GNDConnector-●
J2_14GNDConnector-●
J2_19GNDConnector-●
J3_1GNDConnector-●
J4_2GNDConnector-●
J4_3GNDConnector-●
J5_5GNDConnector-●
J6_9GNDConnector-●
J6_12GNDConnector-●
J6_15GNDConnector-●
J6_18GNDConnector-●
J6_27GNDConnector-●
J6_30GNDConnector-●
J7_21GNDConnector-●
J7_24GNDConnector-●
J7_33GNDConnector-●
J7_36GNDConnector-●
J7_39GNDConnector-●
J7_42GNDConnector-●
J8_SH1GNDConnector-●
J8_SH2GNDConnector-●
J8_1GNDConnector-●
J8_3GNDConnector-●
J8_9GNDConnector-●
J8_15GNDConnector-●
J8_21GNDConnector-●
J8_27GNDConnector-●
J8_33GNDConnector-●
J8_39GNDConnector-●
J8_45GNDConnector-●
J8_51GNDConnector-●
J8_57GNDConnector-●
J8_71GNDConnector-●
J8_73GNDConnector-●
J8_75GNDConnector-●
J9_SHGNDConnector-●
J9_5GNDConnector-●
J10_10GNDConnector-●
J11_A1GNDConnector-●
J11_A12GNDConnector-●
J11_B1GNDConnector-●
J11_B12GNDConnector-●
J11_SHGNDConnector-●
J12_1GNDConnector-●
J13_MPGNDConnector-●
J13_4GNDConnector-●
J14_MPGNDConnector-●
J14_1GNDConnector-●
J15_1GNDConnector-●
J15_2GNDConnector-●
J15_7GNDConnector-●
J15_8GNDConnector-●
J15_13GNDConnector-●
J15_14GNDConnector-●
J15_19GNDConnector-●
J15_20GNDConnector-●
J15_25GNDConnector-●
J15_26GNDConnector-●
J15_31GNDConnector-●
J15_32GNDConnector-●
J15_37GNDConnector-●
J15_38GNDConnector-●
J15_43GNDConnector-●
J15_44GNDConnector-●
J15_49GNDConnector-●
J15_50GNDConnector-●
J15_55GNDConnector-●
J15_56GNDConnector-●
J15_61GNDConnector-●
J15_62GNDConnector-●
J15_67GNDConnector-●
J15_68GNDConnector-●
J15_73GNDConnector-●
J15_74GNDConnector-●
J15_79GNDConnector-●
J15_80GNDConnector-●
J15_85GNDConnector-●
J15_86GNDConnector-●
J15_102GNDConnector-●
J15_107GNDConnector-●
J15_113GNDConnector-●
J15_119GNDConnector-●
J15_125GNDConnector-●
J15_129GNDConnector-●
J15_132GNDConnector-●
J15_135GNDConnector-●
J15_138GNDConnector-●
J15_141GNDConnector-●
J15_144GNDConnector-●
J15_146GNDConnector-●
J15_147GNDConnector-●
J15_152GNDConnector-●
J15_153GNDConnector-●
J15_158GNDConnector-●
J15_159GNDConnector-●
J15_164GNDConnector-●
J15_165GNDConnector-●
J15_170GNDConnector-●
J15_171GNDConnector-●
J15_176GNDConnector-●
J15_177GNDConnector-●
J15_200GNDConnector-●
J15_201GNDConnector-●
J15_217GNDConnector-●
J15_231GNDConnector-●
J15_241GNDConnector-●
J15_242GNDConnector-●
J15_243GNDConnector-●
J15_244GNDConnector-●
J15_245GNDConnector-●
J15_246GNDConnector-●
J15_247GNDConnector-●
J15_248GNDConnector-●
J15_249GNDConnector-●
J15_250GNDConnector-●
J15_261GNDConnector-●
J15_262GNDConnector-●
L7_2GNDPassive-●
L8_1GNDPassive-●
REC1_SHGNDPassive●●
REC1_1GNDPassive●●
REC1_3GNDPassive●●
RST1_SHGNDPassive●●
RST1_1GNDPassive●●
RST1_3GNDPassive●●
R12_2GNDPassive-●
R30_2GNDPassive-●
R31_2GNDPassive-●
R32_2GNDPassive-●
R37_2GNDPassive-●
R50_2GNDPassive-●
R56_1GNDPassive-●
R62_1GNDPassive-●
R69_2GNDPassive-●
R73_2GNDPassive-●
R74_2GNDPassive-●
R77_2GNDPassive-●
R83_2GNDPassive-●
R90_2GNDPassive-●
R100_2GNDPassive-●
R113_1GNDPassive●●
R119_2GNDPassive-●
R120_2GNDPassive-●
R121_2GNDPassive-●
R127_2GNDPassive●●
R131_2GNDPassive-●
R137_2GNDPassive-●
R138_2GNDPassive-●
R139_2GNDPassive●●
SP1_1GNDPassive●●
SP2_1GNDPassive●●
SP3_1GNDPassive●●
SP5_1GNDPassive●●
SP6_1GNDPassive●●
SP7_1GNDPassive●●
T1_2GNDTransistor-●
T2_2GNDTransistor-●
T4_2GNDTransistor-●
T5_2GNDTransistor-●
T6_2GNDTransistor-●
T7_2GNDTransistor-●
T8_2GNDTransistor-●
USR1_SHGNDPassive●●
USR1_1GNDPassive●●
USR1_3GNDPassive●●
U1_2GNDIC-●
U2_3GNDIC-●
U2_6GNDIC-●
U2_9GNDIC-●
U2_11GNDIC-●
U3_2GNDIC-●
U4_9GNDIC-●
U4_18GNDIC-●
U4_22GNDIC-●
U4_23GNDIC-●
U4_25GNDIC-●
U5_2GNDIC-●
U6_9GNDIC-●
U6_10GNDIC-●
U6_11GNDIC-●
U6_17GNDIC-●
U6_23GNDIC-●
U6_28GNDIC-●
U7_2GNDIC-●
U8_3GNDIC-●
D15_1ID Serial/EEPROM_PWRPassive-●
IC17_4ID Serial/EEPROM_PWRIC●●
J8_44M2_ALERTConnector-●
J15_212M2_ALERTConnector-●
R114_2M2_ALERTPassive●●
J11_B8Net-(J11-SBU2)Connector-●
J15_9Net-(J15B-(CSI1_CLK)RSVD)Connector-●
J15_11Net-(J15B-(CSI1_CLK)RSVD)Connector-●
J15_120Net-(J15B-CAM1_PWDN)Connector-●
J15_118Net-(J15B-GPIO01)Connector-●
J8_40Net-(J8-SMB_CLK)Connector-●
J8_42Net-(J8-SMB_DATA)Connector-●
R132_1Net-(R132-Pad1)Passive-●
C23_1Net-(U1-FB)Capacitor-●
F1_1Net-(U1-FB)Passive-●
L5_2Net-(U1-FB)Passive-●
U1_4Net-(U1-FB)IC●●
C55_1Net-(U5-FB)Capacitor-●
F2_1Net-(U5-FB)Passive-●
L6_2Net-(U5-FB)Passive-●
U5_4Net-(U5-FB)IC●●
IC13_4PWR_ENIC●●
J15_237PWR_ENConnector-●
R130_1PWR_ENPassive-●
R87_1PWR_GOODPassive-●
R96_1PWR_GOODPassive-●
T4_1PWR_GOODTransistor-●
U6_2PWR_GOODIC●●
R91_1Supply/5V_ENPassive●●
U6_3Supply/5V_ENIC●●
C17_1Supply/5V_VINCapacitor-●
C22_1Supply/5V_VINCapacitor-●
C56_1Supply/5V_VINCapacitor-●
FB1_2Supply/5V_VINPassive●●
R91_2Supply/5V_VINPassive●●
U6_1Supply/5V_VINIC-●
U6_7Supply/5V_VINIC-●
U6_8Supply/5V_VINIC-●
J15_96TMDS_HPDConnector-●
R88_2TMDS_HPDPassive●●
T1_3TMDS_HPDTransistor-●
IC7_22USB/USBC_ADDRIC●●
R126_2USB/USBC_ADDRPassive●●
R127_1USB/USBC_ADDRPassive●●
IC7_24USB/USBC_FAULTIC●●
IC7_27USB/USBC_IDIC●●
R47_2USB/USBC_IDPassive●●
R49_1USB/USBC_IDPassive-●
R68_2USB/USBC_IDPassive-●
T7_1USB/USBC_IDTransistor-●
J15_218USR_BUTTONConnector-●
R112_2USR_BUTTONPassive●●
USR1_2USR_BUTTONPassive●●
J15_206USR_LEDConnector-●
R113_2USR_LEDPassive●●
T5_1USR_LEDTransistor-●
C10_1VDD_MODCapacitor-●
C11_1VDD_MODCapacitor-●
FB2_2VDD_MODPassive●●
J15_251VDD_MODConnector-●
J15_252VDD_MODConnector-●
J15_253VDD_MODConnector-●
J15_254VDD_MODConnector-●
J15_255VDD_MODConnector-●
J15_256VDD_MODConnector-●
J15_257VDD_MODConnector-●
J15_258VDD_MODConnector-●
J15_259VDD_MODConnector-●
J15_260VDD_MODConnector-●
D14_1VINPassive●●
FB1_1VINPassive●●
FB3_1VINPassive-●
F3_2VINPassive-●

14.7 Powered-on Testing

Power rail voltage verification via test points. Measuring the output voltage under load verifies the path from regulator output through series passives to the rail.

5 power rail nets with test points: 108 source-path pins (opens + shorts), 269 sink pins (shorts only).

Powered-on Test Coverage by Power Rail
Pin ⇅Net ⇅Role ⇅Opens ⇅Shorts ⇅
C16_15V0_SYSSink-●
C18_15V0_SYSSink-●
C32_15V0_SYSSink-●
C34_15V0_SYSSink-●
C59_15V0_SYSSink-●
C60_15V0_SYSSink-●
C64_15V0_SYSSink-●
C71_15V0_SYSSink-●
C81_15V0_SYSSink-●
C82_25V0_SYSSink-●
C83_15V0_SYSSink-●
C88_15V0_SYSSink-●
C90_15V0_SYSSink-●
D9_25V0_SYSSink-●
D17_25V0_SYSSink-●
FB2_15V0_SYSSink-●
IC1_15V0_SYSSeries path●●
IC2_135V0_SYSSink-●
IC2_155V0_SYSSink-●
IC3_15V0_SYSSeries path●●
IC4_15V0_SYSSink-●
IC7_305V0_SYSSeries path●●
IC12_145V0_SYSSeries path●●
IC13_15V0_SYSSeries path●●
IC13_55V0_SYSSeries path●●
J6_495V0_SYSSink-●
J6_505V0_SYSSink-●
J7_15V0_SYSSink-●
J7_25V0_SYSSink-●
J12_25V0_SYSSink-●
L4_25V0_SYSSink-●
L9_15V0_SYSSeries (IC6 → L9)●●
R14_15V0_SYSSink-●
R16_15V0_SYSSeries (IC12 → R16)●●
R36_15V0_SYSSeries (IC13 → R36)●●
R42_15V0_SYSSeries (IC3 → R42)●●
R43_15V0_SYSSeries (IC3 → R43)●●
R46_15V0_SYSSink-●
R47_15V0_SYSSeries (IC7 → R47)●●
R54_15V0_SYSSeries (IC7 → R54)●●
R55_15V0_SYSSeries (IC7 → R55)●●
R67_15V0_SYSSeries (IC7 → R67)●●
R84_15V0_SYSSeries (IC12 → R84)●●
R86_15V0_SYSSeries (IC12 → R86)●●
R93_25V0_SYSSeries (U6 → R93)●●
R97_15V0_SYSSink-●
R102_15V0_SYSSeries (IC7 → R102)●●
R111_15V0_SYSSink-●
R117_15V0_SYSSeries (U6 → R117)●●
R126_15V0_SYSSeries (IC7 → R126)●●
R134_15V0_SYSSeries (U8 → R134)●●
R135_15V0_SYSSink-●
R136_15V0_SYSSeries (IC1 → R136)●●
TP41_15V0_SYSSink-●
TP42_15V0_SYSSink-●
U1_15V0_SYSSink-●
U3_65V0_SYSSink-●
U5_15V0_SYSSink-●
U8_55V0_SYSSeries path●●
BAT1_2GNDSink-●
C1_2GNDSink-●
C2_2GNDSink-●
C3_2GNDSink-●
C4_2GNDSink-●
C5_2GNDSeries (U3 → C5)●●
C9_2GNDSeries (U7 → C9)●●
C10_2GNDSink-●
C11_2GNDSink-●
C13_2GNDSeries (U7 → C13)●●
C14_2GNDSink-●
C15_2GNDSeries (IC5 → C15)●●
C16_2GNDSink-●
C17_2GNDSink-●
C18_2GNDSink-●
C19_2GNDSeries (U2 → C19)●●
C20_2GNDSeries (U7 → C20)●●
C21_2GNDSeries (U2 → C21)●●
C22_2GNDSink-●
C23_2GNDSeries (U1 → C23)●●
C25_2GNDSeries (U7 → C25)●●
C26_2GNDSeries (U7 → C26)●●
C27_2GNDSeries (IC6 → C27)●●
C28_2GNDSink-●
C29_2GNDSeries (IC5 → C29)●●
C30_2GNDSeries (IC5 → C30)●●
C31_2GNDSeries (IC3 → C31)●●
C32_2GNDSink-●
C33_2GNDSeries (U7 → C33)●●
C34_2GNDSink-●
C35_2GNDSink-●
C36_2GNDSeries (U7 → C36)●●
C41_2GNDSeries (IC12 → C41)●●
C46_2GNDSeries (U7 → C46)●●
C47_2GNDSeries (U7 → C47)●●
C55_2GNDSeries (U5 → C55)●●
C56_2GNDSink-●
C58_2GNDSink-●
C59_2GNDSink-●
C60_2GNDSink-●
C62_2GNDSink-●
C63_2GNDSeries (U6 → C63)●●
C64_2GNDSink-●
C65_2GNDSeries (U3 → C65)●●
C66_2GNDSeries (IC5 → C66)●●
C67_2GNDSink-●
C71_2GNDSink-●
C72_2GNDSink-●
C81_2GNDSink-●
C83_2GNDSink-●
C84_2GNDSink-●
C85_2GNDSeries (U6 → C85)●●
C86_2GNDSeries (U3 → C86)●●
C87_2GNDSink-●
C88_2GNDSink-●
C90_2GNDSink-●
D1_1GNDSink-●
D3_3GNDSink-●
D5_3GNDSink-●
D6_3GNDSink-●
D6_8GNDSink-●
D7_3GNDSink-●
D7_8GNDSink-●
D8_3GNDSink-●
D8_8GNDSink-●
D9_1GNDSink-●
D10_3GNDSink-●
D11_3GNDSink-●
D12_3GNDSink-●
D14_2GNDSink-●
IC1_2GNDSeries path●●
IC2_2GNDSink-●
IC2_5GNDSink-●
IC2_8GNDSink-●
IC2_11GNDSink-●
IC3_2GNDSeries path●●
IC4_2GNDSeries path●●
IC5_4GNDSeries path●●
IC5_17GNDSeries path●●
IC5_20GNDSeries path●●
IC5_24GNDSeries path●●
IC5_26GNDSeries path●●
IC5_33GNDSeries path●●
IC6_4GNDSeries path●●
IC7_13GNDSeries path●●
IC7_28GNDSeries path●●
IC7_31GNDSeries path●●
IC11_1GNDSeries path●●
IC11_3GNDSeries path●●
IC12_7GNDSeries path●●
IC13_3GNDSeries path●●
IC15_2GNDSeries path●●
IC17_2GNDSink-●
IC18_2GNDSeries path●●
IC18_5GNDSeries path●●
IC18_8GNDSeries path●●
IC18_11GNDSeries path●●
J2_SHGNDSink-●
J2_1GNDSink-●
J2_7GNDSink-●
J2_8GNDSink-●
J2_13GNDSink-●
J2_14GNDSink-●
J2_19GNDSink-●
J3_1GNDSink-●
J4_2GNDSink-●
J4_3GNDSink-●
J5_5GNDSink-●
J6_9GNDSink-●
J6_12GNDSink-●
J6_15GNDSink-●
J6_18GNDSink-●
J6_27GNDSink-●
J6_30GNDSink-●
J7_21GNDSink-●
J7_24GNDSink-●
J7_33GNDSink-●
J7_36GNDSink-●
J7_39GNDSink-●
J7_42GNDSink-●
J8_SH1GNDSink-●
J8_SH2GNDSink-●
J8_1GNDSink-●
J8_3GNDSink-●
J8_9GNDSink-●
J8_15GNDSink-●
J8_21GNDSink-●
J8_27GNDSink-●
J8_33GNDSink-●
J8_39GNDSink-●
J8_45GNDSink-●
J8_51GNDSink-●
J8_57GNDSink-●
J8_71GNDSink-●
J8_73GNDSink-●
J8_75GNDSink-●
J9_SHGNDSink-●
J9_5GNDSink-●
J10_10GNDSink-●
J11_A1GNDSink-●
J11_A12GNDSink-●
J11_B1GNDSink-●
J11_B12GNDSink-●
J11_SHGNDSink-●
J12_1GNDSink-●
J13_MPGNDSink-●
J13_4GNDSink-●
J14_MPGNDSink-●
J14_1GNDSink-●
J15_1GNDSink-●
J15_2GNDSink-●
J15_7GNDSink-●
J15_8GNDSink-●
J15_13GNDSink-●
J15_14GNDSink-●
J15_19GNDSink-●
J15_20GNDSink-●
J15_25GNDSink-●
J15_26GNDSink-●
J15_31GNDSink-●
J15_32GNDSink-●
J15_37GNDSink-●
J15_38GNDSink-●
J15_43GNDSink-●
J15_44GNDSink-●
J15_49GNDSink-●
J15_50GNDSink-●
J15_55GNDSink-●
J15_56GNDSink-●
J15_61GNDSink-●
J15_62GNDSink-●
J15_67GNDSink-●
J15_68GNDSink-●
J15_73GNDSink-●
J15_74GNDSink-●
J15_79GNDSink-●
J15_80GNDSink-●
J15_85GNDSink-●
J15_86GNDSink-●
J15_102GNDSink-●
J15_107GNDSink-●
J15_113GNDSink-●
J15_119GNDSink-●
J15_125GNDSink-●
J15_129GNDSink-●
J15_132GNDSink-●
J15_135GNDSink-●
J15_138GNDSink-●
J15_141GNDSink-●
J15_144GNDSink-●
J15_146GNDSink-●
J15_147GNDSink-●
J15_152GNDSink-●
J15_153GNDSink-●
J15_158GNDSink-●
J15_159GNDSink-●
J15_164GNDSink-●
J15_165GNDSink-●
J15_170GNDSink-●
J15_171GNDSink-●
J15_176GNDSink-●
J15_177GNDSink-●
J15_200GNDSink-●
J15_201GNDSink-●
J15_217GNDSink-●
J15_231GNDSink-●
J15_241GNDSink-●
J15_242GNDSink-●
J15_243GNDSink-●
J15_244GNDSink-●
J15_245GNDSink-●
J15_246GNDSink-●
J15_247GNDSink-●
J15_248GNDSink-●
J15_249GNDSink-●
J15_250GNDSink-●
J15_261GNDSink-●
J15_262GNDSink-●
L7_2GNDSink-●
L8_1GNDSink-●
REC1_SHGNDSink-●
REC1_1GNDSink-●
REC1_3GNDSink-●
RST1_SHGNDSink-●
RST1_1GNDSink-●
RST1_3GNDSink-●
R12_2GNDSink-●
R30_2GNDSink-●
R31_2GNDSink-●
R32_2GNDSink-●
R37_2GNDSink-●
R50_2GNDSeries (IC1 → R50)●●
R56_1GNDSeries (IC7 → R56)●●
R62_1GNDSeries (IC7 → R62)●●
R69_2GNDSink-●
R73_2GNDSink-●
R74_2GNDSeries (U6 → R74)●●
R77_2GNDSink-●
R83_2GNDSink-●
R90_2GNDSink-●
R100_2GNDSeries (IC11 → R100)●●
R113_1GNDSink-●
R119_2GNDSeries (U2 → R119)●●
R120_2GNDSeries (U6 → R120)●●
R121_2GNDSeries (U7 → R121)●●
R127_2GNDSeries (IC7 → R127)●●
R131_2GNDSink-●
R137_2GNDSeries (IC7 → R137)●●
R138_2GNDSeries (IC3 → R138)●●
R139_2GNDSeries (IC4 → R139)●●
SP1_1GNDSink-●
SP2_1GNDSink-●
SP3_1GNDSink-●
SP5_1GNDSink-●
SP6_1GNDSink-●
SP7_1GNDSink-●
TP12_1GNDSink-●
TP17_1GNDSink-●
TP30_5GNDSink-●
TP44_1GNDSink-●
T1_2GNDSink-●
T2_2GNDSink-●
T4_2GNDSink-●
T5_2GNDSink-●
T6_2GNDSink-●
T7_2GNDSink-●
T8_2GNDSink-●
USR1_SHGNDSink-●
USR1_1GNDSink-●
USR1_3GNDSink-●
U1_2GNDSeries path●●
U2_3GNDSeries path●●
U2_6GNDSeries path●●
U2_9GNDSeries path●●
U2_11GNDSeries path●●
U3_2GNDSeries path●●
U4_9GNDSeries path●●
U4_18GNDSeries path●●
U4_22GNDSeries path●●
U4_23GNDSeries path●●
U4_25GNDSeries path●●
U5_2GNDSeries path●●
U6_9GNDSeries path●●
U6_10GNDSeries path●●
U6_11GNDSeries path●●
U6_17GNDSeries path●●
U6_23GNDSeries path●●
U6_28GNDSeries path●●
U7_2GNDSeries path●●
U8_3GNDSeries path●●
C17_1Supply/5V_VINSink-●
C22_1Supply/5V_VINSink-●
C56_1Supply/5V_VINSink-●
FB1_2Supply/5V_VINSink-●
R91_2Supply/5V_VINSeries (U6 → R91)●●
TP11_1Supply/5V_VINSink-●
U6_1Supply/5V_VINSeries path●●
U6_7Supply/5V_VINSeries path●●
U6_8Supply/5V_VINSeries path●●
C10_1VDD_MODSink-●
C11_1VDD_MODSink-●
FB2_2VDD_MODSink-●
J15_251VDD_MODSink-●
J15_252VDD_MODSink-●
J15_253VDD_MODSink-●
J15_254VDD_MODSink-●
J15_255VDD_MODSink-●
J15_256VDD_MODSink-●
J15_257VDD_MODSink-●
J15_258VDD_MODSink-●
J15_259VDD_MODSink-●
J15_260VDD_MODSink-●
TP38_1VDD_MODSink-●
D14_1VINSink-●
FB1_1VINSink-●
FB3_1VINSeries (U2 → FB3)●●
F3_2VINSink-●
TP16_1VINSink-●

14.8 Boundary Scan Testability

No boundary scan capable devices were found in this design.

14.9 Inspection

Total: 303 components, 1339 of 1368 pins with inspection coverage.

14.9.1 AOI

Assumed Classification (Non-IPC Footprints)
Footprint names are not IPC-7351B or IPC-7251. Package type inferred from Pkg Type property or designator prefix. Classification may be incorrect.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
Opens + Shorts (all joints visible)
antmicro-footprints
SC70-3SOT (Small Outline Transistor)Footprint824T1, T2, T3, T4, T5, T6, T8, T9
SOT-23-3SOT (Small Outline Transistor)Footprint515D10, D11, D12, D3, D5
SOT-23-5SOT (Small Outline Transistor)Footprint630IC11, IC15, IC17, IC4, U1, U5
SOT-23-6SOT (Small Outline Transistor)Footprint318IC1, IC3, U3
SOT-23-8SOT (Small Outline Transistor)Footprint18U7
C_0402_1005MetricChip PassiveDesignator67134C1, C12, C13, C14, C15, C16, C18, C2 ...+59 more
C_0603_1608MetricChip PassiveDesignator714C23, C35, C47, C55, C63, C81, C85
C_0805_2012MetricChip PassiveDesignator510C20, C25, C34, C59, C64
C_1206_3216MetricChip PassiveDesignator510C17, C19, C21, C22, C31
C_Pol_EIA-BChip PassiveDesignator24C10, C11
FB_0603_1608MetricChip PassiveDesignator714L10, L11, L2, L3, L7, L8, L9
FB_0805_2012MetricChip PassiveDesignator12FB3
FB_1206_3216MetricChip PassiveDesignator24FB1, FB2
F_0603_1608MetricChip PassiveDesignator48F1, F2, F4, F5
F_1206_3216MetricChip PassiveDesignator12F3
LED_0603_1608Metric_GChip PassiveDesignator612BOOT1, LED1, LED2, NVME1, PWR1, USER1
L_1210_3225MetricChip PassiveDesignator24L5, L6
L_Coilcraft-XFL4020Chip PassiveDesignator12L1
L_Vishay-IHLP3232DZChip PassiveDesignator12L4
R_0402_1005MetricChip PassiveDesignator115230R1, R10, R100, R101, R102, R103, R104, R105 ...+107 more
D_SMBSOD (Diode Package)Designator12D14
D_SOD-323FSOD (Diode Package)Footprint510D13, D15, D17, D2, D4
SOD-523_NPSOD (Diode Package)Footprint24D1, D9
USON-10_2.5x1mm_P0.5mmSOD (Diode Package)Designator330D6, D7, D8
Subtotal: 260 components, 593 pins
Opens only (leads visible, shorts unreliable)
antmicro-footprints
R-PDSO-N15SOIC/SOPFootprint232IC18, IC2
SC-70-5SOIC/SOPDesignator15IC13
SIC47XED-T1-GE3SOIC/SOPDesignator128U6
SOT-753SOIC/SOPDesignator15U8
TSSOP-14_4.4x5mm_P0.65mmSOIC/SOPFootprint114IC12
TSSOP-8_3x3mm_P0.65mmSOIC/SOPFootprint18IC6
Subtotal: 7 components, 92 pins
Presence check (manual verification)
antmicro-footprints
BarrelJack_Pin2mm_MJ-179PHConnectorDesignator13J4
Bus_M.2_Socket_Key_M_Amphenol_MDT580M01001ConnectorDesignator169J8
Conn_FFC_Molex_5051101097ConnectorDesignator112J10
Conn_FFC_WE_68715014x22ConnectorDesignator2104J6, J7
Conn_JST_SH_1x4_SM04B-SRSS-TB-LF-SNConnectorDesignator210J13, J14
Conn_Molex_PicoBlade_1x4_0533980471ConnectorDesignator16J12
DisplayPort-Mini_Receptacle_TE_2129320-3ConnectorDesignator121J2
HDMI-Micro-D_Receptacle_Molex_467651001ConnectorDesignator120J1
RJ45_Bel_SI-51005-FConnectorDesignator115J3
TE_2309413ConnectorDesignator7262J15, J15, J15, J15, J15, J15, J15
USB-C_Receptacle_WE_632723300011ConnectorDesignator125J11
USB-Micro-B_Receptacle_Molex_473460001ConnectorDesignator212J5, J9
Subtotal: 21 components, 559 pins

14.9.2 AXI

Assumed Classification (Non-IPC Footprints)
Hidden-joint classification inferred from Pkg Type property or designator prefix. Footprint names are not IPC-7351B or IPC-7251.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
antmicro-footprints
QFN-32-1EP_5x5mmQFN/DFN (No-Lead)Footprint133IC5
VQFN-24-1EP_3.8x3.8x1.0mm_P0.5mmQFN/DFN (No-Lead)Footprint125U4
VQFN-HR-14_3.5x4mmQFN/DFN (No-Lead)Footprint114U2
WQFN-30-1EP_4.6x2.6mm_P0.4mmQFN/DFN (No-Lead)Footprint131IC7
Subtotal: 4 components, 103 pins

14.9.3 Unclassified Components

These components could not be classified for inspection. The library model lacks a Pkg Type property and the footprint name is not IPC-7351B or IPC-7251.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
antmicro-footprints
MS621FE-FL11EUnclassifiedUnknown12BAT1
SW_TL3340AF160QG_SMDUnclassifiedUnknown312REC1, RST1, USR1
Spacer_Drill3.7mm_H4mm_9774040151RUnclassifiedUnknown11SP7
Spacer_Drill3.7mm_H6mm_9774060151RUnclassifiedUnknown66SP1, SP2, SP3, SP4, SP5, SP6
Subtotal: 11 components, 21 pins

14.10 Pin Fault Coverage

Predicted status of each pin for shorts and opens based on DFx options selected in section 13.1.

14.10.1 Fault Coverage Summary

Fault Coverage Summary (1427 pins)
Test MethodOpensShorts
X-ray (AXI)0 (0.0%)0 (0.0%)
Optical (AOI)0 (0.0%)0 (0.0%)
Electrical
   Powered-off Testing177 (12.4%)467 (32.7%)
   Boundary Scan0 (0.0%)0 (0.0%)
   LSSI48 (3.4%)48 (3.4%)
   Total220 (15.4%)548 (38.4%)
Total Fault Coverage220 (15.4%)548 (38.4%)
No coverage1207 (84.6%)879 (61.6%)

14.10.2 Uncovered Pins (877)

These pins have no electrical, optical, or X-ray test coverage even with all available test techniques applied.
Pin ⇅Net ⇅
IC12_1Supply/\PWR_SET
IC12_10Net-(IC12-3B)
IC12_11Net-(IC12-3B)
IC12_12Supply/QDEL
IC12_13Supply/QDEL
IC12_2Net-(IC12-1B)
IC12_3Supply/Q
IC12_5Supply/Q
IC12_6Net-(IC12-1B)
IC12_8Net-(IC12-3Y)
IC12_9Net-(IC12-3B)
J4_1Net-(F3-Pad1)
IC13_2Supply/QDEL
R87_2Supply/QDEL
R92_2Net-(IC4-EN)
F1_23V3_FFC1
F2_23V3_FFC2
R74_1Supply/5V_MODE
C20_13V3_SYS
C57_1Net-(C57-Pad1)
R48_13V3_SYS
R48_2Supply/3V3_FB
C89_1Supply/3V3_SW
C89_2Supply/3V3_R_C_BOOT
R118_13V3_SYS
R118_2Supply/3V3_FB
U3_4Supply/FAN_PMW_5V
U1_3Net-(U1-EN)
U1_5Net-(U1-SW)
L5_1Net-(U1-SW)
R117_2Supply/5V_FB
R120_1Supply/5V_FB
R39_2Net-(U1-EN)
R46_2Supply/FAN_TACH_5V
R119_1Supply/3V3_FB
FB3_2Supply/3V3_VIN
J12_3Supply/FAN_TACH_5V
J12_4Supply/FAN_PMW_5V
J12_MP1
J12_MP2
U5_3Net-(U5-EN)
U5_5Net-(U5-SW)
L6_1Net-(U5-SW)
R52_2Net-(U5-EN)
D13_1Supply/Q
D13_2Supply/QDEL
T3_3Supply/FAN_TACH_5V
R36_2Supply/Q
R16_2Net-(IC12-1B)
IC4_3Net-(IC4-EN)
IC4_4
R84_2Supply/\PWR_SET
R44_2Supply/3V3_EN
C41_1Supply/\PWR_SET
R85_1Supply/Q
R85_2Supply/QDEL
C63_1Supply/QDEL
R130_2Net-(IC12-3Y)
L1_1Supply/3V3_SW
L1_23V3_SYS
R93_1Net-(U6-VSNS)
U2_13V3_SYS
U2_10Supply/3V3_SW
U2_12Supply/3V3_VIN
U2_13Net-(U2-RBOOT)
U2_14Supply/3V3_R_C_BOOT
U2_4Supply/3V3_FB
U2_5
U2_7Supply/3V3_EN
U2_8Supply/3V3_VIN
R45_1Net-(C24-Pad2)
R45_2Supply/3V3_FB
C24_13V3_SYS
C24_2Net-(C24-Pad2)
C25_13V3_SYS
C19_1Supply/3V3_VIN
C21_1Supply/3V3_VIN
C85_1Supply/VDRV_5V_DCDC
R89_1Net-(C57-Pad1)
R75_2Net-(C28-Pad1)
C61_1Net-(U6-VSNS)
C28_1Net-(C28-Pad1)
R70_1Net-(U2-RBOOT)
R70_2Supply/3V3_R_C_BOOT
U6_15
U6_16Supply/VDRV_5V_DCDC
U6_18
U6_20Net-(U6-VSNS)
U6_22Supply/5V_FB
U6_27Supply/5V_MODE
F3_1Net-(F3-Pad1)
D1_23V3_SYS
C31_1Net-(IC3-OUT)
IC5_11V8_DBG
IC5_10
IC5_11
IC5_12
IC5_13
IC5_14USB/DBG_USB_D_P
IC5_15USB/DBG_USB_D_N
IC5_16Net-(IC5-3V3OUT)
IC5_18
IC5_2Net-(IC5-RXD)
IC5_21
IC5_22
IC5_23
IC5_25
IC5_27
IC5_28
IC5_29
IC5_3
IC5_30Net-(IC5-TXD)
IC5_31
IC5_32
IC5_5
IC5_6
IC5_7
IC5_8
IC5_9
IC7_1USB/CC2
IC7_10USB/C_USBSS_RX6_N
IC7_11Net-(IC7-DIR)
IC7_12USB/EN_MUX
IC7_14USB/USBSS_RX1_N
IC7_15USB/USBSS_RX1_P
IC7_16USB/USBSS_TX1_N
IC7_17USB/USBSS_TX1_P
IC7_18USB/USBSS_RX2_N
IC7_19USB/USBSS_RX2_P
IC7_2USB/CC1
IC7_20USB/USBSS_TX2_N
IC7_21USB/USBSS_TX2_P
IC7_23USB/USBC_INTN
IC7_25USB/USBC_SDA
IC7_26USB/USBC_SCL
IC7_29Net-(IC7-ENn_CC)
IC7_3Net-(IC7-CURRENT_MODE)
IC7_4Net-(IC7-PORT)
IC7_5Net-(IC7-VBUS_DET)
IC7_6USB/C_USBSS_TX6_P
IC7_7USB/C_USBSS_TX6_N
IC7_83V3_SYS
IC7_9USB/C_USBSS_RX6_P
L7_1Net-(J5-SHIELD)
J5_2OTG_USB_D_N
J5_3OTG_USB_D_P
J5_4USB/OTG_USB_ID
J5_SHNet-(J5-SHIELD)
LED1_1Net-(IC3-FAULT)
LED1_2Net-(IC3-FAULT)
J11_A10USB/C_USBSS_RX2_N
J11_A11USB/C_USBSS_RX2_P
J11_A2USB/C_USBSS_TX1_P
J11_A3USB/C_USBSS_TX1_N
J11_A5USB/C_CC1
J11_A6USB1_D_P
J11_A7USB1_D_N
J11_A8
J11_B10USB/C_USBSS_RX1_N
J11_B11USB/C_USBSS_RX1_P
J11_B2USB/C_USBSS_TX2_P
J11_B3USB/C_USBSS_TX2_N
J11_B5USB/C_CC2
J11_B6USB1_D_P
J11_B7USB1_D_N
J9_2USB/DBG_USB_D_N
J9_3USB/DBG_USB_D_P
J9_4
T6_1Net-(T6-G)
T6_3Net-(T6-D)
T7_3Net-(IC3-EN)
D3_1USB/DBG_USB_D_N
D3_2USB/DBG_USB_D_P
IC15_4
IC15_51V8_DBG
L2_1Net-(IC3-OUT)
R103_1USBSS_TX6_P
R103_2USB/C_USBSS_TX6_P
R105_1USBSS_TX6_N
R105_2USB/C_USBSS_TX6_N
R107_1USBSS_RX6_P
R107_2USB/C_USBSS_RX6_P
R108_1USBSS_RX6_N
R108_2USB/C_USBSS_RX6_N
R56_2USB/EN_MUX
R62_2Net-(IC7-ENn_CC)
R55_2Net-(IC7-PORT)
R54_2Net-(IC7-CURRENT_MODE)
R68_1USB/EN_MUX
R51_1Net-(IC7-VBUS_DET)
R53_13V3_SYS
R53_2Net-(IC7-DIR)
C33_13V3_SYS
R104_1USB/USBSS_RX1_N
R104_2USB/C_USBSS_RX1_N
R106_1USB/USBSS_RX1_P
R106_2USB/C_USBSS_RX1_P
R109_1USB/USBSS_RX2_N
R109_2USB/C_USBSS_RX2_N
R110_1USB/USBSS_RX2_P
R110_2USB/C_USBSS_RX2_P
C48_1USB/USBSS_TX1_N
C48_2USB/C_USBSS_TX1_P
C50_1USB/USBSS_TX1_P
C50_2USB/C_USBSS_TX1_N
C53_1USB/USBSS_TX2_N
C53_2USB/C_USBSS_TX2_P
C54_1USB/USBSS_TX2_P
C54_2USB/C_USBSS_TX2_N
R67_2USB/USBC_INTN
R73_1Net-(T6-G)
R72_1Net-(T6-G)
R64_1USB/CC2
R64_2USB/C_CC1
R63_1USB/CC1
R63_2USB/C_CC1
R65_1USB/CC2
R65_2USB/C_CC2
R66_1USB/CC1
R66_2USB/C_CC2
C66_11V8_DBG
R20_2Net-(IC5-TXD)
R41_2Net-(IC5-RXD)
C15_1USB/DBG_USB_D_P
C29_1USB/DBG_USB_D_N
C30_1Net-(IC5-3V3OUT)
R42_2Net-(IC3-OUT)
R43_2Net-(IC3-FAULT)
D6_1USB/C_USBSS_RX1_N
D6_10USB/C_USBSS_RX1_N
D6_2USB/C_USBSS_RX1_P
D6_4USB/C_USBSS_TX1_P
D6_5USB/C_USBSS_TX1_N
D6_6USB/C_USBSS_TX1_N
D6_7USB/C_USBSS_TX1_P
D6_9USB/C_USBSS_RX1_P
D7_1USB/C_USBSS_TX2_N
D7_10USB/C_USBSS_TX2_N
D7_2USB/C_USBSS_TX2_P
D7_4USB/C_USBSS_RX2_P
D7_5USB/C_USBSS_RX2_N
D7_6USB/C_USBSS_RX2_N
D7_7USB/C_USBSS_RX2_P
D7_9USB/C_USBSS_TX2_P
LED2_1USB/OTG_USB_FAULT
LED2_2Net-(LED2-A)
R102_2Net-(IC3-EN)
D8_1OTG_USB_D_N
D8_10OTG_USB_D_N
D8_2OTG_USB_D_P
D8_4USB/OTG_USB_ID
D8_5Net-(D8-Pad5)
D8_6Net-(D8-Pad5)
D8_7USB/OTG_USB_ID
D8_9OTG_USB_D_P
R137_1Net-(IC3-EN)
L11_1Net-(IC1-OUT)
R129_1OTG_USB_VBUS_DET
R129_2Net-(T6-D)
R124_2USB/USBC_SDA
D5_1USB/C_CC2
D5_2USB/C_CC1
IC3_3Net-(IC3-EN)
IC3_4Net-(IC3-FAULT)
IC3_5Net-(IC3-ILIM)
IC3_6Net-(IC3-OUT)
R138_1Net-(IC3-ILIM)
R125_2USB/USBC_SCL
R133_2OTG_USB_ID_DET
R134_2USB/OTG_USB_ID
T9_1USB/OTG_USB_ID
T9_2Net-(T6-D)
T9_3OTG_USB_VBUS_DET
R49_2Net-(IC3-EN)
U8_1
U8_2USB/OTG_USB_ID
U8_4OTG_USB_ID_DET
IC1_3USB/OTG_USB_ID
IC1_4USB/OTG_USB_FAULT
IC1_5Net-(IC1-ILIM)
IC1_6Net-(IC1-OUT)
R136_2Net-(IC1-OUT)
R50_1Net-(IC1-ILIM)
R135_2Net-(LED2-A)
NVME1_1Net-(J8-LED)
NVME1_2Net-(NVME1-A)
J8_10Net-(J8-LED)
J8_11Interfaces/C_PCIE0_TX3_N
J8_123V3_SYS
J8_13Interfaces/C_PCIE0_TX3_P
J8_143V3_SYS
J8_163V3_SYS
J8_17PCIE0_RX2_N
J8_183V3_SYS
J8_19PCIE0_RX2_P
J8_23V3_SYS
J8_20
J8_22
J8_23Interfaces/C_PCIE0_TX2_N
J8_24
J8_25Interfaces/C_PCIE0_TX2_P
J8_26
J8_28
J8_29PCIE0_RX1_N
J8_30
J8_31PCIE0_RX1_P
J8_32
J8_34
J8_35Interfaces/C_PCIE0_TX1_N
J8_36
J8_37Interfaces/C_PCIE0_TX1_P
J8_38
J8_43V3_SYS
J8_41PCIE0_RX0_N
J8_43PCIE0_RX0_P
J8_46
J8_47Interfaces/C_PCIE0_TX0_N
J8_48
J8_49Interfaces/C_PCIE0_TX0_P
J8_5PCIE0_RX3_N
J8_50PEX_L0_RST_N
J8_52PEX_L0_CLKREQ_N
J8_53PCIE0_CLK_N
J8_54\PEWAKE_3V3
J8_55PCIE0_CLK_P
J8_56
J8_58
J8_6
J8_67
J8_68
J8_69
J8_7PCIE0_RX3_P
J8_703V3_SYS
J8_723V3_SYS
J8_743V3_SYS
J8_8
J3_10ENET_TRD3_N
J3_11ENET_LED1
J3_12Net-(J3-Pad12)
J3_13ENET_LED0
J3_14Net-(J3-Pad14)
J3_2ENET_TRD0_P
J3_3ENET_TRD0_N
J3_4ENET_TRD1_P
J3_5ENET_TRD1_N
J3_6
J3_7ENET_TRD2_P
J3_8ENET_TRD2_N
J3_9ENET_TRD3_P
J3_SEGND
R115_13V3_SYS
R115_2PEX_L0_CLKREQ_N
R116_13V3_SYS
R116_2PEX_L0_RST_N
R128_13V3_SYS
R128_2Net-(NVME1-A)
C47_13V3_SYS
C46_13V3_SYS
R38_13V3_SYS
R38_2Net-(J3-Pad12)
R40_13V3_SYS
R40_2Net-(J3-Pad14)
C14_1EGND
C37_1Interfaces/C_PCIE0_TX0_P
C37_2PCIE0_TX0_P
C49_1Interfaces/C_PCIE0_TX1_P
C49_2PCIE0_TX1_P
C52_1Interfaces/C_PCIE0_TX2_P
C52_2PCIE0_TX2_P
C69_1Interfaces/C_PCIE0_TX3_P
C69_2PCIE0_TX3_P
C38_1Interfaces/C_PCIE0_TX0_N
C38_2PCIE0_TX0_N
C51_1Interfaces/C_PCIE0_TX1_N
C51_2PCIE0_TX1_N
C68_1Interfaces/C_PCIE0_TX2_N
C68_2PCIE0_TX2_N
C70_1Interfaces/C_PCIE0_TX3_N
C70_2PCIE0_TX3_N
J14_2Net-(F5-Pad2)
J13_1Net-(F4-Pad2)
J13_2Interfaces/CANH
J13_3Interfaces/CANL
R123_1Interfaces/CANH
R123_2Interfaces/CANL
R71_1CAN_TXD
R71_2Net-(U7-TXD)
R121_1Net-(U7-RH)
F4_13V3_SYS
F4_2Net-(F4-Pad2)
U7_1Net-(U7-TXD)
U7_33V3_SYS
U7_4Net-(U7-RXD)
U7_5
U7_6Interfaces/CANL
U7_7Interfaces/CANH
U7_8Net-(U7-RH)
F5_13V3_SYS
F5_2Net-(F5-Pad2)
R101_1CAN_RXD
R101_2Net-(U7-RXD)
C13_13V3_SYS
IC6_13V3_SYS
IC6_2Net-(IC6-SCLA)
IC6_3Net-(IC6-SDAA)
IC6_5HDMI_PWR
IC6_6Display/TMDS_SDA_5V0
IC6_7Display/TMDS_SCL_5V0
IC6_8HDMI_PWR
J15_210
J15_39Display/EDP0_TX_N
J15_41Display/EDP0_TX_P
J15_45Display/EDP1_TX_N
J15_47Display/EDP1_TX_P
J15_51Display/EDP2_TX_N
J15_53Display/EDP2_TX_P
J15_57Display/EDP3_TX_N
J15_59Display/EDP3_TX_P
J15_63Display/TMDS_D2_N
J15_65Display/TMDS_D2_P
J15_69Display/TMDS_D1_N
J15_71Display/TMDS_D1_P
J15_75Display/TMDS_D0_N
J15_77Display/TMDS_D0_P
J15_81Display/TMDS_CLK_N
J15_83Display/TMDS_CLK_P
J15_87OTG_USB_VBUS_DET
J15_88Display/DP_HPD
J15_90Display/EDP_AUX_N
J15_92Display/EDP_AUX_P
L10_13V3_SYS
L10_2DP_PWR
IC18_1Display/TMDS_C1_D2_P
IC18_10Display/TMDS_C1_CLK_P
IC18_12Display/TMDS_C1_CLK_N
IC18_13HDMI_PWR
IC18_14
IC18_15HDMI_PWR
IC18_3Display/TMDS_C1_D2_N
IC18_4Display/TMDS_C1_D1_P
IC18_6Display/TMDS_C1_D1_N
IC18_7Display/TMDS_C1_D0_P
IC18_9Display/TMDS_C1_D0_N
L9_2HDMI_PWR
L8_2HDMI_SHIELD
IC2_1Display/ML_C_LANE0_P
IC2_10Display/ML_C_LANE3_P
IC2_12Display/ML_C_LANE3_N
IC2_14
IC2_3Display/ML_C_LANE0_N
IC2_4Display/ML_C_LANE1_P
IC2_6Display/ML_C_LANE1_N
IC2_7Display/ML_C_LANE2_P
IC2_9Display/ML_C_LANE2_N
D2_1Net-(D2-C)
D2_2DP_PWR
D4_1Net-(D4-C)
D4_2HDMI_PWR
T1_1Net-(T1-G)
C73_1Display/TMDS_D2_P
C73_2Display/TMDS_C1_D2_P
C75_1Display/TMDS_D1_P
C75_2Display/TMDS_C1_D1_P
C76_1Display/TMDS_D0_P
C76_2Display/TMDS_C1_D0_P
C78_1Display/TMDS_CLK_P
C78_2Display/TMDS_C1_CLK_P
C74_1Display/TMDS_D2_N
C74_2Display/TMDS_C1_D2_N
C77_1Display/TMDS_D1_N
C77_2Display/TMDS_C1_D1_N
C79_1Display/TMDS_D0_N
C79_2Display/TMDS_C1_D0_N
C80_1Display/TMDS_CLK_N
C80_2Display/TMDS_C1_CLK_N
C39_1Display/EDP0_TX_P
C39_2Display/ML_C_LANE0_P
C42_1Display/EDP1_TX_P
C42_2Display/ML_C_LANE1_P
C6_1Display/EDP2_TX_P
C6_2Display/ML_C_LANE2_P
C8_1Display/EDP3_TX_P
C8_2Display/ML_C_LANE3_P
C44_1Display/EDP_AUX_P
C44_2Display/EDP_C_AUX_C_P
C40_1Display/EDP0_TX_N
C40_2Display/ML_C_LANE0_N
C43_1Display/EDP1_TX_N
C43_2Display/ML_C_LANE1_N
C7_1Display/EDP2_TX_N
C7_2Display/ML_C_LANE2_N
C12_1Display/EDP3_TX_N
C12_2Display/ML_C_LANE3_N
C45_1Display/EDP_AUX_N
C45_2Display/EDP_C_AUX_C_N
R30_1Display/EDP_C_AUX_C_P
C4_1Net-(D2-C)
C3_1Net-(D2-C)
R1_1Display/TMDS_C1_D2_P
R1_2Display/TMDS_D2_C_P
R2_1Display/TMDS_C1_D2_N
R2_2Display/TMDS_D2_C_N
R3_1Display/TMDS_C1_D1_P
R3_2Display/TMDS_D1_C_P
R4_1Display/TMDS_C1_D1_N
R4_2Display/TMDS_D1_C_N
R7_1Display/TMDS_C1_D0_P
R7_2Display/TMDS_D0_C_P
R8_1Display/TMDS_C1_D0_N
R8_2Display/TMDS_D0_C_N
R9_1Display/TMDS_C1_CLK_P
R9_2Display/TMDS_CLK_C_P
R10_1Display/TMDS_C1_CLK_N
R10_2Display/TMDS_CLK_C_N
C1_1Net-(D4-C)
C2_1Net-(D4-C)
R12_1Net-(J1-GND)
R37_1Display/TMDS_CEC_IN
R100_1Display/DP_HPD_IN
IC11_2Display/DP_HPD_IN
IC11_4Display/DP_HPD
C26_13V3_SYS
J1_1Display/TMDS_HPD_IN
J1_10HDMI_SHIELD
J1_11Display/TMDS_D0_C_N
J1_12Display/TMDS_CLK_C_P
J1_13HDMI_SHIELD
J1_14Display/TMDS_CLK_C_N
J1_15Display/TMDS_CEC_IN
J1_16Net-(J1-GND)
J1_17Display/TMDS_SCL_5V0
J1_18Display/TMDS_SDA_5V0
J1_19Net-(D4-C)
J1_2
J1_3Display/TMDS_D2_C_P
J1_4HDMI_SHIELD
J1_5Display/TMDS_D2_C_N
J1_6Display/TMDS_D1_C_P
J1_7HDMI_SHIELD
J1_8Display/TMDS_D1_C_N
J1_9Display/TMDS_D0_C_P
J1_SHHDMI_SHIELD
R83_1Net-(T1-G)
R26_1Display/EDP_C_AUX_C_N
R26_2DP_PWR
R82_1Net-(T1-G)
R82_2Display/TMDS_HPD_IN
C27_1HDMI_PWR
R98_2Net-(IC6-SCLA)
R99_2Net-(IC6-SDAA)
R11_13V3_SYS
R11_2Net-(IC6-SDAA)
R81_13V3_SYS
R81_2Net-(IC6-SCLA)
R5_1HDMI_PWR
R5_2Display/TMDS_SCL_5V0
R6_1HDMI_PWR
R6_2Display/TMDS_SDA_5V0
D11_1Display/TMDS_HPD_IN
D11_2Display/TMDS_CEC_IN
D12_1
D12_2Display/DP_HPD_IN
R31_1Display/DP_MODE
D10_1Display/TMDS_SCL_5V0
D10_2Display/TMDS_SDA_5V0
J2_10Display/ML_C_LANE3_P
J2_11Display/ML_C_LANE1_N
J2_12Display/ML_C_LANE3_N
J2_15Display/ML_C_LANE2_P
J2_16Display/EDP_C_AUX_C_P
J2_17Display/ML_C_LANE2_N
J2_18Display/EDP_C_AUX_C_N
J2_2Display/DP_HPD_IN
J2_20Net-(D2-C)
J2_3Display/ML_C_LANE0_P
J2_4Display/DP_MODE
J2_5Display/ML_C_LANE0_N
J2_6Display/DP_CEC
J2_9Display/ML_C_LANE1_P
R32_1Display/DP_CEC
D15_23V3_SYS
R132_2ID Serial/SN_WP
C36_13V3_SYS
IC17_5ID Serial/SN_WP
J15_10CSI/CSI_A_CLK_N
J15_114VSYNC_CAM2_1
J15_116
J15_12CSI/CSI_A_CLK_P
J15_122
J15_15CSI/CSI_B_D1_N
J15_16CSI/CSI_A_D1_N
J15_17CSI/CSI_B_D1_P
J15_18CSI/CSI_A_D1_P
J15_21CSI/CSI_F_D0_N
J15_22CSI/CSI_E_D0_N
J15_23CSI/CSI_F_D0_P
J15_24CSI/CSI_E_D0_P
J15_27
J15_28CSI/CSI_E_CLK_N
J15_29
J15_3CSI/CSI_B_D0_N
J15_30CSI/CSI_E_CLK_P
J15_33CSI/CSI_F_D1_N
J15_34CSI/CSI_E_D1_N
J15_35CSI/CSI_F_D1_P
J15_36CSI/CSI_E_D1_P
J15_4CSI/CSI_A_D0_N
J15_40CSI/CSI_D_D0_N
J15_42CSI/CSI_D_D0_P
J15_46CSI/CSI_C_D0_N
J15_48CSI/CSI_C_D0_P
J15_5CSI/CSI_B_D0_P
J15_52CSI/CSI_C_CLK_N
J15_54CSI/CSI_C_CLK_P
J15_58CSI/CSI_C_D1_N
J15_6CSI/CSI_A_D0_P
J15_60CSI/CSI_C_D1_P
J15_64CSI/CSI_D_D1_N
J15_66CSI/CSI_D_D1_P
J15_70CSI/CSI_G_D0_N
J15_72CSI/CSI_G_D0_P
J15_76CSI/CSI_G_CLK_N
J15_78CSI/CSI_G_CLK_P
J15_82CSI/CSI_G_D1_N
J15_84CSI/CSI_G_D1_P
R13_1Net-(U4-SD0)
R15_1Net-(U4-SC0)
R17_1Net-(U4-SD1)
R21_1Net-(U4-SC1)
R19_1Net-(U4-SD2)
R58_1Net-(U4-SC2)
R59_1Net-(U4-SD3)
R61_1Net-(U4-SC3)
R57_2Net-(U4-SDA)
R60_2Net-(U4-SCL)
R23_2Net-(R18-Pad1)
R78_13V3_FFC1
R78_2Net-(R18-Pad1)
R79_2Net-(R27-Pad1)
R80_13V3_FFC2
R80_2Net-(R27-Pad1)
R29_1Net-(R27-Pad1)
R33_1Net-(R27-Pad1)
R28_1Net-(R27-Pad1)
R27_1Net-(R27-Pad1)
R25_1Net-(R18-Pad1)
R24_1Net-(R18-Pad1)
R22_1Net-(R18-Pad1)
R18_1Net-(R18-Pad1)
R35_13V3_SYS
R34_13V3_SYS
C9_13V3_SYS
R122_13V3_SYS
R122_2Net-(T8-D)
R69_1I2C_MUX_RESET
J7_13
J7_14
J7_15
J7_16
J7_17VSYNC_CAM2_2
J7_18
J7_19VSYNC_CAM2_1
J7_20
J7_22CSI/CSI_A_CLK_P
J7_23CSI/CSI_A_CLK_N
J7_25CSI/CSI_A_D0_P
J7_26CSI/CSI_A_D0_N
J7_27CSI/CSI_A_D1_P
J7_28CSI/CSI_A_D1_N
J7_29CSI/CSI_B_D0_P
J7_33V3_FFC2
J7_30CSI/CSI_B_D0_N
J7_31CSI/CSI_B_D1_P
J7_32CSI/CSI_B_D1_N
J7_34
J7_35
J7_37
J7_38
J7_43V3_FFC2
J7_40CSI/CSI_C_CLK_P
J7_41CSI/CSI_C_CLK_N
J7_43CSI/CSI_C_D0_P
J7_44CSI/CSI_C_D0_N
J7_45CSI/CSI_C_D1_P
J7_46CSI/CSI_C_D1_N
J7_47CSI/CSI_D_D0_P
J7_48CSI/CSI_D_D0_N
J7_49CSI/CSI_D_D1_P
J7_5
J7_50CSI/CSI_D_D1_N
J7_6
J7_7
J7_8
J7_MP1
J7_MP2
U4_1Net-(U4-SD0)
U4_10
U4_11
U4_12
U4_13
U4_14
U4_15
U4_16
U4_17
U4_19Net-(U4-SCL)
U4_2Net-(U4-SC0)
U4_20Net-(U4-SDA)
U4_213V3_SYS
U4_24Net-(T8-D)
U4_3Net-(U4-SD1)
U4_4Net-(U4-SC1)
U4_5Net-(U4-SD2)
U4_6Net-(U4-SC2)
U4_7Net-(U4-SD3)
U4_8Net-(U4-SC3)
T8_1I2C_MUX_RESET
T8_3Net-(T8-D)
J6_1
J6_10CSI/CSI_G_CLK_N
J6_11CSI/CSI_G_CLK_P
J6_13
J6_14
J6_16
J6_17
J6_19CSI/CSI_F_D1_N
J6_2
J6_20CSI/CSI_F_D1_P
J6_21CSI/CSI_F_D0_N
J6_22CSI/CSI_F_D0_P
J6_23CSI/CSI_E_D1_N
J6_24CSI/CSI_E_D1_P
J6_25CSI/CSI_E_D0_N
J6_26CSI/CSI_E_D0_P
J6_28CSI/CSI_E_CLK_N
J6_29CSI/CSI_E_CLK_P
J6_3
J6_31
J6_32VSYNC_CAM1_1
J6_33
J6_34VSYNC_CAM1_2
J6_35
J6_36
J6_37
J6_38
J6_4
J6_43
J6_44
J6_45
J6_46
J6_473V3_FFC1
J6_483V3_FFC1
J6_5CSI/CSI_G_D1_N
J6_6CSI/CSI_G_D1_P
J6_7CSI/CSI_G_D0_N
J6_8CSI/CSI_G_D0_P
J6_MP2
J6_MP1
BAT1_1SoM/PMIC_BBAT
USER1_1Net-(T5-D)
USER1_2Net-(USER1-A)
J15_124
J15_126
J15_127I2C_MUX_RESET
J15_128OTG_USB_ID_DET
J15_130VSYNC_CAM2_2
J15_143CAN_RXD
J15_145CAN_TXD
J15_178
J15_184ENET_TRD0_N
J15_186ENET_TRD0_P
J15_188ENET_LED1
J15_190ENET_TRD1_N
J15_192ENET_TRD1_P
J15_193
J15_194ENET_LED0
J15_195
J15_196ENET_TRD2_N
J15_197
J15_198ENET_TRD2_P
J15_199
J15_202ENET_TRD3_N
J15_204ENET_TRD3_P
J15_211
J15_216VSYNC_CAM1_2
J15_219
J15_220
J15_221
J15_222
J15_223
J15_224
J15_225
J15_226
J15_227
J15_228VSYNC_CAM1_1
J15_229
J15_131PCIE0_RX0_N
J15_133PCIE0_RX0_P
J15_134PCIE0_TX0_N
J15_136PCIE0_TX0_P
J15_137PCIE0_RX1_N
J15_139PCIE0_RX1_P
J15_140PCIE0_TX1_N
J15_142PCIE0_TX1_P
J15_148PCIE0_TX2_N
J15_149PCIE0_RX2_N
J15_150PCIE0_TX2_P
J15_151PCIE0_RX2_P
J15_154PCIE0_TX3_N
J15_155PCIE0_RX3_N
J15_156PCIE0_TX3_P
J15_157PCIE0_RX3_P
J15_160PCIE0_CLK_N
J15_161USBSS_RX6_N
J15_162PCIE0_CLK_P
J15_163USBSS_RX6_P
J15_166USBSS_TX6_N
J15_167PCIE1_RX0_N
J15_168USBSS_TX6_P
J15_169PCIE1_RX0_P
J15_172PCIE1_TX0_N
J15_173PCIE1_CLK_N
J15_174PCIE1_TX0_P
J15_175PCIE1_CLK_P
J15_179\PEWAKE_3V3
J15_180PEX_L0_CLKREQ_N
J15_181PEX_L0_RST_N
J15_182PCIE1_CLKREQ
J15_183PCIE1_RST
J15_109OTG_USB_D_N
J15_111OTG_USB_D_P
J15_115USB1_D_N
J15_117USB1_D_P
J15_121
J15_123
J15_235SoM/PMIC_BBAT
SP4_1EGND
PWR1_1Net-(PWR1-C)
PWR1_2Net-(PWR1-A)
BOOT1_1Net-(BOOT1-C)
BOOT1_2Net-(BOOT1-A)
J15_101
J15_103
J15_104
J15_105
J15_106
J15_108
J15_110
J15_112
J15_203
J15_205
J15_207
J15_209
J15_232
J15_234
J15_89
J15_91
J15_93
J15_95
J15_97
J15_99
T2_3Net-(BOOT1-C)
T4_3Net-(PWR1-C)
T5_3Net-(T5-D)
R14_2Net-(BOOT1-A)
R97_2Net-(PWR1-A)
R111_2Net-(USER1-A)
J10_13V3_SYS
J10_2PCIE1_RST
J10_3PCIE1_CLKREQ
J10_4PCIE1_CLK_P
J10_5PCIE1_CLK_N
J10_6PCIE1_TX0_P
J10_7PCIE1_TX0_N
J10_8PCIE1_RX0_P
J10_9PCIE1_RX0_N
J10_MP1
J10_MP2

14.10.3 Per-Pin Coverage Matrix

● = Detected ◐ = Partially detected - = Not tested | E = Electrical (ICT/flying probe) O = Optical (AOI) X = X-ray (AXI)

Pin ⇅Net ⇅E Opens ⇅E Shorts ⇅O Opens ⇅O Shorts ⇅X Opens ⇅X Shorts ⇅
IC12_1Supply/\PWR_SET------
IC12_10Net-(IC12-3B)------
IC12_11Net-(IC12-3B)------
IC12_12Supply/QDEL------
IC12_13Supply/QDEL------
IC12_145V0_SYS●●----
IC12_2Net-(IC12-1B)------
IC12_3Supply/Q------
IC12_4#SHUTDOWN_REQ●●----
IC12_5Supply/Q------
IC12_6Net-(IC12-1B)------
IC12_7GND●●----
IC12_8Net-(IC12-3Y)------
IC12_9Net-(IC12-3B)------
J4_1Net-(F3-Pad1)------
J4_2GND-●----
J4_3GND-●----
IC13_15V0_SYS●●----
IC13_2Supply/QDEL------
IC13_3GND●●----
IC13_4PWR_EN●●----
IC13_55V0_SYS●●----
R87_1PWR_GOOD-●----
R87_2Supply/QDEL------
C60_15V0_SYS-●----
C60_2GND-●----
R92_1#RESET-●----
R92_2Net-(IC4-EN)------
C65_11V8_SYS-●----
C65_2GND●●----
F1_1Net-(U1-FB)-●----
F1_23V3_FFC1------
F2_1Net-(U5-FB)-●----
F2_23V3_FFC2------
C58_1Supply/5V_SS-●----
C58_2GND-●----
R74_1Supply/5V_MODE------
R74_2GND●●----
C20_13V3_SYS------
C20_2GND●●----
FB1_1VIN●●----
FB1_2Supply/5V_VIN●●----
C56_1Supply/5V_VIN-●----
C56_2GND-●----
C57_1Net-(C57-Pad1)------
C57_2Supply/5V_BOOT-●----
R96_1PWR_GOOD-●----
R96_2Supply/VDD_5V_DCDC●●----
C88_15V0_SYS-●----
C88_2GND-●----
C86_11V8_SYS-●----
C86_2GND●●----
R48_13V3_SYS------
R48_2Supply/3V3_FB------
C87_1Supply/3V3_VCC-●----
C87_2GND-●----
C89_1Supply/3V3_SW------
C89_2Supply/3V3_R_C_BOOT------
R118_13V3_SYS------
R118_2Supply/3V3_FB------
C59_15V0_SYS-●----
C59_2GND-●----
C64_15V0_SYS-●----
C64_2GND-●----
U3_11V8_SYS-●----
U3_2GND●●----
U3_3FAN_PWM●●----
U3_4Supply/FAN_PMW_5V------
U3_51V8_SYS-●----
U3_65V0_SYS-●----
U1_15V0_SYS-●----
U1_2GND●●----
U1_3Net-(U1-EN)------
U1_4Net-(U1-FB)●●----
U1_5Net-(U1-SW)------
L5_1Net-(U1-SW)------
L5_2Net-(U1-FB)-●----
R117_15V0_SYS●●----
R117_2Supply/5V_FB------
R120_1Supply/5V_FB------
R120_2GND●●----
C23_1Net-(U1-FB)-●----
C23_2GND●●----
R39_1#RESET-●----
R39_2Net-(U1-EN)------
R46_15V0_SYS-●----
R46_2Supply/FAN_TACH_5V------
R119_1Supply/3V3_FB------
R119_2GND●●----
FB3_1VIN●●----
FB3_2Supply/3V3_VIN------
J12_1GND-●----
J12_25V0_SYS-●----
J12_3Supply/FAN_TACH_5V------
J12_4Supply/FAN_PMW_5V------
J12_MP1------
J12_MP2------
U5_15V0_SYS-●----
U5_2GND●●----
U5_3Net-(U5-EN)------
U5_4Net-(U5-FB)●●----
U5_5Net-(U5-SW)------
L6_1Net-(U5-SW)------
L6_2Net-(U5-FB)-●----
C55_1Net-(U5-FB)-●----
C55_2GND●●----
R52_1#RESET-●----
R52_2Net-(U5-EN)------
C16_15V0_SYS-●----
C16_2GND-●----
C18_15V0_SYS-●----
C18_2GND-●----
D13_1Supply/Q------
D13_2Supply/QDEL------
T3_11V8_SYS-●----
T3_2FAN_TACH-●----
T3_3Supply/FAN_TACH_5V------
R36_15V0_SYS●●----
R36_2Supply/Q------
R16_15V0_SYS●●----
R16_2Net-(IC12-1B)------
IC4_15V0_SYS-●----
IC4_2GND●●----
IC4_3Net-(IC4-EN)------
IC4_4------
IC4_51V8_SYS-●----
R95_11V8_SYS●●----
R95_2FAN_TACH●●----
R84_15V0_SYS●●----
R84_2Supply/\PWR_SET------
R86_15V0_SYS●●----
R86_2#SHUTDOWN_REQ●●----
R44_1#RESET-●----
R44_2Supply/3V3_EN------
C41_1Supply/\PWR_SET------
C41_2GND●●----
R85_1Supply/Q------
R85_2Supply/QDEL------
C63_1Supply/QDEL------
C63_2GND●●----
R130_1PWR_EN-●----
R130_2Net-(IC12-3Y)------
C71_15V0_SYS-●----
C71_2GND-●----
L1_1Supply/3V3_SW------
L1_23V3_SYS------
R93_1Net-(U6-VSNS)------
R93_25V0_SYS●●----
R76_1Supply/VDD_5V_DCDC-●----
R76_2Supply/5V_ILIM-●----
U2_13V3_SYS------
U2_10Supply/3V3_SW------
U2_11GND●●----
U2_12Supply/3V3_VIN------
U2_13Net-(U2-RBOOT)------
U2_14Supply/3V3_R_C_BOOT------
U2_2Supply/3V3_VCC-●----
U2_3GND●●----
U2_4Supply/3V3_FB------
U2_5------
U2_6GND●●----
U2_7Supply/3V3_EN------
U2_8Supply/3V3_VIN------
U2_9GND●●----
R45_1Net-(C24-Pad2)------
R45_2Supply/3V3_FB------
C24_13V3_SYS------
C24_2Net-(C24-Pad2)------
C25_13V3_SYS------
C25_2GND●●----
C19_1Supply/3V3_VIN------
C19_2GND●●----
C21_1Supply/3V3_VIN------
C21_2GND●●----
R91_1Supply/5V_EN●●----
R91_2Supply/5V_VIN●●----
C85_1Supply/VDRV_5V_DCDC------
C85_2GND●●----
C84_1Supply/VDD_5V_DCDC-●----
C84_2GND-●----
R89_1Net-(C57-Pad1)------
R89_2Supply/5V_PHASE-●----
R75_1Supply/5V_COMP-●----
R75_2Net-(C28-Pad1)------
R90_1Supply/5V_FSW-●----
R90_2GND-●----
C83_15V0_SYS-●----
C83_2GND-●----
C81_15V0_SYS-●----
C81_2GND-●----
R77_1Supply/5V_ILIM-●----
R77_2GND-●----
R94_1Supply/5V_SW-●----
R94_2Supply/5V_SNS-●----
C22_1Supply/5V_VIN-●----
C22_2GND-●----
C17_1Supply/5V_VIN-●----
C17_2GND-●----
L4_1Supply/5V_SW-●----
L4_25V0_SYS-●----
C61_1Net-(U6-VSNS)------
C61_2Supply/5V_SNS●●----
C82_1Supply/5V_SNS-●----
C82_25V0_SYS-●----
C28_1Net-(C28-Pad1)------
C28_2GND-●----
R70_1Net-(U2-RBOOT)------
R70_2Supply/3V3_R_C_BOOT------
U6_1Supply/5V_VIN●●----
U6_10GND●●----
U6_11GND●●----
U6_12Supply/5V_SW●●----
U6_13Supply/5V_SW●●----
U6_14Supply/5V_SW●●----
U6_15------
U6_16Supply/VDRV_5V_DCDC------
U6_17GND●●----
U6_18------
U6_19Supply/5V_SS-●----
U6_2PWR_GOOD●●----
U6_20Net-(U6-VSNS)------
U6_21Supply/5V_COMP-●----
U6_22Supply/5V_FB------
U6_23GND●●----
U6_24Supply/5V_FSW-●----
U6_25Supply/5V_ILIM-●----
U6_26Supply/VDD_5V_DCDC●●----
U6_27Supply/5V_MODE------
U6_28GND●●----
U6_3Supply/5V_EN●●----
U6_4Supply/5V_BOOT-●----
U6_5Supply/5V_PHASE●●----
U6_6Supply/5V_PHASE●●----
U6_7Supply/5V_VIN●●----
U6_8Supply/5V_VIN●●----
U6_9GND●●----
D9_1GND●●----
D9_25V0_SYS●●----
F3_1Net-(F3-Pad1)------
F3_2VIN-●----
D1_1GND-●----
D1_23V3_SYS------
D14_1VIN●●----
D14_2GND●●----
D17_25V0_SYS-●----
D17_15V0_DBG-●----
C31_1Net-(IC3-OUT)------
C31_2GND●●----
IC5_11V8_DBG------
IC5_10------
IC5_11------
IC5_12------
IC5_13------
IC5_14USB/DBG_USB_D_P------
IC5_15USB/DBG_USB_D_N------
IC5_16Net-(IC5-3V3OUT)------
IC5_17GND●●----
IC5_18------
IC5_195V0_DBG-●----
IC5_2Net-(IC5-RXD)------
IC5_20GND●●----
IC5_21------
IC5_22------
IC5_23------
IC5_24GND●●----
IC5_25------
IC5_26GND●●----
IC5_27------
IC5_28------
IC5_29------
IC5_3------
IC5_30Net-(IC5-TXD)------
IC5_31------
IC5_32------
IC5_33GND●●----
IC5_4GND●●----
IC5_5------
IC5_6------
IC5_7------
IC5_8------
IC5_9------
IC7_1USB/CC2------
IC7_10USB/C_USBSS_RX6_N------
IC7_11Net-(IC7-DIR)------
IC7_12USB/EN_MUX------
IC7_13GND●●----
IC7_14USB/USBSS_RX1_N------
IC7_15USB/USBSS_RX1_P------
IC7_16USB/USBSS_TX1_N------
IC7_17USB/USBSS_TX1_P------
IC7_18USB/USBSS_RX2_N------
IC7_19USB/USBSS_RX2_P------
IC7_2USB/CC1------
IC7_20USB/USBSS_TX2_N------
IC7_21USB/USBSS_TX2_P------
IC7_22USB/USBC_ADDR●●----
IC7_23USB/USBC_INTN------
IC7_24USB/USBC_FAULT●●----
IC7_25USB/USBC_SDA------
IC7_26USB/USBC_SCL------
IC7_27USB/USBC_ID●●----
IC7_28GND●●----
IC7_29Net-(IC7-ENn_CC)------
IC7_3Net-(IC7-CURRENT_MODE)------
IC7_305V0_SYS●●----
IC7_31GND●●----
IC7_4Net-(IC7-PORT)------
IC7_5Net-(IC7-VBUS_DET)------
IC7_6USB/C_USBSS_TX6_P------
IC7_7USB/C_USBSS_TX6_N------
IC7_83V3_SYS------
IC7_9USB/C_USBSS_RX6_P------
L7_1Net-(J5-SHIELD)------
L7_2GND-●----
J5_1USB/OTG_USB_VBUS-●----
J5_2OTG_USB_D_N------
J5_3OTG_USB_D_P------
J5_4USB/OTG_USB_ID------
J5_5GND-●----
J5_SHNet-(J5-SHIELD)------
LED1_1Net-(IC3-FAULT)------
LED1_2Net-(IC3-FAULT)------
J11_A1GND-●----
J11_A10USB/C_USBSS_RX2_N------
J11_A11USB/C_USBSS_RX2_P------
J11_A12GND-●----
J11_A2USB/C_USBSS_TX1_P------
J11_A3USB/C_USBSS_TX1_N------
J11_A4USB/USBC_VBUS-●----
J11_A5USB/C_CC1------
J11_A6USB1_D_P------
J11_A7USB1_D_N------
J11_A8------
J11_A9USB/USBC_VBUS-●----
J11_B1GND-●----
J11_B10USB/C_USBSS_RX1_N------
J11_B11USB/C_USBSS_RX1_P------
J11_B12GND-●----
J11_B2USB/C_USBSS_TX2_P------
J11_B3USB/C_USBSS_TX2_N------
J11_B4USB/USBC_VBUS-●----
J11_B5USB/C_CC2------
J11_B6USB1_D_P------
J11_B7USB1_D_N------
J11_B8Net-(J11-SBU2)-●----
J11_B9USB/USBC_VBUS-●----
J11_SHGND-●----
J9_1USB/USB_DBG_VBUS-●----
J9_2USB/DBG_USB_D_N------
J9_3USB/DBG_USB_D_P------
J9_4------
J9_5GND-●----
J9_SHGND-●----
T6_1Net-(T6-G)------
T6_2GND-●----
T6_3Net-(T6-D)------
T7_1USB/USBC_ID-●----
T7_2GND-●----
T7_3Net-(IC3-EN)------
C32_15V0_SYS-●----
C32_2GND-●----
D3_1USB/DBG_USB_D_N------
D3_2USB/DBG_USB_D_P------
D3_3GND-●----
IC15_15V0_DBG-●----
IC15_2GND●●----
IC15_35V0_DBG-●----
IC15_4------
IC15_51V8_DBG------
L2_1Net-(IC3-OUT)------
L2_2USB/USBC_VBUS●●----
L3_15V0_DBG-●----
L3_2USB/USB_DBG_VBUS-●----
R103_1USBSS_TX6_P------
R103_2USB/C_USBSS_TX6_P------
R105_1USBSS_TX6_N------
R105_2USB/C_USBSS_TX6_N------
R107_1USBSS_RX6_P------
R107_2USB/C_USBSS_RX6_P------
R108_1USBSS_RX6_N------
R108_2USB/C_USBSS_RX6_N------
R56_1GND●●----
R56_2USB/EN_MUX------
R62_1GND●●----
R62_2Net-(IC7-ENn_CC)------
R55_15V0_SYS●●----
R55_2Net-(IC7-PORT)------
R54_15V0_SYS●●----
R54_2Net-(IC7-CURRENT_MODE)------
R68_1USB/EN_MUX------
R68_2USB/USBC_ID-●----
R51_1Net-(IC7-VBUS_DET)------
R51_2USB/USBC_VBUS●●----
R53_13V3_SYS------
R53_2Net-(IC7-DIR)------
C34_15V0_SYS-●----
C34_2GND-●----
C33_13V3_SYS------
C33_2GND●●----
R104_1USB/USBSS_RX1_N------
R104_2USB/C_USBSS_RX1_N------
R106_1USB/USBSS_RX1_P------
R106_2USB/C_USBSS_RX1_P------
R109_1USB/USBSS_RX2_N------
R109_2USB/C_USBSS_RX2_N------
R110_1USB/USBSS_RX2_P------
R110_2USB/C_USBSS_RX2_P------
C48_1USB/USBSS_TX1_N------
C48_2USB/C_USBSS_TX1_P------
C50_1USB/USBSS_TX1_P------
C50_2USB/C_USBSS_TX1_N------
C53_1USB/USBSS_TX2_N------
C53_2USB/C_USBSS_TX2_P------
C54_1USB/USBSS_TX2_P------
C54_2USB/C_USBSS_TX2_N------
R67_15V0_SYS●●----
R67_2USB/USBC_INTN------
R73_1Net-(T6-G)------
R73_2GND-●----
R72_1Net-(T6-G)------
R72_2USB/OTG_USB_VBUS-●----
C62_1USB/OTG_USB_VBUS-●----
C62_2GND-●----
R64_1USB/CC2------
R64_2USB/C_CC1------
R63_1USB/CC1------
R63_2USB/C_CC1------
R65_1USB/CC2------
R65_2USB/C_CC2------
R66_1USB/CC1------
R66_2USB/C_CC2------
C35_1USB/USBC_VBUS-●----
C35_2GND-●----
R131_1USB/USBC_VBUS-●----
R131_2GND-●----
C67_15V0_DBG-●----
C67_2GND-●----
C66_11V8_DBG------
C66_2GND●●----
R20_1UART1_RX●◐----
R20_2Net-(IC5-TXD)------
R41_1UART1_TX●◐----
R41_2Net-(IC5-RXD)------
C15_1USB/DBG_USB_D_P------
C15_2GND●●----
C29_1USB/DBG_USB_D_N------
C29_2GND●●----
C72_15V0_DBG-●----
C72_2GND-●----
C30_1Net-(IC5-3V3OUT)------
C30_2GND●●----
R42_15V0_SYS●●----
R42_2Net-(IC3-OUT)------
R43_15V0_SYS●●----
R43_2Net-(IC3-FAULT)------
D6_1USB/C_USBSS_RX1_N------
D6_10USB/C_USBSS_RX1_N------
D6_2USB/C_USBSS_RX1_P------
D6_3GND-●----
D6_4USB/C_USBSS_TX1_P------
D6_5USB/C_USBSS_TX1_N------
D6_6USB/C_USBSS_TX1_N------
D6_7USB/C_USBSS_TX1_P------
D6_8GND-●----
D6_9USB/C_USBSS_RX1_P------
D7_1USB/C_USBSS_TX2_N------
D7_10USB/C_USBSS_TX2_N------
D7_2USB/C_USBSS_TX2_P------
D7_3GND-●----
D7_4USB/C_USBSS_RX2_P------
D7_5USB/C_USBSS_RX2_N------
D7_6USB/C_USBSS_RX2_N------
D7_7USB/C_USBSS_RX2_P------
D7_8GND-●----
D7_9USB/C_USBSS_TX2_P------
LED2_1USB/OTG_USB_FAULT------
LED2_2Net-(LED2-A)------
R102_15V0_SYS●●----
R102_2Net-(IC3-EN)------
D8_1OTG_USB_D_N------
D8_10OTG_USB_D_N------
D8_2OTG_USB_D_P------
D8_3GND-●----
D8_4USB/OTG_USB_ID------
D8_5Net-(D8-Pad5)------
D8_6Net-(D8-Pad5)------
D8_7USB/OTG_USB_ID------
D8_8GND-●----
D8_9OTG_USB_D_P------
R47_15V0_SYS●●----
R47_2USB/USBC_ID●●----
R137_1Net-(IC3-EN)------
R137_2GND●●----
R126_15V0_SYS●●----
R126_2USB/USBC_ADDR●●----
L11_1Net-(IC1-OUT)------
L11_2USB/OTG_USB_VBUS●●----
R129_1OTG_USB_VBUS_DET------
R129_2Net-(T6-D)------
R124_1GEN0_SCL●●----
R124_2USB/USBC_SDA------
D5_1USB/C_CC2------
D5_2USB/C_CC1------
D5_3GND-●----
IC3_15V0_SYS●●----
IC3_2GND●●----
IC3_3Net-(IC3-EN)------
IC3_4Net-(IC3-FAULT)------
IC3_5Net-(IC3-ILIM)------
IC3_6Net-(IC3-OUT)------
R127_1USB/USBC_ADDR●●----
R127_2GND●●----
R138_1Net-(IC3-ILIM)------
R138_2GND●●----
C90_15V0_SYS-●----
C90_2GND-●----
R125_1GEN0_SDA●●----
R125_2USB/USBC_SCL------
R133_11V8_SYS-●----
R133_2OTG_USB_ID_DET------
R134_15V0_SYS●●----
R134_2USB/OTG_USB_ID------
T9_1USB/OTG_USB_ID------
T9_2Net-(T6-D)------
T9_3OTG_USB_VBUS_DET------
R49_1USB/USBC_ID-●----
R49_2Net-(IC3-EN)------
U8_1------
U8_2USB/OTG_USB_ID------
U8_3GND●●----
U8_4OTG_USB_ID_DET------
U8_55V0_SYS●●----
IC1_15V0_SYS●●----
IC1_2GND●●----
IC1_3USB/OTG_USB_ID------
IC1_4USB/OTG_USB_FAULT------
IC1_5Net-(IC1-ILIM)------
IC1_6Net-(IC1-OUT)------
R136_15V0_SYS●●----
R136_2Net-(IC1-OUT)------
R50_1Net-(IC1-ILIM)------
R50_2GND●●----
R135_15V0_SYS-●----
R135_2Net-(LED2-A)------
NVME1_1Net-(J8-LED)------
NVME1_2Net-(NVME1-A)------
J8_1GND-●----
J8_10Net-(J8-LED)------
J8_11Interfaces/C_PCIE0_TX3_N------
J8_123V3_SYS------
J8_13Interfaces/C_PCIE0_TX3_P------
J8_143V3_SYS------
J8_15GND-●----
J8_163V3_SYS------
J8_17PCIE0_RX2_N------
J8_183V3_SYS------
J8_19PCIE0_RX2_P------
J8_23V3_SYS------
J8_20------
J8_21GND-●----
J8_22------
J8_23Interfaces/C_PCIE0_TX2_N------
J8_24------
J8_25Interfaces/C_PCIE0_TX2_P------
J8_26------
J8_27GND-●----
J8_28------
J8_29PCIE0_RX1_N------
J8_3GND-●----
J8_30------
J8_31PCIE0_RX1_P------
J8_32------
J8_33GND-●----
J8_34------
J8_35Interfaces/C_PCIE0_TX1_N------
J8_36------
J8_37Interfaces/C_PCIE0_TX1_P------
J8_38------
J8_39GND-●----
J8_43V3_SYS------
J8_40Net-(J8-SMB_CLK)-●----
J8_41PCIE0_RX0_N------
J8_42Net-(J8-SMB_DATA)-●----
J8_43PCIE0_RX0_P------
J8_44M2_ALERT-●----
J8_45GND-●----
J8_46------
J8_47Interfaces/C_PCIE0_TX0_N------
J8_48------
J8_49Interfaces/C_PCIE0_TX0_P------
J8_5PCIE0_RX3_N------
J8_50PEX_L0_RST_N------
J8_51GND-●----
J8_52PEX_L0_CLKREQ_N------
J8_53PCIE0_CLK_N------
J8_54\PEWAKE_3V3------
J8_55PCIE0_CLK_P------
J8_56------
J8_57GND-●----
J8_58------
J8_6------
J8_67------
J8_68------
J8_69------
J8_7PCIE0_RX3_P------
J8_703V3_SYS------
J8_71GND-●----
J8_723V3_SYS------
J8_73GND-●----
J8_743V3_SYS------
J8_75GND-●----
J8_8------
J8_9GND-●----
J8_SH1GND-●----
J8_SH2GND-●----
J3_1GND-●----
J3_10ENET_TRD3_N------
J3_11ENET_LED1------
J3_12Net-(J3-Pad12)------
J3_13ENET_LED0------
J3_14Net-(J3-Pad14)------
J3_2ENET_TRD0_P------
J3_3ENET_TRD0_N------
J3_4ENET_TRD1_P------
J3_5ENET_TRD1_N------
J3_6------
J3_7ENET_TRD2_P------
J3_8ENET_TRD2_N------
J3_9ENET_TRD3_P------
J3_SEGND------
R115_13V3_SYS------
R115_2PEX_L0_CLKREQ_N------
R116_13V3_SYS------
R116_2PEX_L0_RST_N------
R114_11V8_SYS●●----
R114_2M2_ALERT●●----
R128_13V3_SYS------
R128_2Net-(NVME1-A)------
C47_13V3_SYS------
C47_2GND●●----
C46_13V3_SYS------
C46_2GND●●----
R38_13V3_SYS------
R38_2Net-(J3-Pad12)------
R40_13V3_SYS------
R40_2Net-(J3-Pad14)------
C14_1EGND------
C14_2GND-●----
C37_1Interfaces/C_PCIE0_TX0_P------
C37_2PCIE0_TX0_P------
C49_1Interfaces/C_PCIE0_TX1_P------
C49_2PCIE0_TX1_P------
C52_1Interfaces/C_PCIE0_TX2_P------
C52_2PCIE0_TX2_P------
C69_1Interfaces/C_PCIE0_TX3_P------
C69_2PCIE0_TX3_P------
C38_1Interfaces/C_PCIE0_TX0_N------
C38_2PCIE0_TX0_N------
C51_1Interfaces/C_PCIE0_TX1_N------
C51_2PCIE0_TX1_N------
C68_1Interfaces/C_PCIE0_TX2_N------
C68_2PCIE0_TX2_N------
C70_1Interfaces/C_PCIE0_TX3_N------
C70_2PCIE0_TX3_N------
J14_1GND-●----
J14_2Net-(F5-Pad2)------
J14_3I2C1_SDA●◐----
J14_4I2C1_SCL●◐----
J14_MPGND-●----
J13_1Net-(F4-Pad2)------
J13_2Interfaces/CANH------
J13_3Interfaces/CANL------
J13_4GND-●----
J13_MPGND-●----
R123_1Interfaces/CANH------
R123_2Interfaces/CANL------
R71_1CAN_TXD------
R71_2Net-(U7-TXD)------
SP7_1GND●●----
R121_1Net-(U7-RH)------
R121_2GND●●----
F4_13V3_SYS------
F4_2Net-(F4-Pad2)------
U7_1Net-(U7-TXD)------
U7_2GND●●----
U7_33V3_SYS------
U7_4Net-(U7-RXD)------
U7_5------
U7_6Interfaces/CANL------
U7_7Interfaces/CANH------
U7_8Net-(U7-RH)------
F5_13V3_SYS------
F5_2Net-(F5-Pad2)------
R101_1CAN_RXD------
R101_2Net-(U7-RXD)------
C13_13V3_SYS------
C13_2GND●●----
IC6_13V3_SYS------
IC6_2Net-(IC6-SCLA)------
IC6_3Net-(IC6-SDAA)------
IC6_4GND●●----
IC6_5HDMI_PWR------
IC6_6Display/TMDS_SDA_5V0------
IC6_7Display/TMDS_SCL_5V0------
IC6_8HDMI_PWR------
J15_100Display/TMDS_SCL●●----
J15_206USR_LED-●----
J15_210------
J15_212M2_ALERT-●----
J15_218USR_BUTTON-●----
J15_39Display/EDP0_TX_N------
J15_41Display/EDP0_TX_P------
J15_45Display/EDP1_TX_N------
J15_47Display/EDP1_TX_P------
J15_51Display/EDP2_TX_N------
J15_53Display/EDP2_TX_P------
J15_57Display/EDP3_TX_N------
J15_59Display/EDP3_TX_P------
J15_63Display/TMDS_D2_N------
J15_65Display/TMDS_D2_P------
J15_69Display/TMDS_D1_N------
J15_71Display/TMDS_D1_P------
J15_75Display/TMDS_D0_N------
J15_77Display/TMDS_D0_P------
J15_81Display/TMDS_CLK_N------
J15_83Display/TMDS_CLK_P------
J15_87OTG_USB_VBUS_DET------
J15_88Display/DP_HPD------
J15_90Display/EDP_AUX_N------
J15_92Display/EDP_AUX_P------
J15_94Display/TMDS_CEC-●----
J15_96TMDS_HPD-●----
J15_98Display/TMDS_SDA●●----
L10_13V3_SYS------
L10_2DP_PWR------
IC18_1Display/TMDS_C1_D2_P------
IC18_10Display/TMDS_C1_CLK_P------
IC18_11GND●●----
IC18_12Display/TMDS_C1_CLK_N------
IC18_13HDMI_PWR------
IC18_14------
IC18_15HDMI_PWR------
IC18_2GND●●----
IC18_3Display/TMDS_C1_D2_N------
IC18_4Display/TMDS_C1_D1_P------
IC18_5GND●●----
IC18_6Display/TMDS_C1_D1_N------
IC18_7Display/TMDS_C1_D0_P------
IC18_8GND------
IC18_9Display/TMDS_C1_D0_N------
IC18_8GND●●----
L9_15V0_SYS●●----
L9_2HDMI_PWR------
L8_1GND-●----
L8_2HDMI_SHIELD------
IC2_1Display/ML_C_LANE0_P------
IC2_10Display/ML_C_LANE3_P------
IC2_11GND-●----
IC2_12Display/ML_C_LANE3_N------
IC2_135V0_SYS-●----
IC2_14------
IC2_155V0_SYS-●----
IC2_2GND-●----
IC2_3Display/ML_C_LANE0_N------
IC2_4Display/ML_C_LANE1_P------
IC2_5GND-●----
IC2_6Display/ML_C_LANE1_N------
IC2_7Display/ML_C_LANE2_P------
IC2_8GND------
IC2_9Display/ML_C_LANE2_N------
IC2_8GND-●----
D2_1Net-(D2-C)------
D2_2DP_PWR------
D4_1Net-(D4-C)------
D4_2HDMI_PWR------
T1_1Net-(T1-G)------
T1_2GND-●----
T1_3TMDS_HPD-●----
C73_1Display/TMDS_D2_P------
C73_2Display/TMDS_C1_D2_P------
C75_1Display/TMDS_D1_P------
C75_2Display/TMDS_C1_D1_P------
C76_1Display/TMDS_D0_P------
C76_2Display/TMDS_C1_D0_P------
C78_1Display/TMDS_CLK_P------
C78_2Display/TMDS_C1_CLK_P------
C74_1Display/TMDS_D2_N------
C74_2Display/TMDS_C1_D2_N------
C77_1Display/TMDS_D1_N------
C77_2Display/TMDS_C1_D1_N------
C79_1Display/TMDS_D0_N------
C79_2Display/TMDS_C1_D0_N------
C80_1Display/TMDS_CLK_N------
C80_2Display/TMDS_C1_CLK_N------
C39_1Display/EDP0_TX_P------
C39_2Display/ML_C_LANE0_P------
C42_1Display/EDP1_TX_P------
C42_2Display/ML_C_LANE1_P------
C6_1Display/EDP2_TX_P------
C6_2Display/ML_C_LANE2_P------
C8_1Display/EDP3_TX_P------
C8_2Display/ML_C_LANE3_P------
C44_1Display/EDP_AUX_P------
C44_2Display/EDP_C_AUX_C_P------
C40_1Display/EDP0_TX_N------
C40_2Display/ML_C_LANE0_N------
C43_1Display/EDP1_TX_N------
C43_2Display/ML_C_LANE1_N------
C7_1Display/EDP2_TX_N------
C7_2Display/ML_C_LANE2_N------
C12_1Display/EDP3_TX_N------
C12_2Display/ML_C_LANE3_N------
C45_1Display/EDP_AUX_N------
C45_2Display/EDP_C_AUX_C_N------
R30_1Display/EDP_C_AUX_C_P------
R30_2GND-●----
C4_1Net-(D2-C)------
C4_2GND-●----
C3_1Net-(D2-C)------
C3_2GND-●----
R1_1Display/TMDS_C1_D2_P------
R1_2Display/TMDS_D2_C_P------
R2_1Display/TMDS_C1_D2_N------
R2_2Display/TMDS_D2_C_N------
R3_1Display/TMDS_C1_D1_P------
R3_2Display/TMDS_D1_C_P------
R4_1Display/TMDS_C1_D1_N------
R4_2Display/TMDS_D1_C_N------
R7_1Display/TMDS_C1_D0_P------
R7_2Display/TMDS_D0_C_P------
R8_1Display/TMDS_C1_D0_N------
R8_2Display/TMDS_D0_C_N------
R9_1Display/TMDS_C1_CLK_P------
R9_2Display/TMDS_CLK_C_P------
R10_1Display/TMDS_C1_CLK_N------
R10_2Display/TMDS_CLK_C_N------
C1_1Net-(D4-C)------
C1_2GND-●----
C2_1Net-(D4-C)------
C2_2GND-●----
R12_1Net-(J1-GND)------
R12_2GND-●----
R37_1Display/TMDS_CEC_IN------
R37_2GND-●----
C5_11V8_SYS-●----
C5_2GND●●----
R100_1Display/DP_HPD_IN------
R100_2GND●●----
IC11_1GND●●----
IC11_2Display/DP_HPD_IN------
IC11_3GND●●----
IC11_4Display/DP_HPD------
IC11_51V8_SYS-●----
C26_13V3_SYS------
C26_2GND●●----
J1_1Display/TMDS_HPD_IN------
J1_10HDMI_SHIELD------
J1_11Display/TMDS_D0_C_N------
J1_12Display/TMDS_CLK_C_P------
J1_13HDMI_SHIELD------
J1_14Display/TMDS_CLK_C_N------
J1_15Display/TMDS_CEC_IN------
J1_16Net-(J1-GND)------
J1_17Display/TMDS_SCL_5V0------
J1_18Display/TMDS_SDA_5V0------
J1_19Net-(D4-C)------
J1_2------
J1_3Display/TMDS_D2_C_P------
J1_4HDMI_SHIELD------
J1_5Display/TMDS_D2_C_N------
J1_6Display/TMDS_D1_C_P------
J1_7HDMI_SHIELD------
J1_8Display/TMDS_D1_C_N------
J1_9Display/TMDS_D0_C_P------
J1_SHHDMI_SHIELD------
R88_11V8_SYS●●----
R88_2TMDS_HPD●●----
R83_1Net-(T1-G)------
R83_2GND-●----
R26_1Display/EDP_C_AUX_C_N------
R26_2DP_PWR------
R82_1Net-(T1-G)------
R82_2Display/TMDS_HPD_IN------
C27_1HDMI_PWR------
C27_2GND●●----
R98_1Display/TMDS_SCL●●----
R98_2Net-(IC6-SCLA)------
R99_1Display/TMDS_SDA●●----
R99_2Net-(IC6-SDAA)------
R11_13V3_SYS------
R11_2Net-(IC6-SDAA)------
R81_13V3_SYS------
R81_2Net-(IC6-SCLA)------
R5_1HDMI_PWR------
R5_2Display/TMDS_SCL_5V0------
R6_1HDMI_PWR------
R6_2Display/TMDS_SDA_5V0------
D11_1Display/TMDS_HPD_IN------
D11_2Display/TMDS_CEC_IN------
D11_3GND-●----
D12_1------
D12_2Display/DP_HPD_IN------
D12_3GND-●----
R31_1Display/DP_MODE------
R31_2GND-●----
D10_1Display/TMDS_SCL_5V0------
D10_2Display/TMDS_SDA_5V0------
D10_3GND-●----
J2_1GND-●----
J2_10Display/ML_C_LANE3_P------
J2_11Display/ML_C_LANE1_N------
J2_12Display/ML_C_LANE3_N------
J2_13GND-●----
J2_14GND-●----
J2_15Display/ML_C_LANE2_P------
J2_16Display/EDP_C_AUX_C_P------
J2_17Display/ML_C_LANE2_N------
J2_18Display/EDP_C_AUX_C_N------
J2_19GND-●----
J2_2Display/DP_HPD_IN------
J2_20Net-(D2-C)------
J2_SHGND-●----
J2_3Display/ML_C_LANE0_P------
J2_4Display/DP_MODE------
J2_5Display/ML_C_LANE0_N------
J2_6Display/DP_CEC------
J2_7GND-●----
J2_8GND-●----
J2_9Display/ML_C_LANE1_P------
R32_1Display/DP_CEC------
R32_2GND-●----
D15_23V3_SYS------
D15_1ID Serial/EEPROM_PWR-●----
R132_1Net-(R132-Pad1)-●----
R132_2ID Serial/SN_WP------
C36_13V3_SYS------
C36_2GND●●----
IC17_1GEN0_SCL●●----
IC17_2GND-●----
IC17_3GEN0_SDA●●----
IC17_4ID Serial/EEPROM_PWR●●----
IC17_5ID Serial/SN_WP------
J15_10CSI/CSI_A_CLK_N------
J15_11Net-(J15B-(CSI1_CLK)RSVD)-●----
J15_114VSYNC_CAM2_1------
J15_116------
J15_118Net-(J15B-GPIO01)-●----
J15_12CSI/CSI_A_CLK_P------
J15_120Net-(J15B-CAM1_PWDN)-●----
J15_122------
J15_15CSI/CSI_B_D1_N------
J15_16CSI/CSI_A_D1_N------
J15_17CSI/CSI_B_D1_P------
J15_18CSI/CSI_A_D1_P------
J15_21CSI/CSI_F_D0_N------
J15_213CSI/CAM_I2C_SCL●●----
J15_215CSI/CAM_I2C_SDA●●----
J15_22CSI/CSI_E_D0_N------
J15_23CSI/CSI_F_D0_P------
J15_24CSI/CSI_E_D0_P------
J15_27------
J15_28CSI/CSI_E_CLK_N------
J15_29------
J15_3CSI/CSI_B_D0_N------
J15_30CSI/CSI_E_CLK_P------
J15_33CSI/CSI_F_D1_N------
J15_34CSI/CSI_E_D1_N------
J15_35CSI/CSI_F_D1_P------
J15_36CSI/CSI_E_D1_P------
J15_4CSI/CSI_A_D0_N------
J15_40CSI/CSI_D_D0_N------
J15_42CSI/CSI_D_D0_P------
J15_46CSI/CSI_C_D0_N------
J15_48CSI/CSI_C_D0_P------
J15_5CSI/CSI_B_D0_P------
J15_52CSI/CSI_C_CLK_N------
J15_54CSI/CSI_C_CLK_P------
J15_58CSI/CSI_C_D1_N------
J15_6CSI/CSI_A_D0_P------
J15_60CSI/CSI_C_D1_P------
J15_64CSI/CSI_D_D1_N------
J15_66CSI/CSI_D_D1_P------
J15_70CSI/CSI_G_D0_N------
J15_72CSI/CSI_G_D0_P------
J15_76CSI/CSI_G_CLK_N------
J15_78CSI/CSI_G_CLK_P------
J15_82CSI/CSI_G_D1_N------
J15_84CSI/CSI_G_D1_P------
J15_9Net-(J15B-(CSI1_CLK)RSVD)-●----
R13_1Net-(U4-SD0)------
R13_2CSI/CAM0_SDA●◐----
R15_1Net-(U4-SC0)------
R15_2CSI/CAM0_SCL●◐----
R17_1Net-(U4-SD1)------
R17_2CSI/CAM1_SDA●◐----
R21_1Net-(U4-SC1)------
R21_2CSI/CAM1_SCL●◐----
R19_1Net-(U4-SD2)------
R19_2CSI/CAM2_SDA●◐----
R58_1Net-(U4-SC2)------
R58_2CSI/CAM2_SCL●◐----
R59_1Net-(U4-SD3)------
R59_2CSI/CAM3_SDA●◐----
R61_1Net-(U4-SC3)------
R61_2CSI/CAM3_SCL●◐----
R57_1CSI/CAM_I2C_SDA●●----
R57_2Net-(U4-SDA)------
R60_1CSI/CAM_I2C_SCL●●----
R60_2Net-(U4-SCL)------
R23_11V8_SYS-●----
R23_2Net-(R18-Pad1)------
R78_13V3_FFC1------
R78_2Net-(R18-Pad1)------
R79_11V8_SYS-●----
R79_2Net-(R27-Pad1)------
R80_13V3_FFC2------
R80_2Net-(R27-Pad1)------
R29_1Net-(R27-Pad1)------
R29_2CSI/CAM3_SDA●◐----
R33_1Net-(R27-Pad1)------
R33_2CSI/CAM3_SCL●◐----
R28_1Net-(R27-Pad1)------
R28_2CSI/CAM2_SDA●◐----
R27_1Net-(R27-Pad1)------
R27_2CSI/CAM2_SCL●◐----
R25_1Net-(R18-Pad1)------
R25_2CSI/CAM0_SDA●◐----
R24_1Net-(R18-Pad1)------
R24_2CSI/CAM0_SCL●◐----
R22_1Net-(R18-Pad1)------
R22_2CSI/CAM1_SDA●◐----
R18_1Net-(R18-Pad1)------
R18_2CSI/CAM1_SCL●◐----
R35_13V3_SYS------
R35_2CSI/CAM_I2C_SCL●●----
R34_13V3_SYS------
R34_2CSI/CAM_I2C_SDA●●----
C9_13V3_SYS------
C9_2GND●●----
R122_13V3_SYS------
R122_2Net-(T8-D)------
R69_1I2C_MUX_RESET------
R69_2GND-●----
J7_15V0_SYS-●----
J7_10CSI/CAM2_SDA●◐----
J7_11CSI/CAM3_SCL●◐----
J7_12CSI/CAM3_SDA●◐----
J7_13------
J7_14------
J7_15------
J7_16------
J7_17VSYNC_CAM2_2------
J7_18------
J7_19VSYNC_CAM2_1------
J7_25V0_SYS-●----
J7_20------
J7_21GND-●----
J7_22CSI/CSI_A_CLK_P------
J7_23CSI/CSI_A_CLK_N------
J7_24GND-●----
J7_25CSI/CSI_A_D0_P------
J7_26CSI/CSI_A_D0_N------
J7_27CSI/CSI_A_D1_P------
J7_28CSI/CSI_A_D1_N------
J7_29CSI/CSI_B_D0_P------
J7_33V3_FFC2------
J7_30CSI/CSI_B_D0_N------
J7_31CSI/CSI_B_D1_P------
J7_32CSI/CSI_B_D1_N------
J7_33GND-●----
J7_34------
J7_35------
J7_36GND-●----
J7_37------
J7_38------
J7_39GND-●----
J7_43V3_FFC2------
J7_40CSI/CSI_C_CLK_P------
J7_41CSI/CSI_C_CLK_N------
J7_42GND-●----
J7_43CSI/CSI_C_D0_P------
J7_44CSI/CSI_C_D0_N------
J7_45CSI/CSI_C_D1_P------
J7_46CSI/CSI_C_D1_N------
J7_47CSI/CSI_D_D0_P------
J7_48CSI/CSI_D_D0_N------
J7_49CSI/CSI_D_D1_P------
J7_5------
J7_50CSI/CSI_D_D1_N------
J7_6------
J7_7------
J7_8------
J7_9CSI/CAM2_SCL●◐----
J7_MP1------
J7_MP2------
U4_1Net-(U4-SD0)------
U4_10------
U4_11------
U4_12------
U4_13------
U4_14------
U4_15------
U4_16------
U4_17------
U4_18GND●●----
U4_19Net-(U4-SCL)------
U4_2Net-(U4-SC0)------
U4_20Net-(U4-SDA)------
U4_213V3_SYS------
U4_22GND●●----
U4_23GND●●----
U4_24Net-(T8-D)------
U4_25GND●●----
U4_3Net-(U4-SD1)------
U4_4Net-(U4-SC1)------
U4_5Net-(U4-SD2)------
U4_6Net-(U4-SC2)------
U4_7Net-(U4-SD3)------
U4_8Net-(U4-SC3)------
U4_9GND●●----
T8_1I2C_MUX_RESET------
T8_2GND-●----
T8_3Net-(T8-D)------
J6_1------
J6_10CSI/CSI_G_CLK_N------
J6_11CSI/CSI_G_CLK_P------
J6_12GND-●----
J6_13------
J6_14------
J6_15GND-●----
J6_16------
J6_17------
J6_18GND-●----
J6_19CSI/CSI_F_D1_N------
J6_2------
J6_20CSI/CSI_F_D1_P------
J6_21CSI/CSI_F_D0_N------
J6_22CSI/CSI_F_D0_P------
J6_23CSI/CSI_E_D1_N------
J6_24CSI/CSI_E_D1_P------
J6_25CSI/CSI_E_D0_N------
J6_26CSI/CSI_E_D0_P------
J6_27GND-●----
J6_28CSI/CSI_E_CLK_N------
J6_29CSI/CSI_E_CLK_P------
J6_3------
J6_30GND-●----
J6_31------
J6_32VSYNC_CAM1_1------
J6_33------
J6_34VSYNC_CAM1_2------
J6_35------
J6_36------
J6_37------
J6_38------
J6_39CSI/CAM0_SDA●◐----
J6_4------
J6_40CSI/CAM0_SCL●◐----
J6_41CSI/CAM1_SDA●◐----
J6_42CSI/CAM1_SCL●◐----
J6_43------
J6_44------
J6_45------
J6_46------
J6_473V3_FFC1------
J6_483V3_FFC1------
J6_495V0_SYS-●----
J6_5CSI/CSI_G_D1_N------
J6_505V0_SYS-●----
J6_6CSI/CSI_G_D1_P------
J6_7CSI/CSI_G_D0_N------
J6_8CSI/CSI_G_D0_P------
J6_9GND-●----
J6_MP2------
J6_MP1------
SP6_1GND●●----
SP3_1GND●●----
BAT1_1SoM/PMIC_BBAT------
BAT1_2GND-●----
SP5_1GND●●----
USER1_1Net-(T5-D)------
USER1_2Net-(USER1-A)------
J15_124------
J15_126------
J15_127I2C_MUX_RESET------
J15_128OTG_USB_ID_DET------
J15_130VSYNC_CAM2_2------
J15_143CAN_RXD------
J15_145CAN_TXD------
J15_178------
J15_184ENET_TRD0_N------
J15_186ENET_TRD0_P------
J15_188ENET_LED1------
J15_190ENET_TRD1_N------
J15_192ENET_TRD1_P------
J15_193------
J15_194ENET_LED0------
J15_195------
J15_196ENET_TRD2_N------
J15_197------
J15_198ENET_TRD2_P------
J15_199------
J15_202ENET_TRD3_N------
J15_204ENET_TRD3_P------
J15_211------
J15_216VSYNC_CAM1_2------
J15_219------
J15_220------
J15_221------
J15_222------
J15_223------
J15_224------
J15_225------
J15_226------
J15_227------
J15_228VSYNC_CAM1_1------
J15_229------
J15_131PCIE0_RX0_N------
J15_133PCIE0_RX0_P------
J15_134PCIE0_TX0_N------
J15_136PCIE0_TX0_P------
J15_137PCIE0_RX1_N------
J15_139PCIE0_RX1_P------
J15_140PCIE0_TX1_N------
J15_142PCIE0_TX1_P------
J15_148PCIE0_TX2_N------
J15_149PCIE0_RX2_N------
J15_150PCIE0_TX2_P------
J15_151PCIE0_RX2_P------
J15_154PCIE0_TX3_N------
J15_155PCIE0_RX3_N------
J15_156PCIE0_TX3_P------
J15_157PCIE0_RX3_P------
J15_160PCIE0_CLK_N------
J15_161USBSS_RX6_N------
J15_162PCIE0_CLK_P------
J15_163USBSS_RX6_P------
J15_166USBSS_TX6_N------
J15_167PCIE1_RX0_N------
J15_168USBSS_TX6_P------
J15_169PCIE1_RX0_P------
J15_172PCIE1_TX0_N------
J15_173PCIE1_CLK_N------
J15_174PCIE1_TX0_P------
J15_175PCIE1_CLK_P------
J15_179\PEWAKE_3V3------
J15_180PEX_L0_CLKREQ_N------
J15_181PEX_L0_RST_N------
J15_182PCIE1_CLKREQ------
J15_183PCIE1_RST------
J15_109OTG_USB_D_N------
J15_111OTG_USB_D_P------
J15_115USB1_D_N------
J15_117USB1_D_P------
J15_121------
J15_123------
J15_1GND-●----
J15_102GND-●----
J15_107GND-●----
J15_113GND-●----
J15_119GND-●----
J15_125GND-●----
J15_129GND-●----
J15_13GND-●----
J15_132GND-●----
J15_135GND-●----
J15_138GND-●----
J15_14GND-●----
J15_141GND-●----
J15_144GND-●----
J15_146GND-●----
J15_147GND-●----
J15_152GND-●----
J15_153GND-●----
J15_158GND-●----
J15_159GND-●----
J15_164GND-●----
J15_165GND-●----
J15_170GND-●----
J15_171GND-●----
J15_176GND-●----
J15_177GND-●----
J15_19GND-●----
J15_2GND-●----
J15_20GND-●----
J15_200GND-●----
J15_201GND-●----
J15_208FAN_TACH-●----
J15_214#RECOVERY-●----
J15_217GND-●----
J15_230FAN_PWM-●----
J15_231GND-●----
J15_233#SHUTDOWN_REQ-●----
J15_235SoM/PMIC_BBAT------
J15_237PWR_EN-●----
J15_239#RESET-●----
J15_240#PWR_BUTTON-●----
J15_241GND-●----
J15_242GND-●----
J15_243GND-●----
J15_244GND-●----
J15_245GND-●----
J15_246GND-●----
J15_247GND-●----
J15_248GND-●----
J15_249GND-●----
J15_25GND-●----
J15_250GND-●----
J15_251VDD_MOD-●----
J15_252VDD_MOD-●----
J15_253VDD_MOD-●----
J15_254VDD_MOD-●----
J15_255VDD_MOD-●----
J15_256VDD_MOD-●----
J15_257VDD_MOD-●----
J15_258VDD_MOD-●----
J15_259VDD_MOD-●----
J15_26GND-●----
J15_260VDD_MOD-●----
J15_261GND-●----
J15_262GND-●----
J15_31GND-●----
J15_32GND-●----
J15_37GND-●----
J15_38GND-●----
J15_43GND-●----
J15_44GND-●----
J15_49GND-●----
J15_50GND-●----
J15_55GND-●----
J15_56GND-●----
J15_61GND-●----
J15_62GND-●----
J15_67GND-●----
J15_68GND-●----
J15_7GND-●----
J15_73GND-●----
J15_74GND-●----
J15_79GND-●----
J15_8GND-●----
J15_80GND-●----
J15_85GND-●----
J15_86GND-●----
SP2_1GND●●----
SP4_1EGND------
PWR1_1Net-(PWR1-C)------
PWR1_2Net-(PWR1-A)------
BOOT1_1Net-(BOOT1-C)------
BOOT1_2Net-(BOOT1-A)------
SP1_1GND●●----
J15_101------
J15_103------
J15_104------
J15_105------
J15_106------
J15_108------
J15_110------
J15_112------
J15_185GEN0_SCL●●----
J15_187GEN0_SDA●●----
J15_189I2C1_SCL●◐----
J15_191I2C1_SDA●◐----
J15_203------
J15_205------
J15_207------
J15_209------
J15_232------
J15_234------
J15_236UART1_TX●◐----
J15_238UART1_RX●◐----
J15_89------
J15_91------
J15_93------
J15_95------
J15_97------
J15_99------
T2_1#RESET-●----
T2_2GND-●----
T2_3Net-(BOOT1-C)------
T4_1PWR_GOOD-●----
T4_2GND-●----
T4_3Net-(PWR1-C)------
T5_1USR_LED-●----
T5_2GND-●----
T5_3Net-(T5-D)------
C11_1VDD_MOD-●----
C11_2GND-●----
C10_1VDD_MOD-●----
C10_2GND-●----
R112_11V8_SYS●●----
R112_2USR_BUTTON●●----
R14_15V0_SYS-●----
R14_2Net-(BOOT1-A)------
R97_15V0_SYS-●----
R97_2Net-(PWR1-A)------
R111_15V0_SYS-●----
R111_2Net-(USER1-A)------
RST1_1GND●●----
RST1_2#RESET●●----
RST1_3GND●●----
RST1_SHGND●●----
R113_1GND●●----
R113_2USR_LED●●----
USR1_1GND●●----
USR1_2USR_BUTTON●●----
USR1_3GND●●----
USR1_SHGND●●----
REC1_1GND●●----
REC1_2#RECOVERY●●----
REC1_3GND●●----
REC1_SHGND●●----
J10_13V3_SYS------
J10_10GND-●----
J10_2PCIE1_RST------
J10_3PCIE1_CLKREQ------
J10_4PCIE1_CLK_P------
J10_5PCIE1_CLK_N------
J10_6PCIE1_TX0_P------
J10_7PCIE1_TX0_N------
J10_8PCIE1_RX0_P------
J10_9PCIE1_RX0_N------
J10_MP1------
J10_MP2------
R139_1#RESET●●----
R139_2GND●●----
FB2_15V0_SYS●●----
FB2_2VDD_MOD●●----

14.11 PCOLA/SOQ Fault Coverage

PCOLA/SOQ scores how well the configured test methods cover each component and each connection. PCOLA evaluates five device-level properties: Presence, Correctness, Orientation, Live (functional), and Alignment. SOQ evaluates three connection-level properties: Shorts detection, Opens detection, and solder joint Quality. Scores are on a 0–100,000 scale where 100,000 means every property is fully covered. The Combined score is the average of PCOLA and SOQ.

14.11.1 Coverage by Test Method

P=Presence C=Correctness O=Orientation L=Live A=Alignment | S=Shorts O(pins)=Opens Q=Quality

PCOLA/SOQ coverage scores by test method. Scores: 0 (None), 0.5 (Partial), 1.0 (Full).
Test MethodPCOLASOpensSolder Quality
Electrical Test41.1%11.1%0.0%1.6%0.0%18.9%15.2%0.0%
Optical Inspection (AOI)0.0%0.0%0.0%0.0%0.0%0.0%0.0%0.0%
X-Ray Inspection (AXI)0.0%0.0%0.0%0.0%0.0%0.0%0.0%0.0%
Combined41.1%11.1%0.0%1.6%0.0%18.9%15.2%0.0%

14.11.2 PCB Device/Pin Count

Devices (PCOLA): 297
Pins (SOQ): 1366

14.11.3 Board-Level Scores

Board-Level Coverage (0 – 100,000 scale)
DimensionScoreCoverage
PCOLA10760 / 100,00010.8%
SOQ11359 / 100,00011.4%
Combined11060 / 100,00011.1%
Electrical vs Inspection
SourcePCOLA ScoreSOQ Score
Electrical Test10760 / 100,00011359 / 100,000
Optical/X-ray Inspection0 / 100,0000 / 100,000
Combined (max)10760 / 100,00011359 / 100,000

14.11.4 PCOLA (297 devices)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0) — = N/A (excluded)
* Footprint not IPC-7351B/7251 compliant — no inspection coverage scored

Score ⇅RefDes ⇅Type / Footprint ⇅Class ⇅P ⇅C ⇅O ⇅L ⇅A ⇅Method ⇅
40%C18C_2u2_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C11C_Pol_330u_6.3V_KEMET-T520-B / C_Pol_EIA-B *Capacitor●●○—○Passive_Meas, Powered_Off
40%C16C_2u2_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C60C_2u2_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C5C_100n_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C65C_1u_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%R88R_2k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%R47R_100k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%C83C_100n_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C81C_10u_0603 / C_0603_1608Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C22C_10u_1206_50V / C_1206_3216Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%FB1FB_10Z_10A_WE-MPSB_1206 / FB_1206_3216Metric *Ferrite●●○—○Passive_Meas, Powered_Off
40%C56C_100n_50V_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%R95R_10k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%C17C_10u_1206_50V / C_1206_3216Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C88C_100n_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C86C_100n_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%R86R_200k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%C90C_100n_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C34C_47u_0805 / C_0805_2012Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C59C_47u_0805 / C_0805_2012Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C64C_47u_0805 / C_0805_2012Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C32C_10u_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%C71C_100n_0402 / C_0402_1005Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%R114R_10k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%C23C_10u_0603 / C_0603_1608Metric *Capacitor●●○—○Passive_Meas, Powered_Off
40%FB2FB_10Z_10A_WE-MPSB_1206 / FB_1206_3216Metric *Ferrite●●○—○Passive_Meas, Powered_Off
40%R139R_100k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%R113R_100k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%R112R_100k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%C10C_Pol_330u_6.3V_KEMET-T520-B / C_Pol_EIA-B *Capacitor●●○—○Passive_Meas, Powered_Off
40%R91R_100k_0402 / R_0402_1005Metric *Resistor●●○—○Passive_Meas, Powered_Off
40%C55C_10u_0603 / C_0603_1608Metric *Capacitor●●○—○Passive_Meas, Powered_Off
20%IC17AT24CS01_SOT23 / SOT-23-5 *IC◐○○◐○LSSI, Powered_Off
20%U4PCA9547_VQFN / VQFN-24-1EP_3.8x3.8x1.0mm_P0.5mm *IC◐○○◐○LSSI, Powered_Off
10%J4BarrelJack_Pin2mm_MJ-179PH / BarrelJack_Pin2mm_MJ-179PH *Connector◐○○—○Powered_Off
10%IC13SN74LVC1G126_SC-70 / SC-70-5 *IC◐○○○○Powered_Off
10%R92R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%F1F_1.25A_0603 / F_0603_1608Metric *Fuse◐○○—○Powered_Off
10%F2F_1.25A_0603 / F_0603_1608Metric *Fuse◐○○—○Powered_Off
10%C58C_33n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R74R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C20C_47u_0805 / C_0805_2012Metric *Capacitor◐○○—○Powered_Off
10%C57C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R96R_100k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%BAT1Battery_Holder_MS621FE-FL11E / MS621FE-FL11E *Other◐○○○○Powered_Off
10%C87C_1u_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%SP5Spacer_Drill3.7mm_H6mm_9774060151R / Spacer_Drill3.7mm_H6mm_9774060151R *Other◐○○○○Powered_Off
10%U3SN74LXC1T45DBVR / SOT-23-6 *IC◐○○○○Powered_Off
10%U1LM3671MF-3.3_SOT / SOT-23-5 *IC◐○○○○Powered_Off
10%L5L_2u2_1.6A_1210 / L_1210_3225Metric *Inductor◐○○—○Powered_Off
10%R117R_52k3_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R120R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R39R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R46R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%FB3FB_180Z_3.1A_WE-MPSB_0805 / FB_0805_2012Metric *Ferrite◐○○—○Powered_Off
10%J12Molex_PicoBlade_1x4_0533980471 / Conn_Molex_PicoBlade_1x4_0533980471 *Connector◐○○—○Powered_Off
10%U5LM3671MF-3.3_SOT / SOT-23-5 *IC◐○○○○Powered_Off
10%L6L_2u2_1.6A_1210 / L_1210_3225Metric *Inductor◐○○—○Powered_Off
10%R52R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%IC1274HC00_TSSOP / TSSOP-14_4.4x5mm_P0.65mm *IC◐○○○○Powered_Off
10%SP2Spacer_Drill3.7mm_H6mm_9774060151R / Spacer_Drill3.7mm_H6mm_9774060151R *Other◐○○○○Powered_Off
10%T3BSS138PW / SC70-3 *Transistor◐○○○○Powered_Off
10%R36R_1k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R16R_1k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%IC4TPS7A0518P_SOT23-5 / SOT-23-5 *IC◐○○○○Powered_Off
10%R84R_200k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R44R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C41C_47n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%SP1Spacer_Drill3.7mm_H6mm_9774060151R / Spacer_Drill3.7mm_H6mm_9774060151R *Other◐○○○○Powered_Off
10%C63C_10u_0603 / C_0603_1608Metric *Capacitor◐○○—○Powered_Off
10%T2BSS138PW / SC70-3 *Transistor◐○○○○Powered_Off
10%R93R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R76R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%U2LM62440-Q1 / VQFN-HR-14_3.5x4mm *IC◐○○○○Powered_Off
10%C25C_10u_0805 / C_0805_2012Metric *Capacitor◐○○—○Powered_Off
10%C19C_10u_1206_50V / C_1206_3216Metric *Capacitor◐○○—○Powered_Off
10%C21C_10u_1206_50V / C_1206_3216Metric *Capacitor◐○○—○Powered_Off
10%C85C_4u7_0603 / C_0603_1608Metric *Capacitor◐○○—○Powered_Off
10%C84C_1u_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R89R_3R3_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R90R_26k7_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%L4L_3u3_9.2A_Vishay-IHLP-3232DZ-01 / L_Vishay-IHLP3232DZ *Inductor◐○○—○Powered_Off
10%T4BSS138PW / SC70-3 *Transistor◐○○○○Powered_Off
10%U6SIC477ED-T1-GE3 / SIC47XED-T1-GE3 *IC◐○○○○Powered_Off
10%D9ESD5B5_0ST1G / SOD-523_NP *Diode◐○○○○Powered_Off
10%F3F_12A_1206 / F_1206_3216Metric *Fuse◐○○—○Powered_Off
10%D1ESD5B5_0ST1G / SOD-523_NP *Diode◐○○○○Powered_Off
10%D14SMBJ33A / D_SMB *Diode◐○○○○Powered_Off
10%D171N4148WS / D_SOD-323F *Diode◐○○○○Powered_Off
10%C31C_100u_1206 / C_1206_3216Metric *Capacitor◐○○—○Powered_Off
10%IC5FT232R_QFN / QFN-32-1EP_5x5mm *IC◐○○○○Powered_Off
10%IC7HD3SS3220RNH / WQFN-30-1EP_4.6x2.6mm_P0.4mm *IC◐○○○○Powered_Off
10%L7FB_120Z_3A_Murata-BLM18SG_0603 / FB_0603_1608Metric *Inductor◐○○—○Powered_Off
10%J5USB-Micro-B_Molex_473460001 / USB-Micro-B_Receptacle_Molex_473460001 *Connector◐○○—○Powered_Off
10%T5BSS138PW / SC70-3 *Transistor◐○○○○Powered_Off
10%J11USB-C_WE_632723300011 / USB-C_Receptacle_WE_632723300011 *Connector◐○○—○Powered_Off
10%J9USB-Micro-B_Molex_473460001 / USB-Micro-B_Receptacle_Molex_473460001 *Connector◐○○—○Powered_Off
10%T6BSS138PW / SC70-3 *Transistor◐○○○○Powered_Off
10%D3PESD2USB5UV-TR / SOT-23-3 *Diode◐○○○○Powered_Off
10%IC15TPS7A0518P_SOT23-5 / SOT-23-5 *IC◐○○○○Powered_Off
10%L2FB_120Z_3A_Murata-BLM18SG_0603 / FB_0603_1608Metric *Inductor◐○○—○Powered_Off
10%L3FB_120Z_3A_Murata-BLM18SG_0603 / FB_0603_1608Metric *Inductor◐○○—○Powered_Off
10%R14R_470R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R97R_470R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R111R_470R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%RST1SW_TL3340AF160QG_SMD / SW_TL3340AF160QG_SMD *Other◐○○○○Powered_Off
10%R56R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R62R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R55R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R51R_909k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%USR1SW_TL3340AF160QG_SMD / SW_TL3340AF160QG_SMD *Other◐○○○○Powered_Off
10%C33C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%REC1SW_TL3340AF160QG_SMD / SW_TL3340AF160QG_SMD *Other◐○○○○Powered_Off
10%J10Conn_FFC_Molex_5051101097 / Conn_FFC_Molex_5051101097 *Connector◐○○—○Powered_Off
10%R24R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R67R_200k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R73R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R72R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C62C_4u7_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C35C_10u_0603 / C_0603_1608Metric *Capacitor◐○○—○Powered_Off
10%R131R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C67C_2u2_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C66C_1u_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R20R_22R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R41R_22R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C15C_47p_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C29C_47p_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C72C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C30C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R43R_470R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%D6TPD4E05U06QDQARQ1 / USON-10_2.5x1mm_P0.5mm *Diode◐○○○○Powered_Off
10%D7TPD4E05U06QDQARQ1 / USON-10_2.5x1mm_P0.5mm *Diode◐○○○○Powered_Off
10%R102R_100k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%D8TPD4E05U06QDQARQ1 / USON-10_2.5x1mm_P0.5mm *Diode◐○○○○Powered_Off
10%L11FB_120Z_3A_Murata-BLM18SG_0603 / FB_0603_1608Metric *Inductor◐○○—○Powered_Off
10%D5PESD2USB5UV-TR / SOT-23-3 *Diode◐○○○○Powered_Off
10%IC3NCP380LSNAJAAT1G / SOT-23-6 *IC◐○○○○Powered_Off
10%R138R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R133R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R134R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R49R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%U874LVC1G07_SOT-753 / SOT-753 *IC◐○○○○Powered_Off
10%IC1NCP380LSNAJAAT1G / SOT-23-6 *IC◐○○○○Powered_Off
10%R50R_10k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R135R_470R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%J8Bus_M.2_MDT580M01001 / Bus_M.2_Socket_Key_M_Amphenol_MDT580M01001 *Connector◐○○—○Powered_Off
10%J3RJ45_Bel_SI-51005-F / RJ45_Bel_SI-51005-F *Connector◐○○—○Powered_Off
10%R83R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C47C_10u_0603 / C_0603_1608Metric *Capacitor◐○○—○Powered_Off
10%C46C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C14C_100p_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%J14JST_SH_1x4_SM04B-SRSS-TB-LF-SN / Conn_JST_SH_1x4_SM04B-SRSS-TB-LF-SN *Connector◐○○—○Powered_Off
10%J13JST_SH_1x4_SM04B-SRSS-TB-LF-SN / Conn_JST_SH_1x4_SM04B-SRSS-TB-LF-SN *Connector◐○○—○Powered_Off
10%SP7Spacer_Drill3.7mm_H4mm_9774040151R / Spacer_Drill3.7mm_H4mm_9774040151R *Other◐○○○○Powered_Off
10%R121R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%U7MAX3051EKA / SOT-23-8 *IC◐○○○○Powered_Off
10%C13C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%IC6PCA9517ADP / TSSOP-8_3x3mm_P0.65mm *IC◐○○○○Powered_Off
10%J15Bus_DDR4_SODIMM_CUSTOM_Jetson-Nano-H9.2mm-socket / TE_2309413 *Connector◐○○—○Powered_Off
10%IC18TPD8S009DSMR / R-PDSO-N15 *IC◐○○○○Powered_Off
10%L9FB_120Z_3A_Murata-BLM18SG_0603 / FB_0603_1608Metric *Inductor◐○○—○Powered_Off
10%L8FB_120Z_3A_Murata-BLM18SG_0603 / FB_0603_1608Metric *Inductor◐○○—○Powered_Off
10%IC2TPD8S009DSMR / R-PDSO-N15 *IC◐○○○○Powered_Off
10%T1BSS138PW / SC70-3 *Transistor◐○○○○Powered_Off
10%R30R_100k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C4C_4u7_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C3C_4u7_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C1C_4u7_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C2C_4u7_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R100R_100k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%IC11SN74LV1T125DBVR / SOT-23-5 *IC◐○○○○Powered_Off
10%C26C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%C27C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R98R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R99R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%D11PESD2USB5UV-TR / SOT-23-3 *Diode◐○○○○Powered_Off
10%D12PESD2USB5UV-TR / SOT-23-3 *Diode◐○○○○Powered_Off
10%R31R_1M_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%D10PESD2USB5UV-TR / SOT-23-3 *Diode◐○○○○Powered_Off
10%J2DisplayPort-Mini_TE_2129320-3 / DisplayPort-Mini_Receptacle_TE_2129320-3 *Connector◐○○—○Powered_Off
10%R32R_1M_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%D151N4148WS / D_SOD-323F *Diode◐○○○○Powered_Off
10%R132R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C36C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R13R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R15R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R17R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R21R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R19R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R58R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R59R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R61R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R57R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R60R_0R_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R29R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R33R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R28R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R27R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R25R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R22R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R18R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R35R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%R34R_2k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%C9C_100n_0402 / C_0402_1005Metric *Capacitor◐○○—○Powered_Off
10%R69R_100k_0402 / R_0402_1005Metric *Resistor◐○○—○Powered_Off
10%J7Conn_FFC_WE_68715014022 / Conn_FFC_WE_68715014x22 *Connector◐○○—○Powered_Off
10%T8BSS138PW / SC70-3 *Transistor◐○○○○Powered_Off
10%J6Conn_FFC_WE_68715014522 / Conn_FFC_WE_68715014x22 *Connector◐○○—○Powered_Off
10%SP6Spacer_Drill3.7mm_H6mm_9774060151R / Spacer_Drill3.7mm_H6mm_9774060151R *Other◐○○○○Powered_Off
10%SP3Spacer_Drill3.7mm_H6mm_9774060151R / Spacer_Drill3.7mm_H6mm_9774060151R *Other◐○○○○Powered_Off
0%R48R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%C89C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%D131N4148WS / D_SOD-323F *Diode○○○○○
0%R85R_470k_0402 / R_0402_1005Metric *Resistor○○○—○
0%L1L_2u2_8A_Coilcraft-XFL4020 / L_Coilcraft-XFL4020 *Inductor○○○—○
0%R70R_100R_0402 / R_0402_1005Metric *Resistor○○○—○
0%LED1LED_G_0603_LG_L29K-G2J1-24-Z / LED_0603_1608Metric_G *LED○○○○○
0%R103R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R105R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R107R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R108R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R53R_200k_0402 / R_0402_1005Metric *Resistor○○○—○
0%R104R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R106R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R109R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%C49C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C52C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%R11R_2k_0402 / R_0402_1005Metric *Resistor○○○—○
0%R81R_2k_0402 / R_0402_1005Metric *Resistor○○○—○
0%R5R_2k_0402 / R_0402_1005Metric *Resistor○○○—○
0%R6R_2k_0402 / R_0402_1005Metric *Resistor○○○—○
0%C69C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%L10FB_120Z_3A_Murata-BLM18SG_0603 / FB_0603_1608Metric *Inductor○○○—○
0%C38C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C51C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C68C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C70C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%D21N4148WS / D_SOD-323F *Diode○○○○○
0%D41N4148WS / D_SOD-323F *Diode○○○○○
0%R128R_220R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R65R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%C73C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C75C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C76C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C78C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C74C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C77C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C79C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C80C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C39C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C42C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%R78R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R80R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%C6C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C8C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C44C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C40C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C43C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%R116R_10k_0402 / R_0402_1005Metric *Resistor○○○—○
0%C7C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C12C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C45C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%R38R_220R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R123R_120R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R122R_10k_0402 / R_0402_1005Metric *Resistor○○○—○
0%R71R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R1R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%R63R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R2R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%R3R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%R4R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%R7R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%R8R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%R9R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%USER1LED_G_0603_LG_L29K-G2J1-24-Z / LED_0603_1608Metric_G *Other○○○○○
0%R10R_5R6_0402 / R_0402_1005Metric *Resistor○○○—○
0%SP4Spacer_Drill3.7mm_H6mm_9774060151R / Spacer_Drill3.7mm_H6mm_9774060151R *Other○○○○○
0%PWR1LED_G_0603_LG_L29K-G2J1-24-Z / LED_0603_1608Metric_G *Other○○○○○
0%BOOT1LED_G_0603_LG_L29K-G2J1-24-Z / LED_0603_1608Metric_G *Other○○○○○
0%R40R_220R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R115R_10k_0402 / R_0402_1005Metric *Resistor○○○—○
0%NVME1LED_G_0603_LG_L29K-G2J1-24-Z / LED_0603_1608Metric_G *Other○○○○○
0%F4F_1.25A_0603 / F_0603_1608Metric *Fuse○○○—○
0%C54C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C53C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C50C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%C37C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%F5F_1.25A_0603 / F_0603_1608Metric *Fuse○○○—○
0%J1HDMI-Micro-D_Molex_467561001 / HDMI-Micro-D_Receptacle_Molex_467651001 *Connector○○○—○
0%T9BSS138PW / SC70-3 *Transistor○○○○○
0%C48C_100n_0402 / C_0402_1005Metric *Capacitor○○○—○
0%LED2LED_G_0603_LG_L29K-G2J1-24-Z / LED_0603_1608Metric_G *LED○○○○○
0%R26R_100k_0402 / R_0402_1005Metric *Resistor○○○—○
0%R82R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R110R_0R_0402 / R_0402_1005Metric *Resistor○○○—○
0%R101R_0R_0402 / R_0402_1005Metric *Resistor○○○—○

14.11.5 SOQ (1366 pins)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0)

Score ⇅Pin ⇅Net ⇅S ⇅O ⇅Q ⇅
50%U6_13Supply/5V_SW◐●○
50%U6_14Supply/5V_SW◐●○
50%IC7_305V0_SYS◐●○
50%IC7_31GND◐●○
50%C66_2GND◐●○
50%IC12_145V0_SYS◐●○
50%R20_1UART1_RX◐●○
50%U8_3GND◐●○
50%IC12_4#SHUTDOWN_REQ◐●○
50%R41_1UART1_TX◐●○
50%R95_11V8_SYS◐●○
50%IC12_7GND◐●○
50%U8_55V0_SYS◐●○
50%C15_2GND◐●○
50%R95_2FAN_TACH◐●○
50%R84_15V0_SYS◐●○
50%R67_15V0_SYS◐●○
50%IC13_15V0_SYS◐●○
50%R86_15V0_SYS◐●○
50%IC13_3GND◐●○
50%IC13_4PWR_EN◐●○
50%IC13_55V0_SYS◐●○
50%R86_2#SHUTDOWN_REQ◐●○
50%L11_2USB/OTG_USB_VBUS◐●○
50%U6_17GND◐●○
50%IC1_15V0_SYS◐●○
50%IC5_17GND◐●○
50%C65_2GND◐●○
50%C41_2GND◐●○
50%C29_2GND◐●○
50%C33_2GND◐●○
50%U6_2PWR_GOOD◐●○
50%J15_100Display/TMDS_SCL◐●○
50%C63_2GND◐●○
50%R138_2GND◐●○
50%R74_2GND◐●○
50%R56_1GND◐●○
50%C20_2GND◐●○
50%FB1_1VIN◐●○
50%FB1_2Supply/5V_VIN◐●○
50%U6_23GND◐●○
50%IC5_20GND◐●○
50%IC1_2GND◐●○
50%R114_2M2_ALERT◐●○
50%R93_25V0_SYS◐●○
50%R96_2Supply/VDD_5V_DCDC◐●○
50%U6_26Supply/VDD_5V_DCDC◐●○
50%R134_15V0_SYS◐●○
50%U6_28GND◐●○
50%C86_2GND◐●○
50%C30_2GND◐●○
50%U6_3Supply/5V_EN◐●○
50%U2_11GND◐●○
50%IC3_15V0_SYS◐●○
50%R43_15V0_SYS◐●○
50%C47_2GND◐●○
50%U6_5Supply/5V_PHASE◐●○
50%IC15_2GND◐●○
50%U6_6Supply/5V_PHASE◐●○
50%U2_3GND◐●○
50%U6_7Supply/5V_VIN◐●○
50%U3_2GND◐●○
50%U3_3FAN_PWM◐●○
50%J14_3I2C1_SDA◐●○
50%FB2_15V0_SYS◐●○
50%U2_6GND◐●○
50%J14_4I2C1_SCL◐●○
50%U1_2GND◐●○
50%R102_15V0_SYS◐●○
50%U1_4Net-(U1-FB)◐●○
50%SP7_1GND◐●○
50%U2_9GND◐●○
50%L2_2USB/USBC_VBUS◐●○
50%R117_15V0_SYS◐●○
50%C25_2GND◐●○
50%U6_8Supply/5V_VIN◐●○
50%R120_2GND◐●○
50%C19_2GND◐●○
50%C23_2GND◐●○
50%U6_9GND◐●○
50%C21_2GND◐●○
50%R91_1Supply/5V_EN◐●○
50%R50_2GND◐●○
50%FB3_1VIN◐●○
50%R91_2Supply/5V_VIN◐●○
50%D9_1GND◐●○
50%C85_2GND◐●○
50%D9_25V0_SYS◐●○
50%R62_1GND◐●○
50%C46_2GND◐●○
50%IC5_24GND◐●○
50%IC3_2GND◐●○
50%U5_2GND◐●○
50%IC5_26GND◐●○
50%U5_4Net-(U5-FB)◐●○
50%D14_1VIN◐●○
50%D14_2GND◐●○
50%IC5_33GND◐●○
50%IC5_4GND◐●○
50%C55_2GND◐●○
50%R55_15V0_SYS◐●○
50%R121_2GND◐●○
50%C31_2GND◐●○
50%J15_98Display/TMDS_SDA◐●○
50%R47_15V0_SYS◐●○
50%R51_2USB/USBC_VBUS◐●○
50%R47_2USB/USBC_ID◐●○
50%IC6_4GND◐●○
50%R114_11V8_SYS◐●○
50%C13_2GND◐●○
50%U7_2GND◐●○
50%R36_15V0_SYS◐●○
50%U6_1Supply/5V_VIN◐●○
50%R16_15V0_SYS◐●○
50%U6_10GND◐●○
50%U6_11GND◐●○
50%IC4_2GND◐●○
50%U6_12Supply/5V_SW◐●○
50%IC7_13GND◐●○
50%IC7_22USB/USBC_ADDR◐●○
50%IC7_24USB/USBC_FAULT◐●○
50%IC7_27USB/USBC_ID◐●○
50%IC7_28GND◐●○
50%IC18_11GND◐●○
50%IC18_2GND◐●○
50%IC18_5GND◐●○
50%L9_15V0_SYS◐●○
50%C5_2GND◐●○
50%R100_2GND◐●○
50%IC11_1GND◐●○
50%IC11_3GND◐●○
50%C26_2GND◐●○
50%R88_11V8_SYS◐●○
50%R88_2TMDS_HPD◐●○
50%C27_2GND◐●○
50%R98_1Display/TMDS_SCL◐●○
50%R99_1Display/TMDS_SDA◐●○
50%C36_2GND◐●○
50%IC17_1GEN0_SCL◐●○
50%IC17_3GEN0_SDA◐●○
50%IC17_4ID Serial/EEPROM_PWR◐●○
50%J15_213CSI/CAM_I2C_SCL◐●○
50%J15_215CSI/CAM_I2C_SDA◐●○
50%R13_2CSI/CAM0_SDA◐●○
50%R15_2CSI/CAM0_SCL◐●○
50%R17_2CSI/CAM1_SDA◐●○
50%R21_2CSI/CAM1_SCL◐●○
50%R19_2CSI/CAM2_SDA◐●○
50%R58_2CSI/CAM2_SCL◐●○
50%R59_2CSI/CAM3_SDA◐●○
50%R61_2CSI/CAM3_SCL◐●○
50%R57_1CSI/CAM_I2C_SDA◐●○
50%R60_1CSI/CAM_I2C_SCL◐●○
50%R29_2CSI/CAM3_SDA◐●○
50%R33_2CSI/CAM3_SCL◐●○
50%R28_2CSI/CAM2_SDA◐●○
50%R27_2CSI/CAM2_SCL◐●○
50%R25_2CSI/CAM0_SDA◐●○
50%R24_2CSI/CAM0_SCL◐●○
50%R22_2CSI/CAM1_SDA◐●○
50%R18_2CSI/CAM1_SCL◐●○
50%R35_2CSI/CAM_I2C_SCL◐●○
50%R34_2CSI/CAM_I2C_SDA◐●○
50%C9_2GND◐●○
50%J7_10CSI/CAM2_SDA◐●○
50%J7_11CSI/CAM3_SCL◐●○
50%J7_12CSI/CAM3_SDA◐●○
50%FB2_2VDD_MOD◐●○
50%J7_9CSI/CAM2_SCL◐●○
50%U4_18GND◐●○
50%U4_22GND◐●○
50%U4_23GND◐●○
50%U4_25GND◐●○
50%U4_9GND◐●○
50%J6_39CSI/CAM0_SDA◐●○
50%J6_40CSI/CAM0_SCL◐●○
50%J6_41CSI/CAM1_SDA◐●○
50%J6_42CSI/CAM1_SCL◐●○
50%SP6_1GND◐●○
50%SP3_1GND◐●○
50%SP5_1GND◐●○
50%SP2_1GND◐●○
50%SP1_1GND◐●○
50%J15_185GEN0_SCL◐●○
50%J15_187GEN0_SDA◐●○
50%J15_189I2C1_SCL◐●○
50%J15_191I2C1_SDA◐●○
50%J15_236UART1_TX◐●○
50%J15_238UART1_RX◐●○
50%R112_11V8_SYS◐●○
50%R112_2USR_BUTTON◐●○
50%RST1_1GND◐●○
50%RST1_2#RESET◐●○
50%RST1_3GND◐●○
50%RST1_SHGND◐●○
50%R113_1GND◐●○
50%R113_2USR_LED◐●○
50%USR1_1GND◐●○
50%USR1_2USR_BUTTON◐●○
50%USR1_3GND◐●○
50%USR1_SHGND◐●○
50%REC1_1GND◐●○
50%REC1_2#RECOVERY◐●○
50%REC1_3GND◐●○
50%REC1_SHGND◐●○
50%R139_1#RESET◐●○
50%R139_2GND◐●○
17%IC15_15V0_DBG◐○○
17%U2_2Supply/3V3_VCC◐○○
17%IC15_35V0_DBG◐○○
17%L3_15V0_DBG◐○○
17%L3_2USB/USB_DBG_VBUS◐○○
17%J14_MPGND◐○○
17%C84_1Supply/VDD_5V_DCDC◐○○
17%C84_2GND◐○○
17%J15_218USR_BUTTON◐○○
17%R89_2Supply/5V_PHASE◐○○
17%J15_1GND◐○○
17%R90_2GND◐○○
17%C83_15V0_SYS◐○○
17%C83_2GND◐○○
17%C81_15V0_SYS◐○○
17%C81_2GND◐○○
17%C22_1Supply/5V_VIN◐○○
17%C22_2GND◐○○
17%C17_1Supply/5V_VIN◐○○
17%C17_2GND◐○○
17%L4_1Supply/5V_SW◐○○
17%L4_25V0_SYS◐○○
17%J8_57GND◐○○
17%D8_3GND◐○○
17%J8_21GND◐○○
17%J15_96TMDS_HPD◐○○
17%U6_19Supply/5V_SS◐○○
17%J13_4GND◐○○
17%U6_21Supply/5V_COMP◐○○
17%U6_24Supply/5V_FSW◐○○
17%U6_25Supply/5V_ILIM◐○○
17%J13_MPGND◐○○
17%U6_4Supply/5V_BOOT◐○○
17%F3_2VIN◐○○
17%D1_1GND◐○○
17%D8_8GND◐○○
17%D17_25V0_SYS◐○○
17%D17_15V0_DBG◐○○
17%C34_15V0_SYS◐○○
17%C34_2GND◐○○
17%IC5_195V0_DBG◐○○
17%J8_27GND◐○○
17%D5_3GND◐○○
17%J8_71GND◐○○
17%J8_3GND◐○○
17%J8_73GND◐○○
17%C90_15V0_SYS◐○○
17%C90_2GND◐○○
17%R133_11V8_SYS◐○○
17%J8_33GND◐○○
17%J8_75GND◐○○
17%U3_51V8_SYS◐○○
17%R73_2GND◐○○
17%J8_9GND◐○○
17%R90_1Supply/5V_FSW◐○○
17%R72_2USB/OTG_USB_VBUS◐○○
17%C62_1USB/OTG_USB_VBUS◐○○
17%C62_2GND◐○○
17%J8_SH1GND◐○○
17%R49_1USB/USBC_ID◐○○
17%J8_SH2GND◐○○
17%J8_39GND◐○○
17%C35_1USB/USBC_VBUS◐○○
17%C35_2GND◐○○
17%J3_1GND◐○○
17%R131_1USB/USBC_VBUS◐○○
17%J8_40Net-(J8-SMB_CLK)◐○○
17%R131_2GND◐○○
17%C67_15V0_DBG◐○○
17%L7_2GND◐○○
17%J4_2GND◐○○
17%C67_2GND◐○○
17%J4_3GND◐○○
17%J5_1USB/OTG_USB_VBUS◐○○
17%C60_15V0_SYS◐○○
17%C60_2GND◐○○
17%L8_1GND◐○○
17%IC2_11GND◐○○
17%IC2_135V0_SYS◐○○
17%IC2_155V0_SYS◐○○
17%IC2_2GND◐○○
17%IC2_5GND◐○○
17%T1_2GND◐○○
17%T1_3TMDS_HPD◐○○
17%R30_2GND◐○○
17%C4_2GND◐○○
17%C3_2GND◐○○
17%C1_2GND◐○○
17%C2_2GND◐○○
17%C5_11V8_SYS◐○○
17%R92_1#RESET◐○○
17%C65_11V8_SYS◐○○
17%F1_1Net-(U1-FB)◐○○
17%F2_1Net-(U5-FB)◐○○
17%IC11_51V8_SYS◐○○
17%C72_15V0_DBG◐○○
17%C58_1Supply/5V_SS◐○○
17%C58_2GND◐○○
17%R83_2GND◐○○
17%J5_5GND◐○○
17%C72_2GND◐○○
17%C56_1Supply/5V_VIN◐○○
17%D11_3GND◐○○
17%D12_3GND◐○○
17%R31_2GND◐○○
17%D10_3GND◐○○
17%J2_1GND◐○○
17%J2_13GND◐○○
17%J2_14GND◐○○
17%J2_19GND◐○○
17%J2_SHGND◐○○
17%J2_7GND◐○○
17%J2_8GND◐○○
17%R32_2GND◐○○
17%D15_1ID Serial/EEPROM_PWR◐○○
17%R132_1Net-(R132-Pad1)◐○○
17%C56_2GND◐○○
17%C57_2Supply/5V_BOOT◐○○
17%IC17_2GND◐○○
17%R96_1PWR_GOOD◐○○
17%C88_15V0_SYS◐○○
17%J15_11Net-(J15B-(CSI1_CLK)RSVD)◐○○
17%J15_118Net-(J15B-GPIO01)◐○○
17%J15_120Net-(J15B-CAM1_PWDN)◐○○
17%C88_2GND◐○○
17%C86_11V8_SYS◐○○
17%J15_9Net-(J15B-(CSI1_CLK)RSVD)◐○○
17%J11_A1GND◐○○
17%C87_1Supply/3V3_VCC◐○○
17%C87_2GND◐○○
17%C59_15V0_SYS◐○○
17%C59_2GND◐○○
17%C64_15V0_SYS◐○○
17%C64_2GND◐○○
17%U3_11V8_SYS◐○○
17%J11_A12GND◐○○
17%U3_65V0_SYS◐○○
17%U1_15V0_SYS◐○○
17%J8_42Net-(J8-SMB_DATA)◐○○
17%J11_A4USB/USBC_VBUS◐○○
17%L5_2Net-(U1-FB)◐○○
17%J8_44M2_ALERT◐○○
17%D6_3GND◐○○
17%C23_1Net-(U1-FB)◐○○
17%R39_1#RESET◐○○
17%J8_45GND◐○○
17%R46_15V0_SYS◐○○
17%J11_A9USB/USBC_VBUS◐○○
17%R69_2GND◐○○
17%J7_15V0_SYS◐○○
17%J12_1GND◐○○
17%J12_25V0_SYS◐○○
17%J11_B1GND◐○○
17%J7_25V0_SYS◐○○
17%J7_21GND◐○○
17%J7_24GND◐○○
17%J7_33GND◐○○
17%J7_36GND◐○○
17%J7_39GND◐○○
17%J7_42GND◐○○
17%R135_15V0_SYS◐○○
17%J11_B12GND◐○○
17%U5_15V0_SYS◐○○
17%D6_8GND◐○○
17%J15_94Display/TMDS_CEC◐○○
17%J11_B4USB/USBC_VBUS◐○○
17%L6_2Net-(U5-FB)◐○○
17%T8_2GND◐○○
17%J6_12GND◐○○
17%J6_15GND◐○○
17%J6_18GND◐○○
17%J6_27GND◐○○
17%J6_30GND◐○○
17%C55_1Net-(U5-FB)◐○○
17%R52_1#RESET◐○○
17%C16_15V0_SYS◐○○
17%C16_2GND◐○○
17%J6_495V0_SYS◐○○
17%J6_505V0_SYS◐○○
17%J6_9GND◐○○
17%C18_15V0_SYS◐○○
17%C18_2GND◐○○
17%BAT1_2GND◐○○
17%J8_1GND◐○○
17%J15_102GND◐○○
17%J15_107GND◐○○
17%J15_113GND◐○○
17%J15_119GND◐○○
17%J15_125GND◐○○
17%J15_129GND◐○○
17%J15_13GND◐○○
17%J15_132GND◐○○
17%J15_135GND◐○○
17%J15_138GND◐○○
17%J15_14GND◐○○
17%J15_141GND◐○○
17%J15_144GND◐○○
17%J15_146GND◐○○
17%J15_147GND◐○○
17%J15_152GND◐○○
17%J15_153GND◐○○
17%J15_158GND◐○○
17%J15_159GND◐○○
17%J15_164GND◐○○
17%J15_165GND◐○○
17%J15_170GND◐○○
17%J15_171GND◐○○
17%J15_176GND◐○○
17%J15_177GND◐○○
17%J15_19GND◐○○
17%J15_2GND◐○○
17%J15_20GND◐○○
17%J15_200GND◐○○
17%J15_201GND◐○○
17%J15_208FAN_TACH◐○○
17%J15_214#RECOVERY◐○○
17%J15_217GND◐○○
17%J15_230FAN_PWM◐○○
17%J15_231GND◐○○
17%J15_233#SHUTDOWN_REQ◐○○
17%J15_237PWR_EN◐○○
17%J15_239#RESET◐○○
17%J15_240#PWR_BUTTON◐○○
17%J15_241GND◐○○
17%J15_242GND◐○○
17%J15_243GND◐○○
17%J15_244GND◐○○
17%J15_245GND◐○○
17%J15_246GND◐○○
17%J15_247GND◐○○
17%J15_248GND◐○○
17%J15_249GND◐○○
17%J15_25GND◐○○
17%J15_250GND◐○○
17%J15_251VDD_MOD◐○○
17%J15_252VDD_MOD◐○○
17%J15_253VDD_MOD◐○○
17%J15_254VDD_MOD◐○○
17%J15_255VDD_MOD◐○○
17%J15_256VDD_MOD◐○○
17%J15_257VDD_MOD◐○○
17%J15_258VDD_MOD◐○○
17%J15_259VDD_MOD◐○○
17%J15_26GND◐○○
17%J15_260VDD_MOD◐○○
17%J15_206USR_LED◐○○
17%J15_262GND◐○○
17%J15_31GND◐○○
17%J15_32GND◐○○
17%J15_37GND◐○○
17%J15_38GND◐○○
17%J15_43GND◐○○
17%J15_44GND◐○○
17%J15_49GND◐○○
17%J15_50GND◐○○
17%J15_55GND◐○○
17%J15_56GND◐○○
17%J15_61GND◐○○
17%J15_62GND◐○○
17%J15_67GND◐○○
17%J15_68GND◐○○
17%J15_7GND◐○○
17%J15_73GND◐○○
17%J15_74GND◐○○
17%J15_79GND◐○○
17%J15_8GND◐○○
17%J15_80GND◐○○
17%J15_85GND◐○○
17%J15_86GND◐○○
17%T3_11V8_SYS◐○○
17%T3_2FAN_TACH◐○○
17%J11_B8Net-(J11-SBU2)◐○○
17%J11_B9USB/USBC_VBUS◐○○
17%J11_SHGND◐○○
17%IC4_15V0_SYS◐○○
17%J9_1USB/USB_DBG_VBUS◐○○
17%D7_3GND◐○○
17%T2_1#RESET◐○○
17%T2_2GND◐○○
17%T4_1PWR_GOOD◐○○
17%T4_2GND◐○○
17%T5_1USR_LED◐○○
17%T5_2GND◐○○
17%C11_1VDD_MOD◐○○
17%C11_2GND◐○○
17%C10_1VDD_MOD◐○○
17%C10_2GND◐○○
17%IC4_51V8_SYS◐○○
17%J14_1GND◐○○
17%R14_15V0_SYS◐○○
17%R97_15V0_SYS◐○○
17%R111_15V0_SYS◐○○
17%R44_1#RESET◐○○
17%J15_212M2_ALERT◐○○
17%J9_5GND◐○○
17%J9_SHGND◐○○
17%J8_51GND◐○○
17%T6_2GND◐○○
17%C71_15V0_SYS◐○○
17%C71_2GND◐○○
17%C14_2GND◐○○
17%C32_15V0_SYS◐○○
17%C32_2GND◐○○
17%R76_1Supply/VDD_5V_DCDC◐○○
17%R76_2Supply/5V_ILIM◐○○
17%D7_8GND◐○○
17%J10_10GND◐○○
17%J8_15GND◐○○
17%D3_3GND◐○○
17%J15_261GND◐○○
0%IC3_4Net-(IC3-FAULT)○○○
0%IC3_5Net-(IC3-ILIM)○○○
0%IC3_6Net-(IC3-OUT)○○○
0%R138_1Net-(IC3-ILIM)○○○
0%R133_2OTG_USB_ID_DET○○○
0%R134_2USB/OTG_USB_ID○○○
0%T9_1USB/OTG_USB_ID○○○
0%T9_2Net-(T6-D)○○○
0%T9_3OTG_USB_VBUS_DET○○○
0%R49_2Net-(IC3-EN)○○○
0%U8_1○○○
0%U8_2USB/OTG_USB_ID○○○
0%U8_4OTG_USB_ID_DET○○○
0%IC1_3USB/OTG_USB_ID○○○
0%IC1_4USB/OTG_USB_FAULT○○○
0%IC1_5Net-(IC1-ILIM)○○○
0%IC1_6Net-(IC1-OUT)○○○
0%R50_1Net-(IC1-ILIM)○○○
0%R135_2Net-(LED2-A)○○○
0%NVME1_1Net-(J8-LED)○○○
0%NVME1_2Net-(NVME1-A)○○○
0%J8_10Net-(J8-LED)○○○
0%J8_11Interfaces/C_PCIE0_TX3_N○○○
0%J8_123V3_SYS○○○
0%J8_13Interfaces/C_PCIE0_TX3_P○○○
0%J8_143V3_SYS○○○
0%J8_163V3_SYS○○○
0%J8_17PCIE0_RX2_N○○○
0%J8_183V3_SYS○○○
0%J8_19PCIE0_RX2_P○○○
0%J8_23V3_SYS○○○
0%J8_20○○○
0%J8_22○○○
0%J8_23Interfaces/C_PCIE0_TX2_N○○○
0%J8_24○○○
0%J8_25Interfaces/C_PCIE0_TX2_P○○○
0%J8_26○○○
0%J8_28○○○
0%J8_29PCIE0_RX1_N○○○
0%J8_30○○○
0%J8_31PCIE0_RX1_P○○○
0%J8_32○○○
0%J8_34○○○
0%J8_35Interfaces/C_PCIE0_TX1_N○○○
0%J8_36○○○
0%J8_37Interfaces/C_PCIE0_TX1_P○○○
0%J8_38○○○
0%J8_43V3_SYS○○○
0%J8_41PCIE0_RX0_N○○○
0%J8_43PCIE0_RX0_P○○○
0%J8_46○○○
0%J8_47Interfaces/C_PCIE0_TX0_N○○○
0%J8_48○○○
0%J8_49Interfaces/C_PCIE0_TX0_P○○○
0%J8_5PCIE0_RX3_N○○○
0%J8_50PEX_L0_RST_N○○○
0%J8_52PEX_L0_CLKREQ_N○○○
0%J8_53PCIE0_CLK_N○○○
0%J8_54\PEWAKE_3V3○○○
0%J8_55PCIE0_CLK_P○○○
0%J8_56○○○
0%J8_58○○○
0%J8_6○○○
0%J8_67○○○
0%J8_68○○○
0%J8_69○○○
0%J8_7PCIE0_RX3_P○○○
0%J8_703V3_SYS○○○
0%J8_723V3_SYS○○○
0%J8_743V3_SYS○○○
0%J8_8○○○
0%J3_10ENET_TRD3_N○○○
0%J3_11ENET_LED1○○○
0%J3_12Net-(J3-Pad12)○○○
0%J3_13ENET_LED0○○○
0%J3_14Net-(J3-Pad14)○○○
0%J3_2ENET_TRD0_P○○○
0%J3_3ENET_TRD0_N○○○
0%J3_4ENET_TRD1_P○○○
0%J3_5ENET_TRD1_N○○○
0%J3_6○○○
0%J3_7ENET_TRD2_P○○○
0%J3_8ENET_TRD2_N○○○
0%J3_9ENET_TRD3_P○○○
0%J3_SEGND○○○
0%R115_13V3_SYS○○○
0%R115_2PEX_L0_CLKREQ_N○○○
0%R116_13V3_SYS○○○
0%R116_2PEX_L0_RST_N○○○
0%R128_13V3_SYS○○○
0%R128_2Net-(NVME1-A)○○○
0%C47_13V3_SYS○○○
0%C46_13V3_SYS○○○
0%R38_13V3_SYS○○○
0%R38_2Net-(J3-Pad12)○○○
0%R40_13V3_SYS○○○
0%R40_2Net-(J3-Pad14)○○○
0%C14_1EGND○○○
0%C37_1Interfaces/C_PCIE0_TX0_P○○○
0%C37_2PCIE0_TX0_P○○○
0%C49_1Interfaces/C_PCIE0_TX1_P○○○
0%C49_2PCIE0_TX1_P○○○
0%C52_1Interfaces/C_PCIE0_TX2_P○○○
0%C52_2PCIE0_TX2_P○○○
0%C69_1Interfaces/C_PCIE0_TX3_P○○○
0%C69_2PCIE0_TX3_P○○○
0%C38_1Interfaces/C_PCIE0_TX0_N○○○
0%C38_2PCIE0_TX0_N○○○
0%C51_1Interfaces/C_PCIE0_TX1_N○○○
0%C51_2PCIE0_TX1_N○○○
0%C68_1Interfaces/C_PCIE0_TX2_N○○○
0%C68_2PCIE0_TX2_N○○○
0%C70_1Interfaces/C_PCIE0_TX3_N○○○
0%C70_2PCIE0_TX3_N○○○
0%J14_2Net-(F5-Pad2)○○○
0%J13_1Net-(F4-Pad2)○○○
0%J13_2Interfaces/CANH○○○
0%J13_3Interfaces/CANL○○○
0%R123_1Interfaces/CANH○○○
0%R123_2Interfaces/CANL○○○
0%R71_1CAN_TXD○○○
0%R71_2Net-(U7-TXD)○○○
0%R121_1Net-(U7-RH)○○○
0%F4_13V3_SYS○○○
0%F4_2Net-(F4-Pad2)○○○
0%U7_1Net-(U7-TXD)○○○
0%U7_33V3_SYS○○○
0%U7_4Net-(U7-RXD)○○○
0%U7_5○○○
0%U7_6Interfaces/CANL○○○
0%U7_7Interfaces/CANH○○○
0%U7_8Net-(U7-RH)○○○
0%F5_13V3_SYS○○○
0%F5_2Net-(F5-Pad2)○○○
0%R101_1CAN_RXD○○○
0%R101_2Net-(U7-RXD)○○○
0%C13_13V3_SYS○○○
0%IC6_13V3_SYS○○○
0%IC6_2Net-(IC6-SCLA)○○○
0%IC6_3Net-(IC6-SDAA)○○○
0%IC6_5HDMI_PWR○○○
0%IC6_6Display/TMDS_SDA_5V0○○○
0%IC6_7Display/TMDS_SCL_5V0○○○
0%IC6_8HDMI_PWR○○○
0%J15_210○○○
0%J15_39Display/EDP0_TX_N○○○
0%J15_41Display/EDP0_TX_P○○○
0%J15_45Display/EDP1_TX_N○○○
0%J15_47Display/EDP1_TX_P○○○
0%J15_51Display/EDP2_TX_N○○○
0%J15_53Display/EDP2_TX_P○○○
0%J15_57Display/EDP3_TX_N○○○
0%J15_59Display/EDP3_TX_P○○○
0%J15_63Display/TMDS_D2_N○○○
0%J15_65Display/TMDS_D2_P○○○
0%J15_69Display/TMDS_D1_N○○○
0%J15_71Display/TMDS_D1_P○○○
0%J15_75Display/TMDS_D0_N○○○
0%J15_77Display/TMDS_D0_P○○○
0%J15_81Display/TMDS_CLK_N○○○
0%J15_83Display/TMDS_CLK_P○○○
0%J15_87OTG_USB_VBUS_DET○○○
0%J15_88Display/DP_HPD○○○
0%J15_90Display/EDP_AUX_N○○○
0%J15_92Display/EDP_AUX_P○○○
0%L10_13V3_SYS○○○
0%IC12_1Supply/\PWR_SET○○○
0%IC18_1Display/TMDS_C1_D2_P○○○
0%IC18_10Display/TMDS_C1_CLK_P○○○
0%IC12_10Net-(IC12-3B)○○○
0%IC18_12Display/TMDS_C1_CLK_N○○○
0%IC18_13HDMI_PWR○○○
0%IC18_14○○○
0%IC18_15HDMI_PWR○○○
0%IC12_11Net-(IC12-3B)○○○
0%IC18_3Display/TMDS_C1_D2_N○○○
0%IC18_4Display/TMDS_C1_D1_P○○○
0%IC12_12Supply/QDEL○○○
0%IC18_6Display/TMDS_C1_D1_N○○○
0%IC18_7Display/TMDS_C1_D0_P○○○
0%IC18_8GND○○○
0%IC18_9Display/TMDS_C1_D0_N○○○
0%IC12_13Supply/QDEL○○○
0%L9_2HDMI_PWR○○○
0%IC12_2Net-(IC12-1B)○○○
0%L8_2HDMI_SHIELD○○○
0%IC2_1Display/ML_C_LANE0_P○○○
0%IC2_10Display/ML_C_LANE3_P○○○
0%IC12_3Supply/Q○○○
0%IC2_12Display/ML_C_LANE3_N○○○
0%IC12_5Supply/Q○○○
0%IC2_14○○○
0%IC12_6Net-(IC12-1B)○○○
0%IC12_8Net-(IC12-3Y)○○○
0%IC2_3Display/ML_C_LANE0_N○○○
0%IC2_4Display/ML_C_LANE1_P○○○
0%IC12_9Net-(IC12-3B)○○○
0%IC2_6Display/ML_C_LANE1_N○○○
0%IC2_7Display/ML_C_LANE2_P○○○
0%IC2_8GND○○○
0%IC2_9Display/ML_C_LANE2_N○○○
0%D2_1Net-(D2-C)○○○
0%D2_2DP_PWR○○○
0%D4_1Net-(D4-C)○○○
0%D4_2HDMI_PWR○○○
0%T1_1Net-(T1-G)○○○
0%J4_1Net-(F3-Pad1)○○○
0%IC13_2Supply/QDEL○○○
0%C73_1Display/TMDS_D2_P○○○
0%C73_2Display/TMDS_C1_D2_P○○○
0%C75_1Display/TMDS_D1_P○○○
0%C75_2Display/TMDS_C1_D1_P○○○
0%C76_1Display/TMDS_D0_P○○○
0%C76_2Display/TMDS_C1_D0_P○○○
0%C78_1Display/TMDS_CLK_P○○○
0%C78_2Display/TMDS_C1_CLK_P○○○
0%C74_1Display/TMDS_D2_N○○○
0%C74_2Display/TMDS_C1_D2_N○○○
0%C77_1Display/TMDS_D1_N○○○
0%C77_2Display/TMDS_C1_D1_N○○○
0%C79_1Display/TMDS_D0_N○○○
0%C79_2Display/TMDS_C1_D0_N○○○
0%C80_1Display/TMDS_CLK_N○○○
0%C80_2Display/TMDS_C1_CLK_N○○○
0%C39_1Display/EDP0_TX_P○○○
0%C39_2Display/ML_C_LANE0_P○○○
0%C42_1Display/EDP1_TX_P○○○
0%C42_2Display/ML_C_LANE1_P○○○
0%C6_1Display/EDP2_TX_P○○○
0%C6_2Display/ML_C_LANE2_P○○○
0%C8_1Display/EDP3_TX_P○○○
0%C8_2Display/ML_C_LANE3_P○○○
0%C44_1Display/EDP_AUX_P○○○
0%C44_2Display/EDP_C_AUX_C_P○○○
0%C40_1Display/EDP0_TX_N○○○
0%C40_2Display/ML_C_LANE0_N○○○
0%C43_1Display/EDP1_TX_N○○○
0%C43_2Display/ML_C_LANE1_N○○○
0%C7_1Display/EDP2_TX_N○○○
0%C7_2Display/ML_C_LANE2_N○○○
0%C12_1Display/EDP3_TX_N○○○
0%C12_2Display/ML_C_LANE3_N○○○
0%C45_1Display/EDP_AUX_N○○○
0%C45_2Display/EDP_C_AUX_C_N○○○
0%R30_1Display/EDP_C_AUX_C_P○○○
0%R92_2Net-(IC4-EN)○○○
0%C4_1Net-(D2-C)○○○
0%F1_23V3_FFC1○○○
0%C3_1Net-(D2-C)○○○
0%F2_23V3_FFC2○○○
0%R1_1Display/TMDS_C1_D2_P○○○
0%R1_2Display/TMDS_D2_C_P○○○
0%R2_1Display/TMDS_C1_D2_N○○○
0%R2_2Display/TMDS_D2_C_N○○○
0%R3_1Display/TMDS_C1_D1_P○○○
0%R3_2Display/TMDS_D1_C_P○○○
0%R4_1Display/TMDS_C1_D1_N○○○
0%R4_2Display/TMDS_D1_C_N○○○
0%R7_1Display/TMDS_C1_D0_P○○○
0%R7_2Display/TMDS_D0_C_P○○○
0%R8_1Display/TMDS_C1_D0_N○○○
0%R8_2Display/TMDS_D0_C_N○○○
0%R9_1Display/TMDS_C1_CLK_P○○○
0%R9_2Display/TMDS_CLK_C_P○○○
0%R10_1Display/TMDS_C1_CLK_N○○○
0%R10_2Display/TMDS_CLK_C_N○○○
0%C1_1Net-(D4-C)○○○
0%R74_1Supply/5V_MODE○○○
0%C2_1Net-(D4-C)○○○
0%C20_13V3_SYS○○○
0%C57_1Net-(C57-Pad1)○○○
0%R48_13V3_SYS○○○
0%R100_1Display/DP_HPD_IN○○○
0%R48_2Supply/3V3_FB○○○
0%C89_1Supply/3V3_SW○○○
0%IC11_2Display/DP_HPD_IN○○○
0%C89_2Supply/3V3_R_C_BOOT○○○
0%IC11_4Display/DP_HPD○○○
0%U3_4Supply/FAN_PMW_5V○○○
0%C26_13V3_SYS○○○
0%U1_3Net-(U1-EN)○○○
0%J1_1Display/TMDS_HPD_IN○○○
0%J1_10HDMI_SHIELD○○○
0%J1_11Display/TMDS_D0_C_N○○○
0%J1_12Display/TMDS_CLK_C_P○○○
0%J1_13HDMI_SHIELD○○○
0%J1_14Display/TMDS_CLK_C_N○○○
0%J1_15Display/TMDS_CEC_IN○○○
0%J1_16Net-(J1-GND)○○○
0%J1_17Display/TMDS_SCL_5V0○○○
0%J1_18Display/TMDS_SDA_5V0○○○
0%J1_19Net-(D4-C)○○○
0%J1_2○○○
0%J1_3Display/TMDS_D2_C_P○○○
0%J1_4HDMI_SHIELD○○○
0%J1_5Display/TMDS_D2_C_N○○○
0%J1_6Display/TMDS_D1_C_P○○○
0%J1_7HDMI_SHIELD○○○
0%J1_8Display/TMDS_D1_C_N○○○
0%J1_9Display/TMDS_D0_C_P○○○
0%J1_SHHDMI_SHIELD○○○
0%U1_5Net-(U1-SW)○○○
0%L5_1Net-(U1-SW)○○○
0%R83_1Net-(T1-G)○○○
0%R117_2Supply/5V_FB○○○
0%R26_1Display/EDP_C_AUX_C_N○○○
0%R26_2DP_PWR○○○
0%R82_1Net-(T1-G)○○○
0%R82_2Display/TMDS_HPD_IN○○○
0%C27_1HDMI_PWR○○○
0%R120_1Supply/5V_FB○○○
0%R39_2Net-(U1-EN)○○○
0%R98_2Net-(IC6-SCLA)○○○
0%R46_2Supply/FAN_TACH_5V○○○
0%R99_2Net-(IC6-SDAA)○○○
0%R11_13V3_SYS○○○
0%R11_2Net-(IC6-SDAA)○○○
0%R81_13V3_SYS○○○
0%R81_2Net-(IC6-SCLA)○○○
0%R5_1HDMI_PWR○○○
0%R5_2Display/TMDS_SCL_5V0○○○
0%R6_1HDMI_PWR○○○
0%R6_2Display/TMDS_SDA_5V0○○○
0%D11_1Display/TMDS_HPD_IN○○○
0%D11_2Display/TMDS_CEC_IN○○○
0%FB3_2Supply/3V3_VIN○○○
0%D12_1○○○
0%D12_2Display/DP_HPD_IN○○○
0%J12_3Supply/FAN_TACH_5V○○○
0%R31_1Display/DP_MODE○○○
0%J12_4Supply/FAN_PMW_5V○○○
0%D10_1Display/TMDS_SCL_5V0○○○
0%D10_2Display/TMDS_SDA_5V0○○○
0%J12_MP1○○○
0%J12_MP2○○○
0%J2_10Display/ML_C_LANE3_P○○○
0%J2_11Display/ML_C_LANE1_N○○○
0%J2_12Display/ML_C_LANE3_N○○○
0%U5_3Net-(U5-EN)○○○
0%U5_5Net-(U5-SW)○○○
0%J2_15Display/ML_C_LANE2_P○○○
0%J2_16Display/EDP_C_AUX_C_P○○○
0%J2_17Display/ML_C_LANE2_N○○○
0%J2_18Display/EDP_C_AUX_C_N○○○
0%L6_1Net-(U5-SW)○○○
0%J2_2Display/DP_HPD_IN○○○
0%J2_20Net-(D2-C)○○○
0%R52_2Net-(U5-EN)○○○
0%J2_3Display/ML_C_LANE0_P○○○
0%J2_4Display/DP_MODE○○○
0%J2_5Display/ML_C_LANE0_N○○○
0%J2_6Display/DP_CEC○○○
0%D13_1Supply/Q○○○
0%D13_2Supply/QDEL○○○
0%J2_9Display/ML_C_LANE1_P○○○
0%R32_1Display/DP_CEC○○○
0%T3_3Supply/FAN_TACH_5V○○○
0%D15_23V3_SYS○○○
0%R36_2Supply/Q○○○
0%R16_2Net-(IC12-1B)○○○
0%R132_2ID Serial/SN_WP○○○
0%C36_13V3_SYS○○○
0%IC4_3Net-(IC4-EN)○○○
0%IC4_4○○○
0%R84_2Supply/\PWR_SET○○○
0%R44_2Supply/3V3_EN○○○
0%C41_1Supply/\PWR_SET○○○
0%IC17_5ID Serial/SN_WP○○○
0%J15_10CSI/CSI_A_CLK_N○○○
0%R85_1Supply/Q○○○
0%J15_114VSYNC_CAM2_1○○○
0%J15_116○○○
0%R85_2Supply/QDEL○○○
0%J15_12CSI/CSI_A_CLK_P○○○
0%C63_1Supply/QDEL○○○
0%J15_122○○○
0%J15_15CSI/CSI_B_D1_N○○○
0%J15_16CSI/CSI_A_D1_N○○○
0%J15_17CSI/CSI_B_D1_P○○○
0%J15_18CSI/CSI_A_D1_P○○○
0%J15_21CSI/CSI_F_D0_N○○○
0%L1_1Supply/3V3_SW○○○
0%L1_23V3_SYS○○○
0%J15_22CSI/CSI_E_D0_N○○○
0%J15_23CSI/CSI_F_D0_P○○○
0%J15_24CSI/CSI_E_D0_P○○○
0%J15_27○○○
0%J15_28CSI/CSI_E_CLK_N○○○
0%J15_29○○○
0%J15_3CSI/CSI_B_D0_N○○○
0%J15_30CSI/CSI_E_CLK_P○○○
0%J15_33CSI/CSI_F_D1_N○○○
0%J15_34CSI/CSI_E_D1_N○○○
0%J15_35CSI/CSI_F_D1_P○○○
0%J15_36CSI/CSI_E_D1_P○○○
0%J15_4CSI/CSI_A_D0_N○○○
0%J15_40CSI/CSI_D_D0_N○○○
0%J15_42CSI/CSI_D_D0_P○○○
0%J15_46CSI/CSI_C_D0_N○○○
0%J15_48CSI/CSI_C_D0_P○○○
0%J15_5CSI/CSI_B_D0_P○○○
0%J15_52CSI/CSI_C_CLK_N○○○
0%J15_54CSI/CSI_C_CLK_P○○○
0%J15_58CSI/CSI_C_D1_N○○○
0%J15_6CSI/CSI_A_D0_P○○○
0%J15_60CSI/CSI_C_D1_P○○○
0%J15_64CSI/CSI_D_D1_N○○○
0%J15_66CSI/CSI_D_D1_P○○○
0%J15_70CSI/CSI_G_D0_N○○○
0%J15_72CSI/CSI_G_D0_P○○○
0%J15_76CSI/CSI_G_CLK_N○○○
0%J15_78CSI/CSI_G_CLK_P○○○
0%J15_82CSI/CSI_G_D1_N○○○
0%J15_84CSI/CSI_G_D1_P○○○
0%R93_1Net-(U6-VSNS)○○○
0%R13_1Net-(U4-SD0)○○○
0%U2_13V3_SYS○○○
0%R15_1Net-(U4-SC0)○○○
0%U2_10Supply/3V3_SW○○○
0%R17_1Net-(U4-SD1)○○○
0%U2_12Supply/3V3_VIN○○○
0%R21_1Net-(U4-SC1)○○○
0%U2_13Net-(U2-RBOOT)○○○
0%R19_1Net-(U4-SD2)○○○
0%U2_14Supply/3V3_R_C_BOOT○○○
0%R58_1Net-(U4-SC2)○○○
0%U2_4Supply/3V3_FB○○○
0%R59_1Net-(U4-SD3)○○○
0%U2_5○○○
0%R61_1Net-(U4-SC3)○○○
0%U2_7Supply/3V3_EN○○○
0%U2_8Supply/3V3_VIN○○○
0%R57_2Net-(U4-SDA)○○○
0%C25_13V3_SYS○○○
0%R60_2Net-(U4-SCL)○○○
0%R78_13V3_FFC1○○○
0%R78_2Net-(R18-Pad1)○○○
0%R80_13V3_FFC2○○○
0%R80_2Net-(R27-Pad1)○○○
0%R29_1Net-(R27-Pad1)○○○
0%C19_1Supply/3V3_VIN○○○
0%R33_1Net-(R27-Pad1)○○○
0%C21_1Supply/3V3_VIN○○○
0%R28_1Net-(R27-Pad1)○○○
0%C85_1Supply/VDRV_5V_DCDC○○○
0%R27_1Net-(R27-Pad1)○○○
0%R89_1Net-(C57-Pad1)○○○
0%R25_1Net-(R18-Pad1)○○○
0%R70_1Net-(U2-RBOOT)○○○
0%R24_1Net-(R18-Pad1)○○○
0%R70_2Supply/3V3_R_C_BOOT○○○
0%R22_1Net-(R18-Pad1)○○○
0%U6_15○○○
0%R18_1Net-(R18-Pad1)○○○
0%U6_16Supply/VDRV_5V_DCDC○○○
0%R35_13V3_SYS○○○
0%U6_18○○○
0%R34_13V3_SYS○○○
0%U6_20Net-(U6-VSNS)○○○
0%C9_13V3_SYS○○○
0%U6_22Supply/5V_FB○○○
0%R122_13V3_SYS○○○
0%R122_2Net-(T8-D)○○○
0%R69_1I2C_MUX_RESET○○○
0%U6_27Supply/5V_MODE○○○
0%F3_1Net-(F3-Pad1)○○○
0%D1_23V3_SYS○○○
0%C31_1Net-(IC3-OUT)○○○
0%IC5_11V8_DBG○○○
0%J7_13○○○
0%J7_14○○○
0%J7_15○○○
0%J7_16○○○
0%J7_17VSYNC_CAM2_2○○○
0%J7_18○○○
0%J7_19VSYNC_CAM2_1○○○
0%IC5_10○○○
0%J7_20○○○
0%IC5_11○○○
0%J7_22CSI/CSI_A_CLK_P○○○
0%J7_23CSI/CSI_A_CLK_N○○○
0%IC5_12○○○
0%J7_25CSI/CSI_A_D0_P○○○
0%J7_26CSI/CSI_A_D0_N○○○
0%J7_27CSI/CSI_A_D1_P○○○
0%J7_28CSI/CSI_A_D1_N○○○
0%J7_29CSI/CSI_B_D0_P○○○
0%J7_33V3_FFC2○○○
0%J7_30CSI/CSI_B_D0_N○○○
0%J7_31CSI/CSI_B_D1_P○○○
0%J7_32CSI/CSI_B_D1_N○○○
0%IC5_13○○○
0%J7_34○○○
0%J7_35○○○
0%IC5_14USB/DBG_USB_D_P○○○
0%J7_37○○○
0%J7_38○○○
0%IC5_15USB/DBG_USB_D_N○○○
0%J7_43V3_FFC2○○○
0%J7_40CSI/CSI_C_CLK_P○○○
0%J7_41CSI/CSI_C_CLK_N○○○
0%IC5_16Net-(IC5-3V3OUT)○○○
0%J7_43CSI/CSI_C_D0_P○○○
0%J7_44CSI/CSI_C_D0_N○○○
0%J7_45CSI/CSI_C_D1_P○○○
0%J7_46CSI/CSI_C_D1_N○○○
0%J7_47CSI/CSI_D_D0_P○○○
0%J7_48CSI/CSI_D_D0_N○○○
0%IC5_18○○○
0%J7_5○○○
0%J7_50CSI/CSI_D_D1_N○○○
0%J7_6○○○
0%J7_7○○○
0%J7_8○○○
0%IC5_2Net-(IC5-RXD)○○○
0%J7_MP1○○○
0%J7_MP2○○○
0%U4_1Net-(U4-SD0)○○○
0%U4_10○○○
0%U4_11○○○
0%U4_12○○○
0%U4_13○○○
0%U4_14○○○
0%U4_15○○○
0%U4_16○○○
0%U4_17○○○
0%IC5_21○○○
0%U4_19Net-(U4-SCL)○○○
0%U4_2Net-(U4-SC0)○○○
0%U4_20Net-(U4-SDA)○○○
0%U4_213V3_SYS○○○
0%IC5_22○○○
0%IC5_23○○○
0%U4_24Net-(T8-D)○○○
0%IC5_25○○○
0%U4_3Net-(U4-SD1)○○○
0%U4_4Net-(U4-SC1)○○○
0%U4_5Net-(U4-SD2)○○○
0%U4_6Net-(U4-SC2)○○○
0%U4_7Net-(U4-SD3)○○○
0%U4_8Net-(U4-SC3)○○○
0%IC5_27○○○
0%T8_1I2C_MUX_RESET○○○
0%IC5_28○○○
0%T8_3Net-(T8-D)○○○
0%J6_1○○○
0%J6_10CSI/CSI_G_CLK_N○○○
0%J6_11CSI/CSI_G_CLK_P○○○
0%IC5_29○○○
0%J6_13○○○
0%J6_14○○○
0%IC5_3○○○
0%J6_16○○○
0%J6_17○○○
0%IC5_30Net-(IC5-TXD)○○○
0%J6_19CSI/CSI_F_D1_N○○○
0%J6_2○○○
0%J6_20CSI/CSI_F_D1_P○○○
0%J6_21CSI/CSI_F_D0_N○○○
0%J6_22CSI/CSI_F_D0_P○○○
0%J6_23CSI/CSI_E_D1_N○○○
0%J6_24CSI/CSI_E_D1_P○○○
0%J6_25CSI/CSI_E_D0_N○○○
0%J6_26CSI/CSI_E_D0_P○○○
0%IC5_31○○○
0%J6_28CSI/CSI_E_CLK_N○○○
0%J6_29CSI/CSI_E_CLK_P○○○
0%J6_3○○○
0%IC5_32○○○
0%J6_31○○○
0%J6_32VSYNC_CAM1_1○○○
0%J6_33○○○
0%J6_34VSYNC_CAM1_2○○○
0%J6_35○○○
0%J6_36○○○
0%J6_37○○○
0%J6_38○○○
0%IC5_5○○○
0%J6_4○○○
0%IC5_6○○○
0%IC5_7○○○
0%IC5_8○○○
0%J6_43○○○
0%J6_44○○○
0%J6_45○○○
0%J6_46○○○
0%J6_473V3_FFC1○○○
0%J6_483V3_FFC1○○○
0%IC5_9○○○
0%J6_5CSI/CSI_G_D1_N○○○
0%IC7_1USB/CC2○○○
0%J6_6CSI/CSI_G_D1_P○○○
0%J6_7CSI/CSI_G_D0_N○○○
0%J6_8CSI/CSI_G_D0_P○○○
0%IC7_10USB/C_USBSS_RX6_N○○○
0%J6_MP2○○○
0%J6_MP1○○○
0%IC7_11Net-(IC7-DIR)○○○
0%IC7_12USB/EN_MUX○○○
0%BAT1_1SoM/PMIC_BBAT○○○
0%IC7_14USB/USBSS_RX1_N○○○
0%IC7_15USB/USBSS_RX1_P○○○
0%USER1_1Net-(T5-D)○○○
0%USER1_2Net-(USER1-A)○○○
0%J15_124○○○
0%J15_126○○○
0%J15_127I2C_MUX_RESET○○○
0%J15_128OTG_USB_ID_DET○○○
0%J15_130VSYNC_CAM2_2○○○
0%J15_143CAN_RXD○○○
0%J15_145CAN_TXD○○○
0%J15_178○○○
0%J15_184ENET_TRD0_N○○○
0%J15_186ENET_TRD0_P○○○
0%J15_188ENET_LED1○○○
0%J15_190ENET_TRD1_N○○○
0%J15_192ENET_TRD1_P○○○
0%J15_193○○○
0%J15_194ENET_LED0○○○
0%J15_195○○○
0%J15_196ENET_TRD2_N○○○
0%J15_197○○○
0%J15_198ENET_TRD2_P○○○
0%J15_199○○○
0%J15_202ENET_TRD3_N○○○
0%J15_204ENET_TRD3_P○○○
0%J15_211○○○
0%J15_216VSYNC_CAM1_2○○○
0%J15_219○○○
0%J15_220○○○
0%J15_221○○○
0%J15_222○○○
0%J15_223○○○
0%J15_224○○○
0%J15_225○○○
0%J15_226○○○
0%J15_227○○○
0%J15_228VSYNC_CAM1_1○○○
0%J15_229○○○
0%J15_131PCIE0_RX0_N○○○
0%J15_133PCIE0_RX0_P○○○
0%J15_134PCIE0_TX0_N○○○
0%J15_136PCIE0_TX0_P○○○
0%J15_137PCIE0_RX1_N○○○
0%J15_139PCIE0_RX1_P○○○
0%J15_140PCIE0_TX1_N○○○
0%J15_142PCIE0_TX1_P○○○
0%J15_148PCIE0_TX2_N○○○
0%J15_149PCIE0_RX2_N○○○
0%J15_150PCIE0_TX2_P○○○
0%J15_151PCIE0_RX2_P○○○
0%J15_154PCIE0_TX3_N○○○
0%J15_155PCIE0_RX3_N○○○
0%J15_156PCIE0_TX3_P○○○
0%J15_157PCIE0_RX3_P○○○
0%J15_160PCIE0_CLK_N○○○
0%J15_161USBSS_RX6_N○○○
0%J15_162PCIE0_CLK_P○○○
0%J15_163USBSS_RX6_P○○○
0%J15_166USBSS_TX6_N○○○
0%J15_167PCIE1_RX0_N○○○
0%J15_168USBSS_TX6_P○○○
0%J15_169PCIE1_RX0_P○○○
0%J15_172PCIE1_TX0_N○○○
0%J15_173PCIE1_CLK_N○○○
0%J15_174PCIE1_TX0_P○○○
0%J15_175PCIE1_CLK_P○○○
0%J15_179\PEWAKE_3V3○○○
0%J15_180PEX_L0_CLKREQ_N○○○
0%J15_181PEX_L0_RST_N○○○
0%J15_182PCIE1_CLKREQ○○○
0%J15_183PCIE1_RST○○○
0%J15_109OTG_USB_D_N○○○
0%J15_111OTG_USB_D_P○○○
0%J15_115USB1_D_N○○○
0%J15_117USB1_D_P○○○
0%J15_121○○○
0%J15_123○○○
0%L10_2DP_PWR○○○
0%IC7_16USB/USBSS_TX1_N○○○
0%IC7_17USB/USBSS_TX1_P○○○
0%IC7_18USB/USBSS_RX2_N○○○
0%IC7_19USB/USBSS_RX2_P○○○
0%IC7_2USB/CC1○○○
0%IC7_20USB/USBSS_TX2_N○○○
0%IC7_21USB/USBSS_TX2_P○○○
0%IC7_23USB/USBC_INTN○○○
0%IC7_25USB/USBC_SDA○○○
0%IC7_26USB/USBC_SCL○○○
0%IC7_29Net-(IC7-ENn_CC)○○○
0%IC7_3Net-(IC7-CURRENT_MODE)○○○
0%IC7_4Net-(IC7-PORT)○○○
0%IC7_5Net-(IC7-VBUS_DET)○○○
0%IC7_6USB/C_USBSS_TX6_P○○○
0%IC7_7USB/C_USBSS_TX6_N○○○
0%IC7_83V3_SYS○○○
0%IC7_9USB/C_USBSS_RX6_P○○○
0%L7_1Net-(J5-SHIELD)○○○
0%J5_2OTG_USB_D_N○○○
0%J5_3OTG_USB_D_P○○○
0%J5_4USB/OTG_USB_ID○○○
0%J5_SHNet-(J5-SHIELD)○○○
0%LED1_1Net-(IC3-FAULT)○○○
0%LED1_2Net-(IC3-FAULT)○○○
0%J11_A10USB/C_USBSS_RX2_N○○○
0%J11_A11USB/C_USBSS_RX2_P○○○
0%J11_A2USB/C_USBSS_TX1_P○○○
0%J11_A3USB/C_USBSS_TX1_N○○○
0%J11_A5USB/C_CC1○○○
0%J11_A6USB1_D_P○○○
0%J11_A7USB1_D_N○○○
0%J11_A8○○○
0%J11_B10USB/C_USBSS_RX1_N○○○
0%J11_B11USB/C_USBSS_RX1_P○○○
0%J11_B2USB/C_USBSS_TX2_P○○○
0%J15_235SoM/PMIC_BBAT○○○
0%J11_B3USB/C_USBSS_TX2_N○○○
0%J11_B5USB/C_CC2○○○
0%J11_B6USB1_D_P○○○
0%J11_B7USB1_D_N○○○
0%J9_2USB/DBG_USB_D_N○○○
0%J9_3USB/DBG_USB_D_P○○○
0%J9_4○○○
0%T6_1Net-(T6-G)○○○
0%T6_3Net-(T6-D)○○○
0%D3_1USB/DBG_USB_D_N○○○
0%D3_2USB/DBG_USB_D_P○○○
0%IC15_4○○○
0%IC15_51V8_DBG○○○
0%L2_1Net-(IC3-OUT)○○○
0%R103_1USBSS_TX6_P○○○
0%R103_2USB/C_USBSS_TX6_P○○○
0%R105_1USBSS_TX6_N○○○
0%R105_2USB/C_USBSS_TX6_N○○○
0%R107_1USBSS_RX6_P○○○
0%R107_2USB/C_USBSS_RX6_P○○○
0%R108_1USBSS_RX6_N○○○
0%R108_2USB/C_USBSS_RX6_N○○○
0%R56_2USB/EN_MUX○○○
0%R62_2Net-(IC7-ENn_CC)○○○
0%R55_2Net-(IC7-PORT)○○○
0%R51_1Net-(IC7-VBUS_DET)○○○
0%R53_13V3_SYS○○○
0%R53_2Net-(IC7-DIR)○○○
0%C33_13V3_SYS○○○
0%R104_1USB/USBSS_RX1_N○○○
0%R104_2USB/C_USBSS_RX1_N○○○
0%R106_1USB/USBSS_RX1_P○○○
0%R106_2USB/C_USBSS_RX1_P○○○
0%R109_1USB/USBSS_RX2_N○○○
0%R109_2USB/C_USBSS_RX2_N○○○
0%R110_1USB/USBSS_RX2_P○○○
0%R110_2USB/C_USBSS_RX2_P○○○
0%C48_1USB/USBSS_TX1_N○○○
0%C48_2USB/C_USBSS_TX1_P○○○
0%C50_1USB/USBSS_TX1_P○○○
0%C50_2USB/C_USBSS_TX1_N○○○
0%C53_1USB/USBSS_TX2_N○○○
0%C53_2USB/C_USBSS_TX2_P○○○
0%C54_1USB/USBSS_TX2_P○○○
0%C54_2USB/C_USBSS_TX2_N○○○
0%R67_2USB/USBC_INTN○○○
0%R73_1Net-(T6-G)○○○
0%R72_1Net-(T6-G)○○○
0%R63_1USB/CC1○○○
0%R63_2USB/C_CC1○○○
0%SP4_1EGND○○○
0%PWR1_1Net-(PWR1-C)○○○
0%PWR1_2Net-(PWR1-A)○○○
0%BOOT1_1Net-(BOOT1-C)○○○
0%BOOT1_2Net-(BOOT1-A)○○○
0%R65_1USB/CC2○○○
0%J15_101○○○
0%J15_103○○○
0%J15_104○○○
0%J15_105○○○
0%J15_106○○○
0%J15_108○○○
0%J15_110○○○
0%J15_112○○○
0%R65_2USB/C_CC2○○○
0%C66_11V8_DBG○○○
0%R20_2Net-(IC5-TXD)○○○
0%R41_2Net-(IC5-RXD)○○○
0%J15_203○○○
0%J15_205○○○
0%J15_207○○○
0%J15_209○○○
0%J15_232○○○
0%J15_234○○○
0%C15_1USB/DBG_USB_D_P○○○
0%C29_1USB/DBG_USB_D_N○○○
0%J15_89○○○
0%J15_91○○○
0%J15_93○○○
0%J15_95○○○
0%J15_97○○○
0%J15_99○○○
0%C30_1Net-(IC5-3V3OUT)○○○
0%R43_2Net-(IC3-FAULT)○○○
0%T2_3Net-(BOOT1-C)○○○
0%D6_1USB/C_USBSS_RX1_N○○○
0%D6_10USB/C_USBSS_RX1_N○○○
0%T4_3Net-(PWR1-C)○○○
0%D6_2USB/C_USBSS_RX1_P○○○
0%D6_4USB/C_USBSS_TX1_P○○○
0%T5_3Net-(T5-D)○○○
0%D6_5USB/C_USBSS_TX1_N○○○
0%D6_6USB/C_USBSS_TX1_N○○○
0%D6_7USB/C_USBSS_TX1_P○○○
0%D6_9USB/C_USBSS_RX1_P○○○
0%D7_1USB/C_USBSS_TX2_N○○○
0%D7_10USB/C_USBSS_TX2_N○○○
0%D7_2USB/C_USBSS_TX2_P○○○
0%R14_2Net-(BOOT1-A)○○○
0%D7_4USB/C_USBSS_RX2_P○○○
0%R97_2Net-(PWR1-A)○○○
0%D7_5USB/C_USBSS_RX2_N○○○
0%R111_2Net-(USER1-A)○○○
0%D7_6USB/C_USBSS_RX2_N○○○
0%D7_7USB/C_USBSS_RX2_P○○○
0%D7_9USB/C_USBSS_TX2_P○○○
0%LED2_1USB/OTG_USB_FAULT○○○
0%LED2_2Net-(LED2-A)○○○
0%R102_2Net-(IC3-EN)○○○
0%D8_1OTG_USB_D_N○○○
0%D8_10OTG_USB_D_N○○○
0%D8_2OTG_USB_D_P○○○
0%D8_4USB/OTG_USB_ID○○○
0%D8_5Net-(D8-Pad5)○○○
0%D8_6Net-(D8-Pad5)○○○
0%D8_7USB/OTG_USB_ID○○○
0%D8_9OTG_USB_D_P○○○
0%J10_13V3_SYS○○○
0%L11_1Net-(IC1-OUT)○○○
0%J10_2PCIE1_RST○○○
0%J10_3PCIE1_CLKREQ○○○
0%J10_4PCIE1_CLK_P○○○
0%J10_5PCIE1_CLK_N○○○
0%J10_6PCIE1_TX0_P○○○
0%J10_7PCIE1_TX0_N○○○
0%J10_8PCIE1_RX0_P○○○
0%J10_9PCIE1_RX0_N○○○
0%J10_MP1○○○
0%J10_MP2○○○
0%D5_1USB/C_CC2○○○
0%D5_2USB/C_CC1○○○
0%IC3_3Net-(IC3-EN)○○○
0%J7_49CSI/CSI_D_D1_P○○○

14.11.6 Scoring Matrix

PCOLA/SOQ scoring premises used for this analysis. Each cell shows the score assigned when a test method applies to a component or pin.

MethodPCOLASOpensQ
AOIFullFullFull—PartialPartialPartialPartial
AXI————PartialPartialPartialPartial
JTAG/BSCANFullFullFullPartial—FullFull—
BSCAN_PassivesFullFullFullFull—FullFull—
I2CPartialPartial—Partial—PartialPartial—
SPIPartialPartial—Partial—PartialPartial—
UART———Partial————
Passive_MeasFullFullFullFull—FullFull—
Powered_OffPartial————PartialFull—

15 Component Properties

Schematic symbol and library model quality analysis.

The datasheet link stored in the schematic was followed, and the document it returned was compared against the part number. The rows below are links that resolved to a document covering a different part - most often a sibling variant of the same family, where the specifications read as plausible but describe the wrong device.

15.2 Library Model Grades

Grading schematic library model quality based on pin electrical type definitions:

Grade Definitions
GradeRatingDescription
AExcellentHas Power pins AND properly typed I/O pins (>=90% typed)
BGood>=70% typed OR (>=50% typed AND has Power)
CFairMix of typed and Passive pins (>=40% typed)
DPoorMostly Passive with few typed pins (>=10% typed)
FFailAll pins Passive/Unknown (<10% typed, no ERC)
IC Library Model Grades (sorted worst to best)
RefDesGrdPinsPwrInOutIOOCOEHiZPasPart NumberCreator
IC12F1400000001474HC00_TSSOP
IC13F500000005SN74LVC1G126_SC-70
IC17F500000005AT24CS01_SOT23
IC7F31000000031HD3SS3220RNH
U7F800000008MAX3051EKA
IC18F16110000014TPD8S009DSMR
IC2F16110000014TPD8S009DSMR
IC1C600060000NCP380LSNAJAAT1G
IC3C600060000NCP380LSNAJAAT1G
U2C1453021003LM62440-Q1
U6C28461300014SIC477ED-T1-GE3
IC5B33414570003FT232R_QFN
U1B523000000LM3671MF-3.3_SOT
U5B523000000LM3671MF-3.3_SOT
IC11A522100000SN74LV1T125DBVR
IC15A532000000TPS7A0518P_SOT23-5
IC4A532000000TPS7A0518P_SOT23-5
IC6A833020000PCA9517ADP
U3A631020000SN74LXC1T45DBVR
U4A25340180000PCA9547_VQFN
U8A52210000074LVC1G07_SOT-753

15.2.1 Library Quality Summary

Total ICs evaluated21
Grade A (excellent)7 (33.3%)
Grade B (good)3 (14.3%)
Grade C (fair)4 (19.0%)
Grade D (poor)0 (0.0%)
Grade F (fail)7 (33.3%)
OVERALL LIBRARY QUALITYB (2.53/4.00)

15.3 Component Library Validation

Checking for generic/incomplete library models using statistical patterns.

Library Model Issues (11 models)
Library NameIndustry NamePart NumberRefDesPinsDistributionIssues
74HC00_TSSOP74HC00PW,118-IC1214P:14 All pins marked as Passive - likely generic library model; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete [VCC=Passive, GND=Passive]
AT24CS01_SOT23AT24CS01-ST-IC175P:5 All pins marked as Passive - likely generic library model; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete [GND=Passive, VCC=Passive]
FT232R_QFNFT232RQ-REELFT232RQIC533P:3 Pwr:4 Bi:7 I:8 O:5 ?:6 Pin 17 (GND) at same location as pin 20 (GND); Pin 17 (GND) at same location as pin 4 (GND); Pin 20 (GND) at same location as pin 4 (GND); Power-named pins not typed as Power - library pin types incomplete [GND=Passive, GND=Passive]
HD3SS3220RNHHD3SS3220RNHT-IC731P:31 Pin 13 (GND) at same location as pin 28 (GND); Pin 13 (GND) at same location as pin 31 (GND); Pin 28 (GND) at same location as pin 31 (GND); All pins marked as Passive - likely generic library model; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete [GND=Passive, GND=Passive, VDD5=Passive, GND=Passive, VBUS_DET=Passive, +1 more]
LM3671MF-3.3_SOTLM3671MF-3.3/NOPB-U1, U55Pwr:2 I:3 Power-named pins not typed as Power - library pin types incomplete [SW=Input]
LM62440-Q1LMQ62440BPPQRJRRQ1-U214P:3 Pwr:5 Bi:2 I:3 OC:1 Pin 11 (PGND) at same location as pin 9 (PGND); Pin 12 (VIN) at same location as pin 8 (VIN); Power-named pins not typed as Power - library pin types incomplete [PGND=Passive, VIN=Passive]
MAX3051EKAMAX3051EKA-U78P:8 All pins marked as Passive - likely generic library model; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete [GND=Passive, VCC=Passive]
NCP380LSNAJAAT1GNCP380LSNAJAAT1G-IC1, IC36Bi:6 All pins marked as Bidirectional - very underspecified library; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete [IN=Bidirectional, GND=Bidirectional, OUT=Bidirectional]
SIC477ED-T1-GE3SIC477ED-T1-GE3-U628P:14 Pwr:4 Bi:3 I:6 O:1 Pin 10 (PGND) at same location as pin 11 (PGND); Pin 10 (PGND) at same location as pin 17 (PGND); Pin 10 (PGND) at same location as pin 9 (PGND); Pin 11 (PGND) at same location as pin 17 (PGND); Pin 11 (PGND) at same location as pin 9 (PGND); Pin 12 (SW) at same location as pin 13 (SW); Pin 12 (SW) at same location as pin 14 (SW); Pin 13 (SW) at same location as pin 14 (SW); Pin 17 (PGND) at same location as pin 9 (PGND); Pin 23 (AGND) at same location as pin 28 (AGND); Pin 5 (PHASE) at same location as pin 6 (PHASE); Pin 7 (VIN) at same location as pin 8 (VIN); Power-named pins not typed as Power - library pin types incomplete [PGND=Passive, PGND=Passive, SW=Bidirectional, SW=Passive, SW=Passive, +4 more]
SN74LVC1G126_SC-70SN74LVC1G126DCKR-IC135P:5 All pins marked as Passive - likely generic library model; No Power pins - may use separate power symbol; Only 1 pin type used - no electrical differentiation; Power-named pins not typed as Power - library pin types incomplete [GND=Passive, VCC=Passive]
TPD8S009DSMRTPD8S009DSMR-IC2, IC1816P:14 Pwr:1 ?:1 Pin 11 (GND) at same location as pin 2 (GND); Pin 11 (GND) at same location as pin 5 (GND); Pin 11 (GND) at same location as pin 8 (GND); Pin 11 (GND) at same location as pin 8 (GND); Pin 13 (VCC) at same location as pin 15 (VCC); Pin 2 (GND) at same location as pin 5 (GND); Pin 2 (GND) at same location as pin 8 (GND); Pin 2 (GND) at same location as pin 8 (GND); Pin 5 (GND) at same location as pin 8 (GND); Pin 5 (GND) at same location as pin 8 (GND); 87% of pins are Passive - suspiciously high for an IC; Power-named pins not typed as Power - library pin types incomplete [GND=Passive, VCC=Passive, GND=Passive, GND=Passive, GND=Passive, +1 more]

15.3.1 Validation Heuristics

All pins same type: Generic library with no electrical rules

High % passive pins on IC: Incomplete type information

No power pins: May indicate separate power symbol

Low type diversity: Very underspecified library model

Power-named pins not typed as Power: Library pin types incomplete

15.4 Symbol vs Datasheet Pin Table

Each symbol's pin numbers are compared with the pin table of its cached datasheet model. A datasheet pin the symbol lacks is a warning only when the datasheet calls it electrical; a pin the datasheet marks NC or mechanical, or a symbol pin the table does not list, is shown for information. An exposed pad is never counted as a mismatch, whether the symbol names it or numbers it one past the last pin. Where it was numbered, the row suggests giving it a name, because a bare number does not tell a reader what the pin is.

19 parts compared with a datasheet model: 19 agree, 0 differ. 38 parts have no cached datasheet model yet; 16 have a cached file that is not this symbol's model and were not compared.
Every symbol with a cached datasheet model matches its pin table.

15.5 Shielded Connector Model Quality

Shielded connectors with missing pin names0
All shielded connectors have proper pin names for EMC analysis.

15.6 Footprints and Other Models

Components with model data107
Component Model Assignments
RefDesIndustry NamePinsModel TypeModel
D3PESD2USB5UV-TR3Footprintantmicro-footprints:SOT-23-3
D5PESD2USB5UV-TR3Footprintantmicro-footprints:SOT-23-3
D6TPD4E05U06QDQARQ110Footprintantmicro-footprints:USON-10_2.5x1mm_P0.5mm
D7TPD4E05U06QDQARQ110Footprintantmicro-footprints:USON-10_2.5x1mm_P0.5mm
D8TPD4E05U06QDQARQ110Footprintantmicro-footprints:USON-10_2.5x1mm_P0.5mm
D10PESD2USB5UV-TR3Footprintantmicro-footprints:SOT-23-3
D11PESD2USB5UV-TR3Footprintantmicro-footprints:SOT-23-3
D12PESD2USB5UV-TR3Footprintantmicro-footprints:SOT-23-3
IC1NCP380LSNAJAAT1G6Footprintantmicro-footprints:SOT-23-6
IC2TPD8S009DSMR16Footprintantmicro-footprints:R-PDSO-N15
IC3NCP380LSNAJAAT1G6Footprintantmicro-footprints:SOT-23-6
IC4TPS7A0518PDBVT5Footprintantmicro-footprints:SOT-23-5
IC5FT232RQ-REEL33Footprintantmicro-footprints:QFN-32-1EP_5x5mm
IC6PCA9517ADP8Footprintantmicro-footprints:TSSOP-8_3x3mm_P0.65mm
IC7HD3SS3220RNHT31Footprintantmicro-footprints:WQFN-30-1EP_4.6x2.6mm_P0.4mm
IC11SN74LV1T125DBVR5Footprintantmicro-footprints:SOT-23-5
IC1274HC00PW,11814Footprintantmicro-footprints:TSSOP-14_4.4x5mm_P0.65mm
IC13SN74LVC1G126DCKR5Footprintantmicro-footprints:SC-70-5
IC15TPS7A0518PDBVT5Footprintantmicro-footprints:SOT-23-5
IC17AT24CS01-ST5Footprintantmicro-footprints:SOT-23-5
IC18TPD8S009DSMR16Footprintantmicro-footprints:R-PDSO-N15
J146765100120Footprintantmicro-footprints:HDMI-Micro-D_Receptacle_Molex_467651001
J22129320-321Footprintantmicro-footprints:DisplayPort-Mini_Receptacle_TE_2129320-3
J3SI-51005-F15Footprintantmicro-footprints:RJ45_Bel_SI-51005-F
J4MJ-179PH3Footprintantmicro-footprints:BarrelJack_Pin2mm_MJ-179PH
J54734600016Footprintantmicro-footprints:USB-Micro-B_Receptacle_Molex_473460001
J66871501452252Footprintantmicro-footprints:Conn_FFC_WE_68715014x22
J76871501402252Footprintantmicro-footprints:Conn_FFC_WE_68715014x22
J8MDT580M0100169Footprintantmicro-footprints:Bus_M.2_Socket_Key_M_Amphenol_MDT580M01001
J94734600016Footprintantmicro-footprints:USB-Micro-B_Receptacle_Molex_473460001
J10505110109712Footprintantmicro-footprints:Conn_FFC_Molex_5051101097
J1163272330001125Footprintantmicro-footprints:USB-C_Receptacle_WE_632723300011
J1205339804716Footprintantmicro-footprints:Conn_Molex_PicoBlade_1x4_0533980471
J13SM04B-SRSS-TB(LF)(SN)5Footprintantmicro-footprints:Conn_JST_SH_1x4_SM04B-SRSS-TB-LF-SN
J14SM04B-SRSS-TB(LF)(SN)5Footprintantmicro-footprints:Conn_JST_SH_1x4_SM04B-SRSS-TB-LF-SN
J152309413-1262Footprintantmicro-footprints:TE_2309413
M2945-13541-0000-00000Footprintantmicro-footprints:Module_Jetson-Nano
REC1TL3340AF160QG4Footprintantmicro-footprints:SW_TL3340AF160QG_SMD
RST1TL3340AF160QG4Footprintantmicro-footprints:SW_TL3340AF160QG_SMD
SP1Spacer_Drill3.7mm_H6mm_9774060151R1Footprintantmicro-footprints:Spacer_Drill3.7mm_H6mm_9774060151R
SP2Spacer_Drill3.7mm_H6mm_9774060151R1Footprintantmicro-footprints:Spacer_Drill3.7mm_H6mm_9774060151R
SP3Spacer_Drill3.7mm_H6mm_9774060151R1Footprintantmicro-footprints:Spacer_Drill3.7mm_H6mm_9774060151R
SP4Spacer_Drill3.7mm_H6mm_9774060151R1Footprintantmicro-footprints:Spacer_Drill3.7mm_H6mm_9774060151R
SP5Spacer_Drill3.7mm_H6mm_9774060151R1Footprintantmicro-footprints:Spacer_Drill3.7mm_H6mm_9774060151R
SP6Spacer_Drill3.7mm_H6mm_9774060151R1Footprintantmicro-footprints:Spacer_Drill3.7mm_H6mm_9774060151R
SP7Spacer_Drill3.7mm_H4mm_9774040151R1Footprintantmicro-footprints:Spacer_Drill3.7mm_H4mm_9774040151R
T1BSS138PW3Footprintantmicro-footprints:SC70-3
T2BSS138PW3Footprintantmicro-footprints:SC70-3
T3BSS138PW3Footprintantmicro-footprints:SC70-3
T4BSS138PW3Footprintantmicro-footprints:SC70-3
T5BSS138PW3Footprintantmicro-footprints:SC70-3
T6BSS138PW3Footprintantmicro-footprints:SC70-3
T7BSS138PW3Footprintantmicro-footprints:SC70-3
T8BSS138PW3Footprintantmicro-footprints:SC70-3
T9BSS138PW3Footprintantmicro-footprints:SC70-3
TP1TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP2TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP3TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP4TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP5TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP6TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP7TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP8TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP9TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP10TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP11TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP12TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP13TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP14TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP15TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP16TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP17TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP18TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP19TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP20TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP21TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP23TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP24TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP25TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP26TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP27TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP28TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP29TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP30TC2030-IDC-NL6Footprintantmicro-footprints:Tag-Connect_TC2030-IDC-NL_2x3_P1.27mm
TP31TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP32TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP33TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP34TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP35TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP36TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP37TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP38TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP39TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP40TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP41TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP42TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP44TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
TP47TP_1.5mm_SMD1Footprintantmicro-footprints:TP_SMD_1.5mm
U1LM3671MF-3.3/NOPB5Footprintantmicro-footprints:SOT-23-5
U2LMQ62440BPPQRJRRQ114Footprintantmicro-footprints:VQFN-HR-14_3.5x4mm
U3SN74LXC1T45DBVR6Footprintantmicro-footprints:SOT-23-6
U4PCA9547BS,11825Footprintantmicro-footprints:VQFN-24-1EP_3.8x3.8x1.0mm_P0.5mm
U5LM3671MF-3.3/NOPB5Footprintantmicro-footprints:SOT-23-5
U6SIC477ED-T1-GE328Footprintantmicro-footprints:SIC47XED-T1-GE3
U7MAX3051EKA8Footprintantmicro-footprints:SOT-23-8
U874LVC1G07GV,1255Footprintantmicro-footprints:SOT-753
USR1TL3340AF160QG4Footprintantmicro-footprints:SW_TL3340AF160QG_SMD

15.7 IC Pin Electrical Properties

Unique IC models17
Total IC instances21
IC Library Models
Industry NameLibrary NameRefDesNotes
74HC00PW,11874HC00_TSSOPIC12
74LVC1G07GV,12574LVC1G07_SOT-753U8
AT24CS01-STAT24CS01_SOT23IC17
FT232RQ-REELFT232R_QFNIC5
HD3SS3220RNHTHD3SS3220RNHIC7
LM3671MF-3.3/NOPBLM3671MF-3.3_SOTU1, U5
LMQ62440BPPQRJRRQ1LM62440-Q1U2
MAX3051EKAMAX3051EKAU7
NCP380LSNAJAAT1GNCP380LSNAJAAT1GIC1, IC3
PCA9517ADPPCA9517ADPIC6
PCA9547BS,118PCA9547_VQFNU4
SIC477ED-T1-GE3SIC477ED-T1-GE3U6
SN74LV1T125DBVRSN74LV1T125DBVRIC11
SN74LVC1G126DCKRSN74LVC1G126_SC-70IC13
SN74LXC1T45DBVRSN74LXC1T45DBVRU3
TPD8S009DSMRTPD8S009DSMRIC2, IC18
TPS7A0518PDBVTTPS7A0518P_SOT23-5IC4, IC15

15.7.1 74HC00_TSSOP (74HC00PW,118)

PinPin NameElectricalNotes
11APassive
21BPassive
31YPassive
42APassive
52BPassive
62YPassive
7GNDPassive
83YPassive
93APassive
103BPassive
114YPassive
124APassive
134BPassive
14VCCPassive

15.7.2 74LVC1G07_SOT-753 (74LVC1G07GV,125)

PinPin NameElectricalNotes
1NCUnknown
2AInput
3GNDPower In
4YOutput
5VCCPower In

15.7.3 AT24CS01_SOT23 (AT24CS01-ST)

PinPin NameElectricalNotes
1SCLPassive
2GNDPassive
3SDAPassive
4VCCPassive
5WPPassive

15.7.4 FT232R_QFN (FT232RQ-REEL)

PinPin NameElectricalNotes
1VCCIOPower In
2RXDInput
3RI#Input
4GNDPassive
5NCUnknown
6DSR#Input
7DCD#Input
8CTS#Input
9CBUS4Bidirectional
10CBUS2Bidirectional
11CBUS3Bidirectional
12NCUnknown
13NCUnknown
14USBDPBidirectional
15USBDMBidirectional
163V3OUTOutput
17GNDPower In
18RESET#Input
19VCCPower In
20GNDPassive
21CBUS1Bidirectional
22CBUS0Bidirectional
23NCUnknown
24AGNDPower In
25NCUnknown
26TESTInput
27OSCIInput
28OSCOOutput
29NCUnknown
30TXDOutput
31DTR#Output
32RTS#Output
33EPPassive

15.7.5 HD3SS3220RNH (HD3SS3220RNHT)

PinPin NameElectricalNotes
1CC2Passive
2CC1Passive
3CURRENT_MODEPassive
4PORTPassive
5VBUS_DETPassive
6TX+Passive
7TX-Passive
8VCC33Passive
9RX+Passive
10RX-Passive
11DIRPassive
12ENn_MUXPassive
13GNDPassive
14RX1-Passive
15RX1+Passive
16TX1-Passive
17TX1+Passive
18RX2-Passive
19RX2+Passive
20TX2-Passive
21TX2+Passive
22ADDRPassive
23INT_N/OUT3Passive
24VCONN_FAULT_NPassive
25SDA/OUT1Passive
26SCL/OUT2Passive
27IDPassive
28GNDPassive
29ENn_CCPassive
30VDD5Passive
31GNDPassive

15.7.6 LM3671MF-3.3_SOT (LM3671MF-3.3/NOPB)

PinPin NameElectricalNotes
1VINPower In
2GNDPower In
3ENInput
4FBInput
5SWInput

15.7.7 LM62440-Q1 (LMQ62440BPPQRJRRQ1)

PinPin NameElectricalNotes
1BIASPassive
2VCCPower Out
3AGNDPower In
4FBInput
5PGOODOpen Collector
6MODEInput
7ENInput
8VINPower In
9PGNDPower In
10SWPower Out
11PGNDPassive
12VINPassive
13RBOOTBidirectional
14CBOOTBidirectional

15.7.8 MAX3051EKA (MAX3051EKA)

PinPin NameElectricalNotes
1TXDPassive
2GNDPassive
3VCCPassive
4RXDPassive
5SHDNPassive
6CANLPassive
7CANHPassive
8RHPassive

15.7.9 NCP380LSNAJAAT1G (NCP380LSNAJAAT1G)

PinPin NameElectricalNotes
1INBidirectional
2GNDBidirectional
3ENBidirectional
4FAULTBidirectional
5ILIMBidirectional
6OUTBidirectional

15.7.10 PCA9517ADP (PCA9517ADP)

PinPin NameElectricalNotes
1VCC(A)Power In
2SCLAInput
3SDAABidirectional
4GNDPower In
5ENInput
6SDABBidirectional
7SCLBInput
8VCC(B)Power In

15.7.11 PCA9547_VQFN (PCA9547BS,118)

PinPin NameElectricalNotes
1SD0Bidirectional
2SC0Bidirectional
3SD1Bidirectional
4SC1Bidirectional
5SD2Bidirectional
6SC2Bidirectional
7SD3Bidirectional
8SC3Bidirectional
9GNDPower In
10SD4Bidirectional
11SC4Bidirectional
12SD5Bidirectional
13SC5Bidirectional
14SD6Bidirectional
15SC6Bidirectional
16SD7Bidirectional
17SC7Bidirectional
18A2Input
19SCLBidirectional
20SDABidirectional
21VCCPower In
22A0Input
23A1Input
24RESETInput
25EPPower In

15.7.12 SIC477ED-T1-GE3 (SIC477ED-T1-GE3)

PinPin NameElectricalNotes
1VCINInput
2PGOODOutput
3ENInput
4BOOTInput
5PHASEBidirectional
6PHASEPassive
7VINInput
8VINPassive
9PGNDPower In
10PGNDPassive
11PGNDPassive
12SWBidirectional
13SWPassive
14SWPassive
15GLInput
16VDRVPassive
17PGNDPassive
18NCPassive
19SSPassive
20VSNSPower In
21NCPassive
22VFBInput
23AGNDPower In
24fSWPassive
25ILIMITPassive
26VDDPower Out
27MODEBidirectional
28AGNDPassive

15.7.13 SN74LV1T125DBVR (SN74LV1T125DBVR)

PinPin NameElectricalNotes
1OEInput
2AInput
3GNDPower In
4YOutput
5VCCPower In

15.7.14 SN74LVC1G126_SC-70 (SN74LVC1G126DCKR)

PinPin NameElectricalNotes
1OEPassive
2APassive
3GNDPassive
4YPassive
5VCCPassive

15.7.15 SN74LXC1T45DBVR (SN74LXC1T45DBVR)

PinPin NameElectricalNotes
1VCCAPower In
2GNDPower In
3ABidirectional
4BBidirectional
5DIRInput
6VCCBPower In

15.7.16 TPD8S009DSMR (TPD8S009DSMR)

PinPin NameElectricalNotes
1D0+Passive
2GNDPassive
3D0-Passive
4D1+Passive
5GNDPassive
6D1-Passive
7D2+Passive
8GNDPassive
8GNDPassive
9D2-Passive
10D3+Passive
11GNDPassive
12D3-Passive
13VCCPower In
14NCUnknown
15VCCPassive

15.7.17 TPS7A0518P_SOT23-5 (TPS7A0518PDBVT)

PinPin NameElectricalNotes
1VINPower In
2GNDPower In
3ENInput
4NCUnknown
5VOUTPower Out