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CM4S_CORE_V02 Design Analysis

Job 5217f8c2

1 Design Summary

86
out of 100
Depth of review, as a baseline: 588 verified datasheet parameters applied and 472 automated circuit checks performed. Additional checks that are not as easily quantifiable are also made.
Design TypeHierarchical (11 sheets)
Total Components228
Total Pins1131
Total Nets207
Total Test Points29
Not Fitted (DNP)3
Improve your score:
Points deducted for open High/Medium AI findings:
AI findings to review:
AI assistance is enabled for this report. Each section marked "AI-Assisted" contains AI-generated engineering observations produced during schematic-phase design review. Findings are based solely on connectivity, component values, and net annotations present in the schematic data at the time of analysis. The AI has no access to PCB layout, routing, thermal data, BOM pricing or availability, assembly constraints, or any information outside the schematic. Findings are observations to investigate, not pass/fail judgments. The absence of a finding for a given device or net does not constitute a clearance. STANDARD MODE — this analysis was produced by the standard model tier.
Based on user-selected TP insertion settings, 16 test point(s) were added and a modified design is available for download. Review the modified schematic and resubmit to update this report.

1.1 Design Overview

AI-Assisted — CM4S_CORE_V02 is a hierarchical carrier board built around a Raspberry Pi Compute Module 4S (U2), fitted as RPi-CM4S_RA. The module carries a Broadcom BCM2711 quad-core processor at 1.5 GHz. The schematic spans eleven sheets: CM4, IO, RELAYS, ETHERNET, ETHERNET_LAN1, USD_CARD, HDMI, USB, POWER, a top-level sheet and a revision history.

Around the module the board provides:

- wired Ethernet with a two-port USB 2.0 hub,
- a microSD card slot,
- an HDMI output,
- USB Type-C and stacked USB Type-A ports,
- a level-translated 40-pin expansion header,
- a relay output,
- a USB Power Delivery sink input.

Processing Subsystem

U2 runs from the board's +3V3 rail and its own core supply input. Per the Raspberry Pi CM4S datasheet (Datasheet), the core supply accepts 2.5 V to 5.25 V. The same datasheet gives typical figures of 7 W under load and 1.5 W at idle.

The board fixes three of the module's boot and configuration inputs:

- EMMC_DISABLE_N is left open, so the module performs a normal SD or eMMC boot. Q1 shares this net.
- USB_OTGID is pulled to GND through R51, so the CM4S operates as a USB host.
- EEPROM_nWP is unconnected, which leaves the module's bootloader EEPROM writable.

Two I2C buses leave the module. One reaches the HUSB238 PD controller (U19) at address 0x08. The other carries HDMI DDC to J6.

Storage

The CM4S SDX interface drives a 4-bit SDMMC bus to the microSD socket J5, a GCT MEM2052-00-195-00-A with card-detect contacts. The card supply SD_PWR is switched by U13.

Ethernet and USB

A LAN9512I-JZX (U9) combines a two-port USB 2.0 hub with a 10/100 Ethernet controller. It is clocked from a 25 MHz crystal (Y1, FY2500117, 18 pF load) and configured from a 93LC66A Microwire EEPROM (U10). Per the SMSC datasheet (Datasheet), U9 draws up to 231 mA typical in 100BASE-TX operation with all ports active.

The Ethernet port is J4, an ARJM11D7-009 RJ45 MagJack with integrated link and activity LEDs. The two downstream hub ports appear on the stacked Type-A receptacle J8, and each port has its own switched VBUS rail (5V_OTG_1 and 5V_OTG_2).

An FSUSB42 two-port USB 2.0 switch (U16) steers the CM4S USB data lines between two paths. Per the onsemi datasheet (Datasheet), it has 720 MHz bandwidth and 3.9 Ω typical on-resistance. A second Type-C receptacle, J7, carries the USB_BOOT_VBUS net.

Display

HDMI output is provided on J6, a Würth 685119134923 receptacle. Its 5 V supply, HDMI_5V, is switched by U14.

The design defines 24 differential pairs: 90 Ω for USB and 100 Ω for the module's video interfaces.

I/O, Relay and User Interface

The 40-pin header J2 is buffered by three TXS0108E-Q1 open-drain-capable translators (U3 to U5) and one TXB0108 auto-direction translator (U6). An SN74LVC1G17 Schmitt buffer (U7) conditions an additional signal.

The RELAYS sheet drives an IM03GR monostable 5 V-coil signal relay (K1, 2 A contacts) through 2N7002W MOSFETs. Field connections are made through J3, a Phoenix 1862055 six-position 3.5 mm terminal block, and through the three-pin header J1. User interface consists of the PTS810 pushbutton S1 and eight status LEDs.

Power Tree

Input power enters on +BATT. The primary converter is U20, an LMR14050 buck regulator whose output (Net-(C52-Pad1)) is taken through L1. Per the TI datasheet (Datasheet), it operates from 4 V to 40 V and delivers 5 A.

USB-PD input is handled at J9 by the HUSB238 sink controller (U19). The board straps it to request 5 V at 3.25 A: VSET is tied to GND through R42 (0 Ω), and ISET is left open (Hynetek datasheet, source: Tomachie).

Five RT9742 0.5 A load switches distribute the supplies (Richtek datasheet, source: Tomachie):

- U8 sources 3V3_LAN1 directly, and VDD33A_LAN1 through FB2.
- U11 sources 5V_OTG_1.
- U12 sources 5V_OTG_2.
- U13 sources SD_PWR.
- U14 sources HDMI_5V.

VDD18CORE_LAN1 is generated by U9's internal regulator. The board also distributes +3V3 and +5V system rails.

Temperature Ratings

The CM4S module is rated −20 °C to +85 °C (non-condensing), and this sets the board's operating range. The LAN9512I, HUSB238, RT9742, FSUSB42 and TXS0108E-Q1 are each rated to −40 °C to +85 °C ambient. The LMR14050 is rated for junction temperatures of −40 °C to +125 °C.

1.2 Processed Sheets

#Sheet Name
1CM4S_CORE_V02.kicad_sch
2REV_HISTORY.kicad_sch
3CM4.kicad_sch
4IO.kicad_sch
5RELAYS.kicad_sch
6ETHERNET.kicad_sch
7ETHERNET_LAN1.kicad_sch
8USD_CARD.kicad_sch
9HDMI.kicad_sch
10USB.kicad_sch
11POWER.kicad_sch

1.3 Structured DNP (Not Fitted)

Parts marked do-not-populate at the part level, outside of assembly variants. They remain present in the netlist but are not assembled.
StatusRefDesPart TypeValueFootprint
DNPC1410n_50V10nF_50Vdaymoon:C_0603_1608Metric
DNPR30R0Rdaymoon:R_1206_3216Metric
DNPR40NP 33k33kdaymoon:R_0603_1608Metric

1.4 Footprint Compliance

Production pick-n-place, AOI, AXI, ATE and Design Quality tools rely on proper descriptions of component footprints.

Footprint NamingStatus
29 SMT footprints do not follow IPC-7351B naming
9 footprints (connectors, specialty) — compliance unknown
2 footprints could not be classified for inspection

2 Component Value Properties

Component values should be in the VALUE property, either as a direct value (e.g. 100nF) or as a formula reference (e.g. =Capacitance). The typed property (Resistance, Capacitance, Inductance, Impedance, etc.) holds the actual electrical value; VALUE should point to it or contain the same data.

Multi-pin parts on diode designators (D12, D13, D15): the part has more than 4 pins. A diode designator (IEEE 315 D, IEC 81346 CR, GOST 2.710 VD) names a two- or three-terminal device or a bridge; an integrated protection array or an IC takes a U designator. Use a U designator so the part is treated as the integrated device it is.
Value Property Check
TypeCheckCountComponentsStatus
CapacitorsVALUE holds both the capacitance and a voltage rating (e.g. "0.1uF 50V", "10uF 6.3V"). Tomachie has already separated the two and uses the capacitance as the value, so the analysis and the AI read a clean magnitude and are not misled by the embedded rating — the misinterpretation risk is low. This is a cleanliness note, not a parsing failure: to keep the schematic self-describing and safe for downstream BOM/ICT/AOI tools that read VALUE literally, move the voltage into a dedicated Voltage property. (C41 currently has VALUE="10u_16V")55C41, C46, C1, C3, C2, C5, C10, C12 (+47 more)
ResistorsValues in VALUE or Resistance57R28, R27, R59, R9, R52, R6, R4, R51 (+49 more)✓
InductorsVALUE holds both the magnitude and a current rating (e.g. "6.8uH 3.84A"). Tomachie has already separated the two and uses the magnitude as the value, so the analysis and the AI read a clean value — the misinterpretation risk is low. This is a cleanliness note: move the current rating into a named Current property for downstream BOM/ICT/AOI tools and a self-describing schematic. (L1 currently has VALUE="8u2_4A")1L1
Ferrite BeadsVALUE holds a part number, not an impedance. When the value is expressed as impedance@frequency (e.g. 600R@100MHz) and a separate MPN field carries the part number, the analysis is more deterministic. (FB1 currently has VALUE="0603_120R_2A")2FB1, FB2
FusesValues in VALUE or Rated Current1F1✓
CrystalsValues in VALUE or Frequency1Y1✓

2.1 Not a Part Number

The manufacturer part-number field of these parts holds text that is not a manufacturer part number - a description, a placeholder, or more than one part - so it cannot be used to order the part or to find its datasheet. Replace it with the manufacturer's part number.
RefDesPart-Number Field
U2CMS4S0x0yy + 1473149-4

2.2 Part Number vs Stated Values

Each passive states its electrical facts twice: in the properties the designer set, and encoded inside the MANUFACTURER part number. This check decodes the manufacturer part number and compares the two. A distributor catalogue number is a different thing and cannot be used here - an LCSC C-number or a Digi-Key -ND number identifies a stock item, it encodes no capacitance, voltage or tolerance, so there is nothing in it to check against. Where the two readings disagree both are shown and neither is assumed correct: if VALUE is wrong the analysis used the wrong number, and if the part number is wrong the BOM orders the wrong part. Only the designer knows which field is authoritative. Parts whose numbering scheme is not recognized are reported as not checked rather than passed.

1 of 113 fitted resistor/inductor/capacitor part(s) carry no ordering part number: R13. Without a part number the BOM cannot state what to buy, and none of the part-number cross-checks in this section can run for these parts. Add a manufacturer part number to each part in the library.
Part NumberDecoded from Part NumberStated on SchematicWhat DiffersCountComponentsStatus
RC0201FR-073K3L
MOC / Yageo RC0201
3.3k +/-1% 02013k3 (footprint 0603): R43, R44Package: part number 0201, footprint 06032R43, R44 Mismatch
CC0603KRX7R8BB104
MOC / Yageo
100nF 25V +/-10% 0603100nF_25V 25V: C4, C5, C6, C7, C8, C9, C10, C11 (+18 more)Nothing - all stated values agree26C4, C5, C6, C7, C8, C9, C10, C11 (+18 more)✓ Match
Sufficient data for DC and AI analysis. The data may be Insufficient for AC PDN analyzers as Yageo provides simulation data which we question its accuracy. A TDK C1608X7R1E104K080AA equivalent part is recommended for designs using PCB AC PDN characterization.
CRCW06030000Z0EA
MOC / Vishay Dale CRCW0603
0R 06030R: R8, R9, R10, R27, R29, R42, R51, R52 (+1 more)Nothing - all stated values agree9R8, R9, R10, R27, R29, R42, R51, R52 (+1 more)✓ Match
CL10B105KP8NNNC
MOC / Samsung Electro-Mechanics
1uF 10V +/-10% 06031u0_10V 10V: C20, C21, C24, C37, C38, C45Nothing - all stated values agree6C20, C21, C24, C37, C38, C45✓ Match
GRM32EC81C476KE15K
MOC / Murata
47uF 16V +/-10% 121047uF_16V 16V: C1, C52, C53, C54, C55Nothing - all stated values agree5C1, C52, C53, C54, C55✓ Match
RC0603FR-101KL
MOC / Yageo RC0603
1k +/-1% 06031k: R2, R7, R14, R32, R49Nothing - all stated values agree5R2, R7, R14, R32, R49✓ Match
CC0603KRX7R9BB103
MOC / Yageo
10nF 50V +/-10% 060310nF_50V 50V: C15, C23, C26, C27Nothing - all stated values agree4C15, C23, C26, C27✓ Match
Sufficient data for DC and AI analysis. The data may be Insufficient for AC PDN analyzers as Yageo provides simulation data which we question its accuracy. A TDK C1608X7R1H103K080AA equivalent part is recommended for designs using PCB AC PDN characterization.
RC0603FR-0710KL
MOC / Yageo RC0603
10k +/-1% 060310k: R12, R15, R18, R28Nothing - all stated values agree4R12, R15, R18, R28✓ Match
RC0603FR-0749R9L
MOC / Yageo RC0603
49.9R +/-1% 060349R9: R36, R55, R56, R57Nothing - all stated values agree4R36, R55, R56, R57✓ Match
RC1206FR-070R
MOC / Yageo RC1206
0R +/-1% 12060R: R6, R45, R50, R59Nothing - all stated values agree4R6, R45, R50, R59✓ Match
RC0603FR-07330RP
MOC / Yageo RC0603
330R +/-1% 0603330R: R21, R22, R23Nothing - all stated values agree3R21, R22, R23✓ Match
RC0603FR-0747KL
MOC / Yageo RC0603
47k +/-1% 060347k: R1, R31, R35Nothing - all stated values agree3R1, R31, R35✓ Match
RC0603FR-075K1L
MOC / Yageo RC0603
5.1k +/-1% 06035k1: R33, R34, R39Nothing - all stated values agree3R33, R34, R39✓ Match
RC0603FR-131K5L
MOC / Yageo RC0603
1.5k +/-1% 06031k5: R24, R25, R46Nothing - all stated values agree3R24, R25, R46✓ Match
RC1206FR-071ML
MOC / Yageo RC1206
1M +/-1% 12061M: R26, R30, R54Nothing - all stated values agree3R26, R30, R54✓ Match
VPDD202W102K1GV001E
MOC / Johanson Dielectrics
1nF 2000V +/-10% 12061n0_2kV 2kV: C40, C44, C56Nothing - all stated values agree3C40, C44, C56✓ Match
CL10B223KB8NNNC
MOC / Samsung Electro-Mechanics
22nF 50V +/-10% 060322nF_50V 50V: C39, C48Nothing - all stated values agree2C39, C48✓ Match
CL31B225KBHNNNE
MOC / Samsung Electro-Mechanics
2.2uF 50V +/-10% 12062u2_50V 50V: C49, C50Nothing - all stated values agree2C49, C50✓ Match
GRM188D71A106MA73D
MOC / Murata
10uF 10V +/-20% 060310uF_10V 10V: C2, C3Nothing - all stated values agree2C2, C3✓ Match
KGM15ACG1E330JT
MOC / Kyocera
33pF 25V +/-5% 060333pF_25V 25V: C16, C17Nothing - all stated values agree2C16, C17✓ Match
MCWR04X4701FTL
MOC / Multicomp MCWR04
4.7k +/-1%4k7: R5, R58Nothing - all stated values agree2R5, R58✓ Match
RC0603FR-07100KL
MOC / Yageo RC0603
100k +/-1% 0603100k: R4, R11Nothing - all stated values agree2R4, R11✓ Match
RC0603FR-0751KL
MOC / Yageo RC0603
51k +/-1% 060351k: R38, R47Nothing - all stated values agree2R38, R47✓ Match
RC0603FR-1310RL
MOC / Yageo RC0603
10R +/-1% 060310R: R20, R37Nothing - all stated values agree2R20, R37✓ Match
CL10A475KQ8NNNC
MOC / Samsung Electro-Mechanics
4.7uF 6.3V +/-10% 06034u7_6V3 6V3: C18Nothing - all stated values agree1C18✓ Match
CL21B106KOQNNNE
MOC / Samsung Electro-Mechanics
10uF 16V +/-10% 080510uF_16V 16V: C41Nothing - all stated values agree1C41✓ Match
+7 more part number(s) cross-checked, all agreeNothing - all stated values agree7✓ Match

2.3 Instance Properties To Review

The items below are properties of the placed component instances, not of the library parts they use.

6 instances write a quantity with a decimal comma in a text property (e.g. "0,31A"). This is valid European notation and is read correctly by this analysis; it does not affect the score. It is listed because a design delivered to tools and markets that expect a decimal point avoids misreads by using one convention throughout.

Decimal Comma in Numeric Text
Property FieldAs WrittenValueComponents
Description0,18ABSS84AK,215Q3
Description0,31A2N7002WQ4, Q2, Q1, Q6, Q5

2.4 Capacitor Derating Check

Derating profileBenign (controlled office)
Maximum ambient40 °C
Checks performed41
Over-specified29
A capacitor is checked here when the comparison can be made without an operating-point calculation: it has two terminals, sits between a power rail and ground so the rail's resolved voltage is the voltage across it, and states a voltage rating - a Voltage property, or a rating decoded from the part number. Every other derating check - for capacitors and for every other part class - is applied by the AI analysis within its report sections.
Derating applied: 30% (capacitor_voltage_pct = 70)
Status key: ↓ = Over-specified ✓ = Adequately rated
Derating is how much is taken off a part's catalogue rating. What remains is the most of that rating the part may be worked at - a 16 V capacitor derated 15% has a maximum permitted value of 13.6 V - and the part is correctly sized when the voltage its position applies stays within it, taken at the worst case of the rail's stated range. This judges DC working voltage only; ripple and switching transients are not included in the compared value.
Review: 29 part(s) carry a voltage rating far higher than needed. A lower-cost part can be used, down to the voltage indicated.
1 derating check(s) on 1 part(s) sit on rails whose level the schematic does not state directly. The AI analysis resolves those levels from the circuit and the device datasheets, and evaluates these parts there.
Part Voltage Rating vs Design Voltage
RefDesNet NameRated VoltageMax PermittedDesign Voltage% of RatingSufficient RatingStatus
C42Net-(U14-EN)25.00 V17.50 V5.50 V (worst case of Net-(D18-A2))22.0%16.00 V↓
C12+5V25.00 V17.50 V5.50 V (worst case of Net-(D18-A2))22.0%16.00 V↓
C8+5V25.00 V17.50 V5.50 V (worst case of Net-(D18-A2))22.0%16.00 V↓
C9+5V25.00 V17.50 V5.50 V (worst case of Net-(D18-A2))22.0%16.00 V↓
C7+5V25.00 V17.50 V5.50 V (worst case of Net-(D18-A2))22.0%16.00 V↓
C43HDMI_5V25.00 V17.50 V5.00 V20.0%16.00 V↓
C31VDD33A_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C193V3_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C283V3_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C5+3V325.00 V17.50 V3.30 V13.2%16.00 V↓
C10+3V325.00 V17.50 V3.30 V13.2%16.00 V↓
C11+3V325.00 V17.50 V3.30 V13.2%16.00 V↓
C4+3V325.00 V17.50 V3.30 V13.2%16.00 V↓
C6+3V325.00 V17.50 V3.30 V13.2%16.00 V↓
C30VDD33A_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C34VDD33A_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C32VDD33A_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C223V3_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C133V3_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C353V3_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C46Net-(U13-VIN)25.00 V17.50 V3.30 V13.2%16.00 V↓
C253V3_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C36VDD33A_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C33VDD33A_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C29VDD33A_LAN125.00 V17.50 V3.30 V13.2%16.00 V↓
C49+5V50.00 V35.00 V5.50 V (worst case of Net-(D18-A2))11.0%16.00 V↓
C50+5V50.00 V35.00 V5.50 V (worst case of Net-(D18-A2))11.0%16.00 V↓
C23VDD18CORE_LAN150.00 V35.00 V1.80 V3.6%16.00 V↓
C26VDD18CORE_LAN150.00 V35.00 V1.80 V3.6%16.00 V↓
C38+5V10.00 V7.00 V5.50 V (worst case of Net-(D18-A2))55.0%✓
C37+5V10.00 V7.00 V5.50 V (worst case of Net-(D18-A2))55.0%✓
C3Net-(C3-Pad1)10.00 V7.00 V3.30 V33.0%✓
C2Net-(C2-Pad1)10.00 V7.00 V3.30 V33.0%✓
C20+3V310.00 V7.00 V3.30 V33.0%✓
C45+3V310.00 V7.00 V3.30 V33.0%✓
C18VDD18CORE_LAN16.30 V4.41 V1.80 V28.6%✓
C1Net-(C1-Pad1)16.00 V11.20 V3.30 V20.6%✓
C54Net-(C52-Pad1)16.00 V11.20 V3.30 V20.6%✓
C53Net-(C52-Pad1)16.00 V11.20 V3.30 V20.6%✓
C52Net-(C52-Pad1)16.00 V11.20 V3.30 V20.6%✓
C55Net-(C52-Pad1)16.00 V11.20 V3.30 V20.6%✓
Derating Settings Used in This Analysis
ParameterValueSourceApplied
capacitor_voltage_pct30% (70)Quanterion 2nd ed. Table 2.3-1 p37 / Table 3.1-4 p49 - ceramic film mica glassChecked in the table above (41 part(s))
capacitor_aluminum_voltage_pct20% (80)Quanterion 2nd ed. Table 2.3-1 p37Applied by the AI analysis where the rating is in evidence
capacitor_tantalum_mno2_voltage_pct50% (50)Quanterion 2nd ed. Table 2.3-1 p37 standard-process MnO2Applied by the AI analysis where the rating is in evidence
capacitor_tantalum_polymer_voltage_pct20% (80)Quanterion 2nd ed. Table 2.3-1 p37 polymer / enhanced MnO2 / niobiumApplied by the AI analysis where the rating is in evidence
capacitor_ripple_current_pctNot derated by this scheme - the manufacturer's rating is the limitnot stated by this schemeNot applied - the AI is not given this parameter
capacitor_temperature_margin_c10 °CQuanterion 2nd ed. Table 2.3-1 p37 Tmax-10 (ceramic film)Applied by the AI analysis where the rating is in evidence
capacitor_aluminum_temperature_margin_c20 °CQuanterion 2nd ed. Table 2.3-1 p37 Tmax-20Applied by the AI analysis where the rating is in evidence
resistor_power_pct30% (70)Quanterion 2nd ed. Table 2.3-1 p41 film chipApplied by the AI analysis where the rating is in evidence
resistor_working_voltage_pctNot derated by this scheme - the manufacturer's rating is the limitnot stated by this schemeNot applied - the AI is not given this parameter
resistor_temperature_margin_c24 °CQuanterion 2nd ed. Table 2.3-1 p41 film chip Tmax-24Applied by the AI analysis where the rating is in evidence
inductor_continuous_current_pct10% (90)Quanterion 2nd ed. Table 3.12-3 p113 inductor current (DC) 90 % (Severe); s3.12.4 p113 90 % for all magnetics when the hot-spot temperature is not knownApplied by the AI analysis where the rating is in evidence
inductor_surge_current_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p39 magnetics surge <100 %Not applied - the AI is not given this parameter
inductor_continuous_voltage_pct10% (90)Quanterion 2nd ed. s3.12.4 p113 90 % for all magnetics when the hot-spot temperature is not knownApplied by the AI analysis where the rating is in evidence
inductor_surge_voltage_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p39 voltage surge <100 %Not applied - the AI is not given this parameter
inductor_dielectric_withstand_voltage_pctNot derated by this scheme - the manufacturer's rating is the limitnot stated by this schemeNot applied - the AI is not given this parameter
inductor_temperature_margin_c25 °CQuanterion 2nd ed. Table 2.3-1 p39 hot spot Tmax-25Applied by the AI analysis where the rating is in evidence
diode_reverse_voltage_pct20% (80)Quanterion 2nd ed. Table 2.3-1 p38 / Table 3.5 p88Applied by the AI analysis where the rating is in evidence
diode_average_forward_current_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p38 forward current <100 %Not applied - the AI is not given this parameter
diode_power_dissipation_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p38 HF / Schottky / PIN / TVS rows <100 %Not applied - the AI is not given this parameter
diode_junction_temperature_margin_c35 °CQuanterion 2nd ed. Table 3.20-4 p174 formula 0.75(Tjmax-25)+20 = 115 C at 150 CApplied by the AI analysis where the rating is in evidence
diode_junction_temperature_cap_c115 °CQuanterion 2nd ed. Table 2.3-1 p38 Tj 115 CApplied by the AI analysis where the rating is in evidence
mosfet_vds_pct20% (80)Quanterion 2nd ed. Table 3.20-4 p174 breakdown VDSApplied by the AI analysis where the rating is in evidence
mosfet_vgs_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. - VGS not listedNot applied - the AI is not given this parameter
mosfet_continuous_current_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. - no current row for transistorsNot applied - the AI is not given this parameter
mosfet_power_dissipation_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 3.20-4 p174 PD <100 %Not applied - the AI is not given this parameter
mosfet_junction_temperature_margin_c35 °CQuanterion 2nd ed. Table 3.20-4 p174 formula (115 C at 150 C)Applied by the AI analysis where the rating is in evidence
mosfet_junction_temperature_cap_c115 °CQuanterion 2nd ed. Table 3.20-4 p174Applied by the AI analysis where the rating is in evidence
bjt_vce_pct20% (80)Quanterion 2nd ed. Table 3.20-4 p174 breakdown VCEApplied by the AI analysis where the rating is in evidence
bjt_continuous_current_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. - no current row for transistorsNot applied - the AI is not given this parameter
bjt_power_dissipation_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 3.20-4 p174 PD <100 %Not applied - the AI is not given this parameter
bjt_junction_temperature_margin_c35 °CQuanterion 2nd ed. as MOSFETApplied by the AI analysis where the rating is in evidence
bjt_junction_temperature_cap_c115 °CQuanterion 2nd ed. as MOSFETApplied by the AI analysis where the rating is in evidence
regulator_input_voltage_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. - microcircuits carry no supply-voltage rowNot applied - the AI is not given this parameter
regulator_output_current_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p39 linear microcircuits output current <100 %Not applied - the AI is not given this parameter
regulator_power_dissipation_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p39 linear PD <100 %Not applied - the AI is not given this parameter
regulator_junction_temperature_margin_cNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 3.14-3 p122 states one fixed junction figure and no margin below the maximum of the partNot applied - the AI is not given this parameter
regulator_junction_temperature_cap_c115 °CQuanterion 2nd ed. Table 3.14-3 p122 linear microcircuits Tj 115 C whatever the rating of the partApplied by the AI analysis where the rating is in evidence
ic_output_current_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p39 output / drive current <100 %Not applied - the AI is not given this parameter
ic_power_dissipation_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 2.3-1 p39 linear PD <100 %Not applied - the AI is not given this parameter
ic_junction_temperature_margin_cNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. Table 3.14-3 p122 states one fixed junction figure and no margin below the maximum of the partNot applied - the AI is not given this parameter
ic_junction_temperature_cap_c115 °CQuanterion 2nd ed. Table 3.14-3 p122 digital and linear microcircuits Tj 115 C whatever the rating of the part (VHLSI 85 C not carried)Applied by the AI analysis where the rating is in evidence
connector_current_per_contact_pct15% (85)Quanterion 2nd ed. Table 2.3-1 p37Applied by the AI analysis where the rating is in evidence
connector_voltage_pctNot derated by this scheme - the manufacturer's rating is the limitQuanterion 2nd ed. - stated as % of dielectric withstand (80 %) not of working voltageNot applied - the AI is not given this parameter
connector_temperature_margin_c25 °CQuanterion 2nd ed. Table 2.3-1 p37 insert Tmax-25Applied by the AI analysis where the rating is in evidence
relay_contact_current_resistive_pct10% (90)Quanterion 2nd ed. Table 2.3-1 p40 resistiveApplied by the AI analysis where the rating is in evidence
relay_temperature_margin_c20 °CQuanterion 2nd ed. Table 2.3-1 p40 Tmax-20Applied by the AI analysis where the rating is in evidence
tvs_junction_temperature_margin_c35 °CQuanterion 2nd ed. as diodesApplied by the AI analysis where the rating is in evidence
tvs_junction_temperature_cap_c115 °CQuanterion 2nd ed. as diodesApplied by the AI analysis where the rating is in evidence
switch_contact_current_resistive_pct10% (90)Quanterion 2nd ed. Table 2.3-1 p41 resistiveApplied by the AI analysis where the rating is in evidence
fuse_temperature_margin_cNot derated by this scheme - the manufacturer's rating is the limitnot stated by this schemeNot applied - the AI is not given this parameter

2.5 Part Lifecycle and Silicon Errata

Status as found on the manufacturer's website by the AI enrichment run, on the date shown; the page read is linked. Silicon errata: whether the manufacturer publishes an errata sheet for the part - its presence only. No errata document is read or analysed, and no action is implied by its existence.

ItemLifecycleSilicon errataStatus
Q3 (BSS84AK,215)A datasheet could not be obtained, so the life-cycle status could not be determined—Review
C1, C52, C53, C54, C55 (GRM32EC81C476KE15K), L1 (IHLP2525CZER8R2M01), U3, U4, U5 (TXS0108EQPWRQ1)The life-cycle status for this part is indeterminate from the datasheet - please reviewNot determinedReview
C2, C3 (GRM188D71A106MA73D)In Production, as of 2026-10-23—
C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C19, C22, ... (CC0603KRX7R8BB104)There isn't a life-cycle marking on the datasheet obtained 2026-10-12—
C20, C21, C24, C37, C38, C45 (CL10B105KP8NNNC)Active, as of 2026-10-12—
C40, C44, C56 (VPDD202W102K1GV001E)Active, as of 2026-10-12—
C41 (CL21B106KOQNNNE)There isn't a life-cycle marking on the datasheet obtained 2026-10-23—
C49, C50 (CL31B225KBHNNNE)Active, as of 2026-10-12—
D1, D3 (SML-M13UTT86)There isn't a life-cycle marking on the datasheet obtained 2026-10-12—
D2 (ESD9B3.3ST5G)Active, as of 2026-10-12—
D4 (1N4007FL)Active, as of 2026-10-12—
D5, D7, D8, D21, D23 (SML-M13MTT86)There isn't a life-cycle marking on the datasheet obtained 2026-10-23—
D6 (SML-LXFM0603SIC-TR)There isn't a life-cycle marking on the datasheet obtained 2026-08-24—
D9, D10, D14, D16, D17, D18, D19, D20, D24, D25, D26, D27, ... (ESD9B5.0ST5G)Active, as of 2026-10-14—
D11 (PTVS5V0S1UR,115)Active, as of 2026-10-25—
D12, D13, D15 (RClamp0524PATCT)Active, as of 2026-10-23—
D22 (PDS760Q-13)There isn't a life-cycle marking on the datasheet obtained 2026-10-23—
F1 (3216FF5-R)Active, as of 2026-10-12—
FB1, FB2 (BLM18PG121SH1D)In Production, as of 2026-10-23—
J4 (ARJM11D7-009-AB-EW2)Active, as of 2026-10-14—
K1 (IM03GR)There isn't a life-cycle marking on the datasheet obtained 2026-10-12—
Q1, Q2, Q4, Q5, Q6 (2N7002W)Active, as of 2026-10-12—
Q7 (AONR21307)Active, as of 2026-10-14—
S1 (PTS810SJM250SMT)Active, as of 2026-10-12—
U2 (RPi-CM4S_RA)There isn't a life-cycle marking on the datasheet obtained 2026-09-10Not determined
U6 (TXB0108PWR)Active, as of 2026-08-24None found on the manufacturer's website, as of 2026-08-24
U7 (SN74LVC1G17DCKR)ACTIVE, as of 2026-10-14None found on the manufacturer's website, as of 2026-10-14
U8, U11, U12, U13, U14 (RT9742QGJ5)There isn't a life-cycle marking on the datasheet obtained 2026-10-14Not determined
U9 (LAN9512I-JZX)There isn't a life-cycle marking on the datasheet obtained 2026-09-02Errata sheet published: LAN951X
U10 (93LC66AT-I/OT)Active, as of 2026-08-24None found on the manufacturer's website, as of 2026-08-24
U16 (FSUSB42MUX)Active, as of 2026-10-25None found on the manufacturer's website, as of 2026-10-25
U19 (HUSB238)There isn't a life-cycle marking on the datasheet obtained 2026-10-25Not determined
U20 (LMR14050SDDA)Active Production, as of 2026-10-14None found on the manufacturer's website, as of 2026-10-14
Y1 (FY2500117)There isn't a life-cycle marking on the datasheet obtained 2026-10-12—

3 Pin Connectivity Report

3.1 Unconnected Pins

Unconnected pins that are not marked NO_ERC.

36 unconnected pin(s) found:
Refdes_PinPin FunctionPin PropertyDevice TypeNet NameNotes
H7_11InputBattery+Net-(H7-Pad1)
J2_27Pin_27PassiveS2G20C_02x20ID_SD
J2_28Pin_28PassiveS2G20C_02x20ID_SC
J4_7NCUnknownRJ45-POE_ARJM11D7-009-AB-EW2-No net
U2_124NCUnknownRPi-CM4S_RA-No net
U2_126NCUnknownRPi-CM4S_RA-No net
U2_130NCUnknownRPi-CM4S_RA-No net
U2_132NCUnknownRPi-CM4S_RA-No net
U2_154NCUnknownRPi-CM4S_RA-No net
U2_156NCUnknownRPi-CM4S_RA-No net
U2_160NCUnknownRPi-CM4S_RA-No net
U2_162NCUnknownRPi-CM4S_RA-No net
U2_179VDD_CORE_(DO_NOT_CONNECT)UnknownRPi-CM4S_RA-No net
U2_183NCUnknownRPi-CM4S_RA-No net
U2_184NCUnknownRPi-CM4S_RA-No net
U2_185NCUnknownRPi-CM4S_RA-No net
U2_186NCUnknownRPi-CM4S_RA-No net
U6_4A3BidirectionalTXB0108PWNet-(U6-A3)
U6_5A4BidirectionalTXB0108PWNet-(U6-A4)
U6_6A5BidirectionalTXB0108PWNet-(U6-A5)
U6_7A6BidirectionalTXB0108PWNet-(U6-A6)
U6_8A7BidirectionalTXB0108PWNet-(U6-A7)
U6_9A8BidirectionalTXB0108PWNet-(U6-A8)
U6_12B8BidirectionalTXB0108PWNet-(U6-B8)
U6_13B7BidirectionalTXB0108PWNet-(U6-B7)
U6_14B6BidirectionalTXB0108PWNet-(U6-B6)
U6_15B5BidirectionalTXB0108PWNet-(U6-B5)
U6_16B4BidirectionalTXB0108PWNet-(U6-B4)
U6_17B3BidirectionalTXB0108PWNet-(U6-B3)
U9_6NCUnknownLAN9512i-No net
U9_7NCUnknownLAN9512i-No net
U9_8NCUnknownLAN9512i-No net
U9_9NCUnknownLAN9512i-No net
U9_17NCUnknownLAN9512i-No net
U9_18NCUnknownLAN9512i-No net
U19_9ISETInputHUSB238Net-(U19-ISET)

3.2 Implied/Hidden Net Connections

Pins with implied net connections not visible on the schematic. Includes Altium HiddenNetName library parameters and KiCad hidden pins of any electrical type stacked behind visible pins in the symbol.

Implied Net Connections
ComponentTypePinNetStatus
Q7AONR213072 (S2)Net-(Q7-S1)Hidden pin not visible on schematic
Q7AONR213073 (S3)Net-(Q7-S1)Hidden pin not visible on schematic
D22PDS760Q3 (A)GNDHidden pin not visible on schematic
D12RClamp0524PA8 (GND)GNDHidden pin not visible on schematic
D13RClamp0524PA8 (GND)GNDHidden pin not visible on schematic
D15RClamp0524PA8 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA20 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA55 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA19 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA109 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA8 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA41 (GPIO28-45_VDD)Net-(C3-Pad1)Hidden pin not visible on schematic
U2RPi-CM4S_RA13 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA14 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA25 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA97 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA26 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA31 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA104 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA43 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA32 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA37 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA140 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA39 (GPIO0-27_VDD)Net-(C2-Pad1)Hidden pin not visible on schematic
U2RPi-CM4S_RA103 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA44 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA49 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA50 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA56 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA122 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA61 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA187 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA121 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA62 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA182 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA67 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA86 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA68 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA115 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA74 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA79 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA80 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA128 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA85 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA98 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA110 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA116 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA181 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA127 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA133 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA134 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA139 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA145 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA189 (VDAC)Net-(R9-Pad2)Hidden pin not visible on schematic
U2RPi-CM4S_RA146 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA151 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA152 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA157 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA158 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA163 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA164 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA169 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA170 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA188 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA191 (3V3)Net-(C1-Pad1)Hidden pin not visible on schematic
U2RPi-CM4S_RA192 (3V3)Net-(C1-Pad1)Hidden pin not visible on schematic
U2RPi-CM4S_RA193 (3V3)Net-(C1-Pad1)Hidden pin not visible on schematic
U2RPi-CM4S_RA195 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA197 (VBAT)+BATTHidden pin not visible on schematic
U2RPi-CM4S_RA198 (VBAT)+BATTHidden pin not visible on schematic
U2RPi-CM4S_RA199 (VBAT)+BATTHidden pin not visible on schematic
U2RPi-CM4S_RA1 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA92 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA4 (SDX_VDD)SD_VDDHidden pin not visible on schematic
U2RPi-CM4S_RA7 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA91 (GND)GNDHidden pin not visible on schematic
U2RPi-CM4S_RA73 (GND)GNDHidden pin not visible on schematic
J3SVORK_45DEG_01x03_3.5MM6 (Pin_6)RELAY1_NCHidden pin not visible on schematic
J3SVORK_45DEG_01x03_3.5MM2 (Pin_2)RELAY1_NOHidden pin not visible on schematic
J3SVORK_45DEG_01x03_3.5MM4 (Pin_4)RELAY1_COMHidden pin not visible on schematic
J8USB_A_2x_5787745-1S2 (SHIELD)Net-(J7-SHIELD)Hidden pin not visible on schematic
J8USB_A_2x_5787745-1S3 (SHIELD)Net-(J7-SHIELD)Hidden pin not visible on schematic
J8USB_A_2x_5787745-1S4 (SHIELD)Net-(J7-SHIELD)Hidden pin not visible on schematic
J9USB_C_USB2.0_1.6mmB12 (GND)GNDHidden pin not visible on schematic
J9USB_C_USB2.0_1.6mmB1 (GND)GNDHidden pin not visible on schematic
J9USB_C_USB2.0_1.6mmA9 (VBUS)Net-(D18-A2)Hidden pin not visible on schematic
J9USB_C_USB2.0_1.6mmA12 (GND)GNDHidden pin not visible on schematic
J9USB_C_USB2.0_1.6mmB4 (VBUS)Net-(D18-A2)Hidden pin not visible on schematic
J9USB_C_USB2.0_1.6mmB9 (VBUS)Net-(D18-A2)Hidden pin not visible on schematic
J7USB_C_USB2.0_1.6mm_FlagA9 (VBUS)USB_BOOT_VBUSHidden pin not visible on schematic
J7USB_C_USB2.0_1.6mm_FlagB1 (GND)GNDHidden pin not visible on schematic
J7USB_C_USB2.0_1.6mm_FlagA12 (GND)GNDHidden pin not visible on schematic
J7USB_C_USB2.0_1.6mm_FlagB9 (VBUS)USB_BOOT_VBUSHidden pin not visible on schematic
J7USB_C_USB2.0_1.6mm_FlagB12 (GND)GNDHidden pin not visible on schematic
J7USB_C_USB2.0_1.6mm_FlagB4 (VBUS)USB_BOOT_VBUSHidden pin not visible on schematic

3.3 Open-Collector Pull-up Audit

Examined 1 candidate pin(s) on 1 net(s). 1 to verify with destination IC.
Open-collector / open-drain outputs need an external pull-up resistor to a power rail to function. This audit lists pins where a pull-up appears to be missing or where the pin type may not match the schematic library.
FindingRecommended ActionSeverity
U19_10 (GATE) on Net-(U19-GATE)
U19 (HUSB238)
USB-PD Sink IC Port Controller, VBUS = 3..25V, WDFN-10
on-board only · library: Open Collector
Information: this net may be missing a pull-up. The destination IC (MCU/FPGA/other) may enable a configurable internal pull-up — verify its datasheet. If none, add an external pull-up to a power rail.Review

3.4 Diode Polarity / Orientation

Diode polarity and orientation are read from the schematic. IPC-7351B (surface mount) / IPC-7251 (through-hole) Zero Component Orientation (ZCO) requires pin 1, the cathode, on the left with the footprint at zero rotation. Tomachie calls out symbols that do not meet ZCO because the PCB layout may have an error, assembly may insert the part backwards, initial ATE test generation from a netlist of only pins 1 and 2 will fail, or a novice may wrongly indict a correct part — consistency is the least-expensive path for everyone who handles the PCB.
DiodeConnectionsOrientationSeverity
D11
PTVS5V0S1UR,115
unidirectional · pin_names
Pin 1 (K): SD_PWR
Pin 2 (A): GND
Consistent
D4
1N4007FL
unidirectional · pin_names · Flyback Protection
Pin 1 (K): +5V
Pin 2 (A): Net-(D4-A)
Consistent
D35
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): SD_CLK
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D10
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): SD_DAT1
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D32
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): SD_DAT2
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D34
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): SD_CMD
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D9
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): SD_DAT0
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D33
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): SD_DAT3
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D2
ESD9B3.3ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): RUN
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D17
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): Net-(D17-A2)
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D20
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_D-
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D16
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): Net-(D16-A2)
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D22
PDS760Q-13
array · multi-pin · Schottky Rectifier
Pin 1 (K): Net-(D22-K)
Pin 2 (A): GND
Pin 3 (A): GND
3-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D18
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): Net-(D18-A2)
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D19
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_D+
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D25
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_BOOT_VBUS
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D24
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_BOOT_P
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D26
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_OTG_1_P
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D27
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_OTG_2_P
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D28
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_OTG_1_N
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D29
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_OTG_2_N
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D30
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): 5V_OTG_1
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D31
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): 5V_OTG_2
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D14
ESD9B5.0ST5G
bidirectional · symbol_graphic
Pin 1 (A1): GND
Pin 2 (A2): USB_BOOT_N
Bidirectional (symmetric) — no single anode/cathode, so there is no orientation to check.Information
D12
RClamp0524PATCT
array · multi-pin
Pin 1 (IN1): HDMI0_D2_P
Pin 2 (IN2): HDMI0_D2_N
Pin 3 (GND): GND
Pin 4 (IN3): HDMI0_D1_P
Pin 5 (IN4): HDMI0_D1_N
Pin 6 (OUT4): HDMI0_D1_N
Pin 7 (OUT3): HDMI0_D1_P
Pin 8 (GND): GND
Pin 9 (OUT2): HDMI0_D2_N
Pin 10 (OUT1): HDMI0_D2_P
10-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D15
RClamp0524PATCT
array · multi-pin
Pin 1 (IN1): HDMI0_HOTPLUG
Pin 2 (IN2): HDMI0_SDA
Pin 3 (GND): GND
Pin 4 (IN3): HDMI0_SCL
Pin 5 (IN4): HDMI0_CEC
Pin 6 (OUT4): HDMI0_CEC
Pin 7 (OUT3): HDMI0_SCL
Pin 8 (GND): GND
Pin 9 (OUT2): HDMI0_SDA
Pin 10 (OUT1): HDMI0_HOTPLUG
10-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information
D13
RClamp0524PATCT
array · multi-pin
Pin 1 (IN1): HDMI0_D0_P
Pin 2 (IN2): HDMI0_D0_N
Pin 3 (GND): GND
Pin 4 (IN3): HDMI0_CK_P
Pin 5 (IN4): HDMI0_CK_N
Pin 6 (OUT4): HDMI0_CK_N
Pin 7 (OUT3): HDMI0_CK_P
Pin 8 (GND): GND
Pin 9 (OUT2): HDMI0_D0_N
Pin 10 (OUT1): HDMI0_D0_P
10-pin diode package will need to be checked against the datasheet in one of the AI enrichment sections.Information

3.5 Checks Not Performed

Items this report did not check, with the reason. None of these is a finding against the design - an item that was not checked says nothing about it either way.

Note 3: The figure these checks need was not taken from the part's datasheet, so they were not performed. This is a limitation of the analysis, not a finding on the design.

Checks the AI review could not perform are listed at Review severity in each AI section's Findings table, each naming the input that was missing.

ItemNot checkedNotes
Part Number vs Stated Values1 of 113 fitted resistor/inductor/capacitor part(s) carry no ordering part number: R13. Without a part number the BOM cannot state what to buy, and none of the part-number cross-checks in this section can run for these parts. Add a manufacturer part number to each part in the library.
Capacitors and resistors (datasheets and parameter curves)Datasheets for capacitors and resistors, and the parameter curves they carry (ripple current, derating against temperature, DC bias, a jumper's temperature rise), are obtained on the premium tier only. This standard-tier run reads a datasheet already on file and otherwise states no rating for these parts. The exception is a capacitor on a regulator's input or output rail: this tier obtains its datasheet and curves as well.
R36, R55, R56, R57, R20, C39 (LAN9512I-JZX)Line bias resistor value and centre-tap feed and bypass of the 10/100 PHY against the manufacturer's magnetics interface (recommended line termination resistance and centre-tap supply network)See note 3
U2, D12, D13 (RPi-CM4S_RA)TMDS insertion loss and capacitive loading of the HDMI ESD arrays judged at the HDMI0 lane rate (maximum HDMI TMDS bit rate of HDMI0)See note 3
U2, D14, D24, U16 (RPi-CM4S_RA)Total capacitive load on USB_DP and USB_DM including multiplexer and ESD parts (maximum line capacitance allowed on the USB 2.0 port)See note 3
U9, U10 (LAN9512I-JZX, 93LC66AT-I)Whether the LAN9512 EEPROM controller supports a 512 x 8 (93C66-class) Microwire EEPROM and its address width (Supported EEPROM type, size and address width of the LAN9512 EEPROM interface)See note 3
U9 (LAN9512I-JZX)Predicted junction temperature at the 763 mW 100BASE-TX dissipation against the maximum junction temperature (junction-to-ambient thermal resistance)See note 3
D6 (SML-LXFM0603SIC-TR)LED current through R23 against the LED's forward current rating (maximum continuous forward current)See note 3
K1 (IM03GR)Contact current and switching voltage against the contact ratings (contact current and contact voltage ratings)See note 3
Q3 (BSS84AK,215)Turn-on of the D3 reset indicator at -3.3 V gate-source drive from RUN (gate threshold voltage and Rds(on) at VGS -3.3 V)See note 3
K1 (IM03GR)Withstand of the contact-to-coil insulation against IEC 61000-4-4 and IEC 61000-4-5 transients entering on J3 (dielectric strength, contact to coil)See note 3
D9, D10, D14, D16-D20, D24-D35 (ESD9B5.0ST5G)System-level ESD withstand of the clamp itself against IEC 61000-6-2 levels (IEC 61000-4-2 contact and air discharge rating)See note 3
Part life-cycleThe life-cycle status for this part is indeterminate from the datasheet - please review

3.6 Summary

Total NO_ERC markers in design79
Pins needing attention (warnings)36
Pins for information only0

4 Power Overview

Power rails20
Power management sources identified9
Analysis of passive component footprint suitability, voltage ratings, and power dissipation is not performed in this revision.
Power architecture overview. For test point coverage, see Design-for-Test section.

4.1 Values Entered for This Analysis

These values were entered by the designer for this analysis; they are not read from the schematic. Every check in this report that needs one of them uses the figure shown here.
KindEntered forValue entered
Power inputNet-(D18-A2)5 V nominal, 4.75-5.5 V operating
Power inputUSB_BOOT_VBUS5 V nominal, 4.75-5.5 V operating

4.2 Power Rail Analysis

RELAY1_COM was found and is considered switched power; its details will be asked when running AI enrichment.
Power Rails
RailVoltageSourceConsumers
+5V5.00VQ7
AONR21307
U11/U12 (RT9742QGJ5),
U20 (LMR14050SDDA),
U3-U5 (TXS0108EQPWRQ1),
U6 (TXB0108PWR)
5V_OTG_15.00VU11
RT9742QGJ5
-
5V_OTG_25.00VU12
RT9742QGJ5
-
HDMI_5V5.00VU14
RT9742QGJ5
-
Net-(D18-A2)5.00VJ9
External
Q7 (AONR21307),
U19 (HUSB238)
Net-(U14-EN)5.00VQ7
AONR21307
U14 (RT9742QGJ5)
USB_BOOT_VBUS5.00VJ1
External
-
Net-(C52-Pad1)3.30VU20
LMR14050SDDA
-
+3V33.30VU20
LMR14050SDDA
U16 (FSUSB42MUX),
U3-U5 (TXS0108EQPWRQ1),
U6 (TXB0108PWR),
U7 (SN74LVC1G17DCKR),
U8 (RT9742QGJ5)
+BATT3.30VU20
LMR14050SDDA
U2 (RPi-CM4S_RA)
3V3_LAN13.30VU8
RT9742QGJ5
U10 (93LC66AT-I/OT),
U9 (LAN9512I-JZX)
Net-(C1-Pad1)3.30VU20
LMR14050SDDA
U2 (RPi-CM4S_RA)
Net-(C2-Pad1)3.30VU20
LMR14050SDDA
U2 (RPi-CM4S_RA)
Net-(C3-Pad1)3.30VU20
LMR14050SDDA
U2 (RPi-CM4S_RA)
Net-(U13-VIN)3.30VU20
LMR14050SDDA
U13 (RT9742QGJ5)
VDD33A_LAN13.30VU8
RT9742QGJ5
U9 (LAN9512I-JZX)
VDD18CORE_LAN11.80VU9
LAN9512I-JZX
-
Earth---
GND-J1
External
-
SD_PWR-U13
RT9742QGJ5
-

4.2.1 Rail Voltage Annotation

The preferred way to state a rail's voltage is to record it in the design itself, where it travels with the schematic, survives every re-run, and can be read by anyone who opens the design: add VOLTAGE_NOM, VOLTAGE_MIN and VOLTAGE_MAX properties to the rail's net class directive, and VOLTAGE_EXCURSION_MAX for a survivable level outside normal operation.
2 power input(s) into this board were identified and characterized as follows. These are the levels the analysis uses.
RailVoltage supplied
Net-(D18-A2)5.00 V nominal, 4.75-5.50 V operating
USB_BOOT_VBUS5.00 V nominal, 4.75-5.50 V operating

4.3 USB-PD Contract Override Hazard

1 USB Type-C port(s) carry a USB-PD sink controller whose I2C port is wired to a bus mastered by a device that runs firmware. The controller's configuration strap sets the contract at power-up, but a register write can request a higher contract, and nothing in hardware on the rail stops it.
The part number supplied, HUSB238, names the family and no ordering variant. Where the family offers a variant with the I2C request path factory-disabled, or one that cannot request above the strapped level, that variant would remove this hazard; from the part number supplied it cannot be known whether such a variant was planned, and the controller's I2C wiring to U2 says it was not.
The controller's datasheet on the request path: The I2C has the highest priority. If using I2C to select a source PDO, it over writes the internal RDO which is created by VSET, ISET pins and internal factory fuse option, and the HUSB238 requests the I2C selected source PDO once the I2C commands are written (page 10).
FindingSeverity
PortJ9
ControllerU19 [HUSB238]
I2C masterU2 [RPi-CM4S_RA]
Strapped contractVSET=Net-(U19-VSET) via R42 (0R) to GND -> 5 V (datasheet p.9)
Requestable ceiling20.0 V
The Net-(D18-A2) rail is not protected from a USB-PD contract above the strap being enabled over I2C by firmware. Absent such a variant, an over-voltage element that disconnects the rail above the strapped level is the protection against an errant request, from AI-generated or any other software.Medium

4.4 Regulator Enable Pull Resistors

6 regulator enable pin(s) examined for what drives them and which way they are pulled. 0 pulled toward the enabling level while a power output drives the net.
FindingSeverity
RegulatorU13 [RT9742QGJ5]
Enable pinU13_4 (EN) (enabled high)
NetSD_VDD
Driven byU2_6 (SDX_VDD), a supply input (not a driver)
Pull-upR28 10k -> Net-(U13-VIN)
Pull-down-
The pull resistor holds the enable at its enabling level, so U13 is on; the same node carries U2_6 (SDX_VDD), a supply input of another part, and no power source feeds it. See the supply-input rows.Information
RegulatorU20 [LMR14050]
Enable pinU20_3 (EN) (enabled high)
Net+5V
Driven by-
Pull-up-
Pull-down-
The enable is wired to +5V; the regulator is always enabled.Information
RegulatorU11 [RT9742QGJ5]
Enable pinU11_4 (EN) (enabled high)
NetPRTCTL2_OTG_1
Driven byU9_14 (PRTCTL2)
Pull-up-
Pull-down-
Driven by the pins listed; no pull resistor is fitted.Information
RegulatorU12 [RT9742QGJ5]
Enable pinU12_4 (EN) (enabled high)
NetPRTCTL3_OTG_2
Driven byU9_16 (PRTCTL3)
Pull-up-
Pull-down-
Driven by the pins listed; no pull resistor is fitted.Information
RegulatorU8 [RT9742QGJ5]
Enable pinU8_4 (EN) (enabled high)
NetLAN1_EN
Driven byU2_30 (GPIO29)
Pull-up-
Pull-down-
Driven by the pins listed; no pull resistor is fitted.Information
RegulatorU14 [RT9742QGJ5]
Enable pinU14_4 (EN) (enabled high)
NetNet-(U14-EN)
Driven by-
Pull-up-
Pull-down-
The enable is wired to Net-(U14-EN); the regulator is always enabled.Information

4.5 Supply Inputs With No Power Source

4 supply input pin(s) on nets that are not power rails were examined. 1 net(s) reach a rail only through a pull resistor.
FindingSeverity
Supply pinU2_6 (SDX_VDD)
PartU2 [RPi-CM4S_RA]
NetSD_VDD
Fed throughR28 10k -> Net-(U13-VIN)
Shares the node withU13_4 (EN)
No power source feeds U2_6 (SDX_VDD), a supply input by its datasheet: its net SD_VDD reaches a rail only through R28 10k -> Net-(U13-VIN), a pull resistor that delivers only current-limited power. Designer to confirm how this input is meant to be fed. U13_4 (EN) shares the node; the pull resistor holds that enable on, but it is not a supply for the input. The lines it feeds (SDX_CLK, SDX_CMD, SDX_D0, SDX_D1, SDX_D2, SDX_D3) reach J5 [microSD_MEM2052-00-195-00-A], whose supply SD_PWR is sourced by U13; with that side powered and this input not, the powered side back-drives the pads through those lines.Medium

4.6 Power Tree Diagram

This diagram shows how power flows on this board, from the schematic: where it enters, each regulator, each rail, the parts it passes through and the loads on each rail. A large tree is split into several figures; a rail that continues in another figure names that figure.

Power Control / bias supply (EN, VCTRL) SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) F1 PTC_32V_5A_1206 DCR 14 mΩ Q7 AONR21307 Rds(on) 11 mΩ R37 10R R45 0R U19 3.1 mA +5V Fig. 4-3 5 V 5 V Net-(D18-A2) 5 V Net-(Q7-D) 5 V Net-(Q7-S1) Net-(U19-VIN) SOURCE J9 5 V out Figure 4-2 J9 +5V SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 6 loads, at least 1.52 mA 3 loads, at least 1.06 mA L1 8u2 DCR 68 mΩ R29 0R R50 0R R47 → R48 → GND 50 µA R58 → U2_175 532 µA R5 → U2_173 532 µA U3 506 µA U4 506 µA U5 506 µA U6 5 µA J2_2 leaves the board J2_4 leaves the board J6_18 leaves the board +3V3 Fig. 4-4 3.3 V +5V Fig. 4-2 5 V 5V_OTG_1 5 V 5V_OTG_2 5 V HDMI_5V 5 V 3.3 V Net-(C52-Pad1) 5 V Net-(U14-EN) U11 load switch U12 load switch U14 load switch SMPS U20 3.3 V out efficiency 89.6 % J8 5V_OTG_1: 500 mA 5V_OTG_2: 500 mA Figure 4-3 +5V +3V3 SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 12 loads, at least 2.05 mA R10 0R R27 0R R59 0R R6 0R R8 0R R28 → U13_4 165 µA R31 → U16_2 35.1 µA R43 → U19_7 500 µA R44 → U19_6 500 µA R4 → U2_177 16.5 µA R9 → U2_189 current unknown U16 1 µA U3 332 µA U4 332 µA U5 332 µA U6 5 µA U7 draws what it drives J2_1 leaves the board J2_17 leaves the board J5_4 leaves the board +3V3 Fig. 4-3 3.3 V +BATT 3.3 V 3V3_LAN1 Fig. 4-5 3.3 V 3.3 V Net-(C1-Pad1) 3.3 V Net-(C2-Pad1) 3.3 V Net-(C3-Pad1) 3.3 V Net-(U13-VIN) SD_PWR 3.3 V U13 load switch U8 load switch U2 Net-(C1-Pad1): 303 mA Net-(C2-Pad1): draws what it drives Net-(C3-Pad1): draws what it drives +BATT: 2.12 A Figure 4-4 +3V3 1 of 19 loads without a current +3V3 3V3_LAN1 SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 4 loads, 2.33 mA 4 loads, current unknown FB2 120R DCR 50 mΩ R12 → U9_12 165 µA R16 → U9_11 2 mA R18 → U9_41 165 µA R36 draws what it drives R55 draws what it drives R56 draws what it drives R57 draws what it drives U10 1 µA MAKES A SUPPLY U9 3V3_LAN1: 96 mA VDD33A_LAN1: 177 mA 3V3_LAN1 Fig. 4-4 3.3 V VDD18CORE_LAN1 1.8 V VDD33A_LAN1 3.3 V Figure 4-5 3V3_LAN1 SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 5 loads, at least 117 µA R35 → GND 117 µA J7_A4 leaves the board J7_A9 leaves the board J7_B4 leaves the board J7_B9 leaves the board USB_BOOT_VBUS 5 V SOURCE J1 5 V out Figure 4-6 J1 SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) C40 || R26 1n0_2kV || 1M C44 || R30 1n0_2kV || 1M C56 || R54 1n0_2kV || 1M Earth Net-(J6-CKS) Net-(J7-SHIELD) GND GND GND Figure 4-7 Earth, Net-(J6-CKS), Net-(J7-SHIELD) SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) TERMINAL J3 J3 external load voltage and current not stated K1 IM03GR RELAY1_COM RELAY1_NO Figure 4-8 J3 1 of 1 loads without a current
Figure 4-1: Power tree overview
Back to the overview
SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) F1 PTC_32V_5A_1206 DCR 14 mΩ Q7 AONR21307 Rds(on) 11 mΩ R37 10R R45 0R U19 3.1 mA +5V Fig. 4-3 5 V 5 V Net-(D18-A2) 5 V Net-(Q7-D) 5 V Net-(Q7-S1) Net-(U19-VIN) SOURCE J9 5 V out
Figure 4-2: power entering at J9
Back to the overview
SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 6 loads, at least 1.52 mA 3 loads, at least 1.06 mA L1 8u2 DCR 68 mΩ R29 0R R50 0R R47 → R48 → GND 50 µA R58 → U2_175 532 µA R5 → U2_173 532 µA U3 506 µA U4 506 µA U5 506 µA U6 5 µA J2_2 leaves the board J2_4 leaves the board J6_18 leaves the board +3V3 Fig. 4-4 3.3 V +5V Fig. 4-2 5 V 5V_OTG_1 5 V 5V_OTG_2 5 V HDMI_5V 5 V 3.3 V Net-(C52-Pad1) 5 V Net-(U14-EN) U11 load switch U12 load switch U14 load switch SMPS U20 3.3 V out efficiency 89.6 % J8 5V_OTG_1: 500 mA 5V_OTG_2: 500 mA
Figure 4-3: +5V rail
Back to the overview
SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 12 loads, at least 2.05 mA R10 0R R27 0R R59 0R R6 0R R8 0R R28 → U13_4 165 µA R31 → U16_2 35.1 µA R43 → U19_7 500 µA R44 → U19_6 500 µA R4 → U2_177 16.5 µA R9 → U2_189 current unknown U16 1 µA U3 332 µA U4 332 µA U5 332 µA U6 5 µA U7 draws what it drives J2_1 leaves the board J2_17 leaves the board J5_4 leaves the board +3V3 Fig. 4-3 3.3 V +BATT 3.3 V 3V3_LAN1 Fig. 4-5 3.3 V 3.3 V Net-(C1-Pad1) 3.3 V Net-(C2-Pad1) 3.3 V Net-(C3-Pad1) 3.3 V Net-(U13-VIN) SD_PWR 3.3 V U13 load switch U8 load switch U2 Net-(C1-Pad1): 303 mA Net-(C2-Pad1): draws what it drives Net-(C3-Pad1): draws what it drives +BATT: 2.12 A
Figure 4-4: +3V3 rail
Back to the overview
SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 4 loads, 2.33 mA 4 loads, current unknown FB2 120R DCR 50 mΩ R12 → U9_12 165 µA R16 → U9_11 2 mA R18 → U9_41 165 µA R36 draws what it drives R55 draws what it drives R56 draws what it drives R57 draws what it drives U10 1 µA MAKES A SUPPLY U9 3V3_LAN1: 96 mA VDD33A_LAN1: 177 mA 3V3_LAN1 Fig. 4-4 3.3 V VDD18CORE_LAN1 1.8 V VDD33A_LAN1 3.3 V
Figure 4-5: 3V3_LAN1 rail
Back to the overview
SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) 5 loads, at least 117 µA R35 → GND 117 µA J7_A4 leaves the board J7_A9 leaves the board J7_B4 leaves the board J7_B9 leaves the board USB_BOOT_VBUS 5 V SOURCE J1 5 V out
Figure 4-6: power entering at J1
Back to the overview
SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) C40 || R26 1n0_2kV || 1M C44 || R30 1n0_2kV || 1M C56 || R54 1n0_2kV || 1M Earth Net-(J6-CKS) Net-(J7-SHIELD) GND GND GND
Figure 4-7: Chassis and shield connections
Back to the overview
SOURCE LDO SMPS MAKES A SUPPLY Rail Load Current unknown Power Control / bias supply (EN, VCTRL) TERMINAL J3 J3 external load voltage and current not stated K1 IM03GR RELAY1_COM RELAY1_NO
Figure 4-8: power carried through K1

4.7 DC Power Integrity (Pre-Layout)

The schematic part of power integrity, at each rail's worst-case current: 15 rails with series parts, 18 loads with a datasheet minimum supply voltage, 6 regulators. Each margin starts from the rail's low end: the minimum stated for it, else its regulator's output band (the datasheet accuracy figure and the feedback resistors' tolerance), else only its nominal. Line and load regulation are not included. The copper part - IR drop in traces, planes and vias - is checked after layout, against the copper budget given here for each rail.

4.7.1 Power Budget Findings

FindingSeverity
Rail5V_OTG_1
5V_OTG_1 cannot guarantee J8's supply: at its stated minimum the rail is 4.750 V, and its series parts (U11 70 mΩ, F1 14 mΩ, Q7 11 mΩ, R45 50 mΩ, J9 cable (USB Type-C allowance) 250 mΩ) take 1048.4 mV, 1048.4 mV below J8's 4.750 V minimum, before any copper drop. This needs attention before layout. Suggested remedy: Run the board from a USB supply that holds close to 5 V, over a short, good-quality cable, because the cable allowance at J9 is the largest drop in the path to J8. The on-board drops through R45, F1, Q7 and U11 add more, so keep those copper paths short and wide. J8 needs at least 4.75 V while the path starts from a nominal 5 V, so for a NEW BOARD REVISION feed the OTG ports from a separate regulated 5 V supply placed after these drops, not straight from the USB input.High
Rail5V_OTG_2
5V_OTG_2 cannot guarantee J8's supply: at its stated minimum the rail is 4.750 V, and its series parts (U12 70 mΩ, F1 14 mΩ, Q7 11 mΩ, R45 50 mΩ, J9 cable (USB Type-C allowance) 250 mΩ) take 1048.4 mV, 1048.4 mV below J8's 4.750 V minimum, before any copper drop. This needs attention before layout. Suggested remedy: Run the board from a USB supply that holds close to 5 V, over a short, good-quality cable, because the cable allowance at J9 is the largest drop in the path to J8. The on-board drops through R45, F1, Q7 and U12 add more, so keep those copper paths short and wide. J8 needs at least 4.75 V while the path starts from a nominal 5 V, so for a NEW BOARD REVISION feed the OTG ports from a separate regulated 5 V supply placed after these drops, not straight from the USB input.High
Rail+5V
U20: worst-case input 3.737 V on +5V (from the source's stated minimum) is below its 4 V minimum. Suggested remedy: Run the board from a USB supply that holds close to 5 V, over a short, good-quality cable, because the J9 cable allowance takes the largest share of the voltage before U20, which needs at least 4.0 V at its input. Keep the supply and return copper from J9 through R45, Q7 and F1 to U20 as short and wide as possible to cut the remaining drop. U20 accepts inputs up to 40.0 V, so for a NEW BOARD REVISION power it from a higher-voltage input rather than USB, so that the cable and series drops no longer push it below its minimum.High

4.7.2 Regulator Output Band

RailRegulatorRail Nominal (V)Band at 25 °C (V)Band at 40 °C (V)Worked Out FromStatusSeverity
Net-(C52-Pad1)U20 [LMR14050SDDA]3.3003.224 - 3.3783.185 - 3.419Reference 0.744 - 0.756 V (datasheet page 5); feedback resistors ±1 % and ±1 %; stated at 25 °C only; 0.735 - 0.765 V at 40 °C (datasheet page 5)3.185 - 3.419 V at 40 °CInformation

4.7.3 Series Parts on Each Rail

RailFromWorst-Case Current (A)Series PartsDrop (mV)Drop from Source (mV)NotesStatusSeverity
+3V3Net-(C52-Pad1)2.846R50 50.0 mOhm142.3142.3At least this much: the current of U7, U8 is not fully knownR50: 2.846 A, above its 2 A rating; Drop at least 142.3 mVHigh
+5VNet-(D18-A2)3.116F1 14.0 mOhm, Q7 11.0 mOhm, R45 50.0 mOhm233.71013.4At least this much: the current of U20 is not fully knownR45: 3.116 A, above its 2 A rating; Drop at least 233.7 mVHigh
+BATT+3V32.120R59 50.0 mOhm106.0248.3R59: 2.120 A, above its 2 A rating; Drop 106.0 mVHigh
SD_PWRNet-(U13-VIN)-U13 70.0 mOhm--Current not knownRail current not known: drop not worked outReview
3V3_LAN1+3V30.101U8 70.0 mOhm7.1149.4Drop 7.1 mVInformation
5V_OTG_1+5V0.500U11 70.0 mOhm35.01048.4Drop 35.0 mVInformation
5V_OTG_2+5V0.500U12 70.0 mOhm35.01048.4Drop 35.0 mVInformation
HDMI_5VNet-(U14-EN)0.002U14 70.0 mOhm0.11013.6Drop at least 0.1 mVInformation
Net-(C1-Pad1)+3V30.303R6 50.0 mOhm15.2157.5At least this much: the current of R9 is not fully knownDrop at least 15.2 mVInformation
Net-(C2-Pad1)+3V30.050R8 20.0 mOhm1.0143.3At least this much: the current of U2 is not fully knownDrop at least 1.0 mVInformation
Net-(C3-Pad1)+3V30.050R10 20.0 mOhm1.0143.3At least this much: the current of U2 is not fully knownDrop at least 1.0 mVInformation
Net-(D18-A2)3.119J9 cable (USB Type-C allowance) 250.0 mOhm779.7779.7Drop at least 779.7 mVInformation
Net-(U13-VIN)+3V30.000R27 20.0 mOhm0.0142.3At least this much: the current of U13 is not fully knownDrop at least 0.0 mVInformation
Net-(U14-EN)+5V0.002R29 20.0 mOhm0.01013.5At least this much: the current of U14 is not fully knownDrop at least 0.0 mVInformation
VDD33A_LAN1+3V30.214U8 70.0 mOhm15.0157.3At least this much: the current of R36, R55, R56, R57 is not fully knownDrop at least 15.0 mVInformation

4.7.4 Load Margin Before Copper

Rail ⇅Load ⇅Rail Nominal (V) ⇅Drop (mV) ⇅Load Minimum (V) ⇅Rail Low End at 25 °C (V) ⇅Margin at 25 °C (mV) ⇅Rail Low End at 40 °C (V) ⇅Margin at 40 °C (mV) ⇅Status ⇅Severity ⇅
5V_OTG_1J85.0001048.44.7504.750-1048.44.750-1048.4Below its 4.75 V minimum by 1048 mV before any copperHigh
5V_OTG_2J85.0001048.44.7504.750-1048.44.750-1048.4Below its 4.75 V minimum by 1048 mV before any copperHigh
3V3_LAN1U93.300149.43.0003.22474.13.18535.1Only 35 mV (1.1 %) left for copperMedium
VDD33A_LAN1U93.300157.33.0003.22466.23.18527.2Only 27 mV (0.8 %) left for copper; series drop at least 157.3 mV (not every current on the rail is known)Medium
+5VU35.0001013.41.6504.7502086.64.7502086.62087 mV left for copper; series drop at least 1013.4 mV (not every current on the rail is known)Information
+5VU45.0001013.41.6504.7502086.64.7502086.62087 mV left for copper; series drop at least 1013.4 mV (not every current on the rail is known)Information
+5VU55.0001013.41.6504.7502086.64.7502086.62087 mV left for copper; series drop at least 1013.4 mV (not every current on the rail is known)Information
+5VU65.0001013.41.6504.7502086.64.7502086.62087 mV left for copper; series drop at least 1013.4 mV (not every current on the rail is known)Information
+3V3U163.300142.32.4003.224681.23.185642.2642 mV left for copper; series drop at least 142.3 mV (not every current on the rail is known)Information
+3V3U33.300142.31.4003.2241681.23.1851642.21642 mV left for copper; series drop at least 142.3 mV (not every current on the rail is known)Information
+3V3U43.300142.31.4003.2241681.23.1851642.21642 mV left for copper; series drop at least 142.3 mV (not every current on the rail is known)Information
+3V3U53.300142.31.4003.2241681.23.1851642.21642 mV left for copper; series drop at least 142.3 mV (not every current on the rail is known)Information
+3V3U63.300142.31.2003.2241881.23.1851842.21842 mV left for copper; series drop at least 142.3 mV (not every current on the rail is known)Information
+3V3U73.300142.31.6503.2241431.23.1851392.21392 mV left for copper; series drop at least 142.3 mV (not every current on the rail is known)Information
+BATTU23.300248.32.5003.224475.23.185436.2436 mV left for copperInformation
3V3_LAN1U103.300149.42.5003.224574.13.185535.1535 mV left for copperInformation
Net-(C2-Pad1)U23.300143.31.7103.2241370.23.1851331.21331 mV left for copper; series drop at least 143.3 mV (not every current on the rail is known)Information
Net-(C3-Pad1)U23.300143.31.7103.2241370.23.1851331.21331 mV left for copper; series drop at least 143.3 mV (not every current on the rail is known)Information

4.7.5 Regulator Input and Output

RegulatorTypeInput RailWorst-Case Input (V)Input Range (V)Output Current (A)Rated (A)NotesStatusSeverity
U20 [LMR14050SDDA]switching+5V3.7374 - 402.8465from the source's stated minimumFor typical USB operation at 5 V, U20 sees 3.99 V at its input. If USB drops to its 4.75 V minimum, U20 sees 3.74 V at its input, below the 4 V minimum input its manufacturer specifies (datasheet page 4). 2.846 A of 5 ALow
U11 [RT9742QGJ5]load_switch+5V3.7372.7 - 60.5000.5from the source's stated minimumFor typical USB operation at 5 V, U11 sees 3.99 V at its input. If USB drops to its 4.75 V minimum, U11 sees 3.74 V, at or above the 2.7 V minimum input its manufacturer specifies (datasheet page 5). 0.500 A of 0.5 AInformation
U12 [RT9742QGJ5]load_switch+5V3.7372.7 - 60.5000.5from the source's stated minimumFor typical USB operation at 5 V, U12 sees 3.99 V at its input. If USB drops to its 4.75 V minimum, U12 sees 3.74 V, at or above the 2.7 V minimum input its manufacturer specifies (datasheet page 5). 0.500 A of 0.5 AInformation
U13 [RT9742QGJ5]load_switchNet-(U13-VIN)3.0422.7 - 6-0.5from U20's output bandFor typical Net-(C52-Pad1) operation at 3.3 V, U13 sees 3.16 V at its input. If Net-(C52-Pad1) drops to its 3.185 V minimum, U13 sees 3.04 V, at or above the 2.7 V minimum input its manufacturer specifies (datasheet page 5).Information
U14 [RT9742QGJ5]load_switchNet-(U14-EN)3.7372.7 - 60.0020.5from the source's stated minimumFor typical USB operation at 5 V, U14 sees 3.99 V at its input. If USB drops to its 4.75 V minimum, U14 sees 3.74 V, at or above the 2.7 V minimum input its manufacturer specifies (datasheet page 5). 0.002 A of 0.5 AInformation
U8 [RT9742QGJ5]load_switch+3V33.0422.7 - 60.3150.5from U20's output bandFor typical Net-(C52-Pad1) operation at 3.3 V, U8 sees 3.16 V at its input. If Net-(C52-Pad1) drops to its 3.185 V minimum, U8 sees 3.04 V, at or above the 2.7 V minimum input its manufacturer specifies (datasheet page 5). 0.315 A of 0.5 AInformation

4.8 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

4.8.1 Power Tree Overview

AI-Assisted — All board power enters on the USB Type-C receptacle J9. Its VBUS net, Net-(D18-A2), is stated at 5.00 V with a 4.75-5.50 V range. D18 (ESD9B5.0ST5G) clamps VBUS at the connector. F1 (Eaton 3216FF5, a 5 A fast-acting fuse rated 32 V DC) then feeds Net-(Q7-S1).

The PD sink controller U19 (HUSB238) takes its supply from Net-(Q7-S1) through R37 (10 Ω). It switches the P-channel pass FET Q7 (AONR21307) through R39 (5.1 kΩ), working against the gate-source resistor R38 (51 kΩ). Q7's drain reaches +5V through the single 1206 jumper R45. Every 5 V consumer sits behind that link: U11 and U12 (RT9742QGJ5 OTG port switches on J8), the LMR14050 buck U20, the translators U3-U6, relay K1 with its flyback diode D4, and, through R29, the HDMI switch U14.

The buck output becomes +3V3. From +3V3, R27 feeds U13 (SD_PWR to the microSD socket J5) and U8 feeds the LAN9512 domain.

The 3.3 V load is estimated from the stated typical figures. The CM4S draws PVBAT 7 W plus P3.3V 1 W, both from +3V3 (Raspberry Pi CM4S datasheet p.13, Datasheet). U9 adds 231 mA plus about 42 mA of magnetics current (LAN9512 datasheet p.237, Datasheet). That gives about 2.70 A at 3.3 V.

The nearest drawn LMR14050 efficiency curve is VIN 5 V, VOUT 3.3 V at 1 MHz (TI datasheet p.7, Datasheet). It reads about 89.6 % at that load, so the buck draws about 1.99 A from +5V. This is an estimate, because this design switches near 306 kHz. Adding K1's 28 mA coil current and the D21 indicator, the known +5V load is about 2.02 A. That figure excludes the offboard loads on 5V_OTG_1, 5V_OTG_2, HDMI_5V, J2 pins 2 and 4, and the microSD card.

Power-up order:
J9 attaches. The source sees U19's internal 5.1 kΩ Rd on CC1 and CC2 and applies vSafe5V.
U19 passes its 3.1 V UVLO and, as the default factory option, asserts GATE after power-on reset. Q7 conducts and +5V rises.
U14 turns on (EN tied to VIN), and U20 starts (EN on +5V).
+3V3 rises, and U13 turns on through R28.
The CM4S boots and GPIO29 (LAN1_EN) enables U8. U9 powers up, and its PRTCTL2 and PRTCTL3 outputs enable U11 and U12.

4.8.2 AONR21307 Pass FET and Input Protection (Q7, F1, D18, R45)

AI-Assisted — Q7 is a high-side load switch, not a regulator. R38 holds its gate at its source, keeping it off until the open-drain U19 GATE sinks through R39. Its body diode points from +5V back toward the input. With Q7 off, therefore, nothing reaches the loads from J9. In the other direction, a supply placed on +5V, for example at J2 pins 2 and 4, back-feeds Net-(Q7-S1), U19 VIN and J9 VBUS through that diode. The worst-case gate-source voltage, the on-resistance read from Figure 5, the junction temperature and the VDS margin are all inside their limits (AOS datasheet).

The weak element is R45. Yageo rates the RC1206 jumper at 2.0 A continuous and 10 A short-duration (datasheet p.6, source: Tomachie). The whole board current passes through it: the known typical load of about 2.02 A already reaches that rating, and U19 is strapped to request 3.25 A.

F1 (Eaton datasheet) carries the 3.25 A contract inside its 5 A rating and inside Eaton's 80 % operating recommendation. However, F1 is rated above R45. Eaton states no opening within 4 h at 100 % of rated current, so a downstream fault between 2 A and 5 A never opens F1. Fitting a link rated 5 A or more continuous in the R45 position fixes both the R45 rating and the coordination.

D18 sits between J9 and F1, so a shorted clamp has no fuse to clear it. Moving F1 to the connector side puts D18 on Net-(Q7-S1), behind the fuse.

D18 is also operated above a datasheet rating. VRWM for this part is 5.0 V, below the 5.5 V maximum on the rail. However, 5.5 V is still below the breakdown, V_BR(min) 5.8 V (at 1 mA, 25 C), so the part is not in breakdown. There is leakage at 5.5 V and that leakage is not characterised by the datasheet, which guarantees leakage of 100 nA maximum only up to 5.0 V; it rises with temperature. The leakage is a shunt to ground in the microamp region at worst, so on a port feeding regulators this is a margin note only (onsemi datasheet, source: Tomachie; USB Type-C specification, vSafe5V). The same applies to D30 and D31 on the OTG rails.

4.8.3 RT9742QGJ5 OTG Port Switches (U11, U12)

AI-Assisted — U11 and U12 switch +5V onto 5V_OTG_1 and 5V_OTG_2, the two downstream USB Type-A ports of J8. Each port also carries a green indicator, D7 or D8, with a 1.5 kΩ series resistor. U9 drives U11_4 and U12_4 EN from PRTCTL2_OTG_1 and PRTCTL3_OTG_2, so the ports power only after the CM4S has enabled the LAN9512 domain.

VIN stays inside the 2.7-6 V recommended range. This holds even at the roughly 4.5 V that +5V can fall to after the F1, Q7 and R45 drops at the full 3.25 A contract (Richtek datasheet p.5, source: Tomachie).

The defect is on the output side. Neither 5V_OTG_1 nor 5V_OTG_2 carries any capacitor. For a USB downstream-facing port, the Richtek datasheet (p.13) calls for at least 120 µF per port, plus a 0.01-0.1 µF ceramic at VOUT for short-circuit immunity. Without this bulk capacitance, a device hot-plugged into J8 pulls its inrush straight through the switch, and VBUS at the port dips.

The input side has only C37 and C38, 1 µF each, on the ETHERNET_LAN1 sheet, against the 10 µF low-ESR ceramic the datasheet strongly recommends at VIN. Values are nominal; the ceramic DC-bias loss is not applied.

F̅L̅G̅ (U11_3, U12_3) is left unconnected. Over-current is therefore limited by the switch at 0.6-0.8 A but is not reported to the hub controller.

Dissipation at the 0.8 A maximum current limit is small. Using the 96 mΩ read at 125 C from the On Resistance vs. Temperature curve (p.8), it is 0.061 W, which keeps the junction near 53 C at the 40 C ambient.

4.8.4 RT9742QGJ5 microSD Card Switch (U13)

AI-Assisted — U13 takes Net-(U13-VIN) from +3V3 through the 0 Ω link R27. It passes that rail to SD_PWR and the J5 VDD contact, so SD_PWR is 3.3 V less the switch drop. C41 (10 µF, 16 V, X7R) on SD_PWR is within the RT9742 output guidance for a non-USB load. D11 (PTVS5V0S1UR) clamps SD_PWR to GND, cathode on SD_PWR; its 5.0 V standoff is adequate for the 3.3 V rail (Nexperia datasheet). The input carries only C46 (100 nF) against the 10 µF the Richtek datasheet strongly recommends (p.13, source: Tomachie). The +3V3 bulk capacitors sit behind R27 and R50 and are not a local bypass for this pin. Values are nominal; DC-bias loss is not applied.

The finding is on the SD_VDD node, which holds U13_4 EN and the CM4S pins U2_4 and U2_6 SDX_VDD. No power source feeds U2_6 SDX_VDD. Its only connection to a rail is R28, 10 kΩ from Net-(U13-VIN) at 3.3 V, so at most 0.33 mA reaches it. R28 holds U13's enable on, but a pull-up resistor is not a supply for the SDX interface.

The symbol types U2_6 as a power output. The CM4S datasheet, however, gives SDX_VDD a 1.71-3.45 V operating range and a 3.6 V absolute maximum (p.12), so it is a supply that must be held inside that range. Any bank current above roughly 0.18 mA would pull SD_VDD below U13's 1.5 V EN VIH minimum and switch the card off as well.

There is also a back-power path. SDX_CLK, SDX_CMD and SDX_D0-SDX_D3 run to J5, and J5's supply SD_PWR comes from U13. With the card powered and the SDX pad bank not, the card back-drives the bank through its protection structures.

Tying SD_VDD directly to Net-(U13-VIN) does two things: it feeds SDX_VDD from the same 3.3 V source as the card, and it still holds U13 enabled.

4.8.5 RT9742QGJ5 HDMI 5 V Switch (U14)

AI-Assisted — U14 takes +5V through the 0 Ω link R29 onto Net-(U14-EN). That net carries both U14_5 VIN and U14_4 EN, so the switch turns on whenever +5V is present, about 2.1 ms after +5V rises (turn-on time, Richtek datasheet p.6, source: Tomachie). EN at up to 5.5 V is inside its 0-6 V recommended range and above the 1.5 V VIH. This is a deliberate always-on arrangement and needs no pull resistor.

The output, HDMI_5V, feeds J6 pin 18 and the DDC pull-ups R5 and R58 (4.7 kΩ each). At worst, those two pull-ups draw 1.1 mA each when their lines are held low. The sink-side load on the connector is offboard.

C43 (100 nF) at VOUT matches the 0.01-0.1 µF general-application output capacitor of the datasheet (p.13). The input has only C42 (100 nF) against the strongly recommended 10 µF. Values are nominal, without DC-bias loss.

R29 carries only U14's input current, which U14's own over-current trip bounds at 1 A maximum. The Vishay CRCW0603 datasheet (Datasheet) states a 2.0 A maximum jumper current but no continuous jumper rating, so this link stays a review item.

4.8.6 HUSB238 USB-PD Sink Controller (U19)

AI-Assisted — U19 sets the port contract with two straps. R42 (0 Ω from U19_8 VSET to GND) selects 5 V (Table 6, p.9). U19_9 ISET is left open, because R40 is not fitted, and this selects 3.25 A (Table 7, p.10). Both match the designer's notes on sheet POWER. VIN decoupling, the GATE network, the CC pins and the I2C levels all meet the Hynetek datasheet (source: Tomachie).

The straps set only the power-up default, not a ceiling. U19_6 SDA and U19_7 SCL reach U2 (CM4S) GPIO0 and GPIO1 directly through the 0 Ω links R52 and R53, with 3.3 kΩ pull-ups R43 and R44 to +3V3. This is a live bus mastered by a firmware-running module. The datasheet states: "If using I2C to select a source PDO, it over writes the internal RDO which is created by VSET, ISET pins and internal factory fuse option" (p.10). The controller can request up to 20 V. The part number HUSB238 names no variant with that request path disabled.

Following the path from Net-(D18-A2) to the loads shows nothing that stops a 20 V contract. D18 is a 5 V-standoff suppressor and would fail at a sustained 20 V rather than limit it. F1 protects against over-current and passes normal current at any voltage. Q7 conducts whenever GATE is asserted. U19's own OVP threshold is 120 % of the requested voltage, so it rises with the request. U20 accepts up to 40 V and shields every 3.3 V load behind it. However, U11, U12 and U14 (7 V VIN absolute maximum), U3-U5 and U6 (6.5 V VCCB absolute maximum) and C37 and C38 (10 V) sit directly on +5V.

The cheapest fix is at Q7's gate node. An over-voltage comparator or protection controller across Q7 gate-source, or a switch that breaks the R39 path, would let Q7 conduct only when U19 GATE is asserted and the input is in band. R39 makes this override possible, because U19 pulls low only through it. Alternatively, an OVP load switch with an enable input can replace Q7, driven from U19 GATE. Either option should trip above 5.5 V and below 6.5 V, and its input must withstand more than 20 V. A different TVS is not a remedy for this hazard.

4.8.7 LMR14050 3.3 V Buck Converter (U20)

AI-Assisted — U20 runs from +5V, and its enable pin U20_3 is tied to the same rail. It therefore starts as soon as Q7 closes and VIN rises past the 3.5-3.9 V rising UVLO.

R41 (82 kΩ) on RT/SYNC sets the switching frequency. Using the datasheet formula RT = 32537 x fSW^-1.045, fSW = (32537/82)^(1/1.045) = 306 kHz (TI datasheet p.12, Datasheet). R47 (51 kΩ) and R48 (15 kΩ) set VOUT = 0.750 V x (1 + 51/15) = 3.300 V. Across the 0.735-0.765 V reference band (p.5) and the 1 % resistor tolerance, the output lies between 3.185 V and 3.419 V. C48 (22 nF) gives a soft-start time of 22 x 0.75 / 3 = 5.5 ms (Equation 4, p.10).

The output node Net-(C52-Pad1) carries C52-C55, four 47 µF parts for 188 µF nominal; DC-bias loss is not applied. This node reaches +3V3 through the 1206 jumper R50. From +3V3, R59 feeds the CM4S VBAT pins on +BATT, R6 feeds its 3V3 pins, R8 and R10 feed the two GPIO bank supplies, and R27 feeds U13.

The known 3.3 V load is about 2.70 A, built from the CM4S typical figures of PVBAT 7 W and P3.3V 1 W (CM4S datasheet p.13, Datasheet) plus about 0.30 A for the LAN9512 domain. The CM4S datasheet notes that these figures greatly depend on the end application. The load is inside U20's 5 A rating.

At the 5.5 V top of the input band, inductor ripple is 3.3 x (1 - 3.3/5.5) / (8.2 µH x 306 kHz) = 0.53 A, which puts the peak at 2.96 A. High-side conduction at the 180 mΩ maximum Rds(on), with duty cycle about 0.76, is about 1.0 W; with θJA of 43.2 C/W the junction sits near 83 C.

The weak point is the jumper chain. R50 carries the full 2.70 A, and R59 carries the CM4S VBAT current of 7 W / 3.3 V = 2.12 A. Both exceed the 2.0 A continuous jumper rating (Yageo RC1206 datasheet p.6, source: Tomachie).

VBAT at 3.3 V is inside its 2.5-5.25 V range. Moving it to +5V would exceed 5.25 V at the 5.5 V top of the USB band, so the remedy is a heavier link, not a different source rail.

No capacitor sits on +BATT or on +3V3 on the CM4 sheet. The VBAT pins draw about 2.1 A, and their nearest bulk capacitance is C52-C55, located behind R50.

4.8.8 RT9742QGJ5 LAN Domain Switch (U8)

AI-Assisted — U8 switches +3V3 onto 3V3_LAN1 when the CM4S drives U2_30 GPIO29 (LAN1_EN) high. FB2, a BLM18PG121SH1D ferrite (120 Ω at 100 MHz, rated 2 A), then feeds VDD33A_LAN1.

3V3_LAN1 supplies the five U9 VDD33IO pins, U10 and the indicator D5. VDD33A_LAN1 supplies the seven U9 VDD33A pins, the J4 centre taps through R20 (10 Ω) and C39, the 49.9 Ω line terminations R36 and R55-R57, and the LED resistors R21-R23. U9's PRTCTL2 and PRTCTL3 outputs enable U11 and U12, so GPIO29 gates the whole LAN and downstream USB domain.

The LAN9512 draws 231 mA typical in 100BASE-TX full duplex with all USB ports active, plus about 42 mA in the magnetics. In 10BASE-T it draws 188 mA plus about 104 mA (LAN9512 datasheet p.237, Datasheet). Adding at most 30 mA in the three LEDs (V/R bound) and under 4 mA for D5 and U10 keeps the domain near 0.33 A. That is below U8's 0.5 A rating and its 0.6 A minimum current limit.

At 3.3 V input the switch on-resistance reads about 84 mΩ (On Resistance vs Input Voltage, p.8), or about 124 mΩ scaled to 125 C. The drop is therefore 41 mV and dissipation 13.5 mW (Richtek datasheet, source: Tomachie). FB2's end-of-life DCR of 0.10 Ω (Murata datasheet, source: Tomachie) adds about 25 mV. With the buck at its 3.185 V low corner, VDD33A sits near 3.12 V, inside the LAN9512's 3.0-3.6 V band.

LAN1_EN carries no pull resistor. Richtek requires that EN not float (p.11), and the GPIO29 level during CM4S reset is not stated. A pull-down from LAN1_EN to GND would hold U8, U9 and both J8 ports off until firmware drives GPIO29 high.

If the full 10BASE-T magnetics current flows through R20, it dissipates 0.104 A² x 10 Ω = 0.108 W. R20's power rating is not stated in the schematic data.

4.8.9 LAN9512 Internal 1.8 V Supplies (U9)

AI-Assisted — U9 generates its 1.8 V supplies internally. VDD18CORE_LAN1 joins U9_15 and U9_38, with C18 (4.7 µF X5R) and C23 and C26 (10 nF each) to GND.

U9_62 VDD18USBPLL carries C24 (1 µF) and C27 (10 nF). It feeds U9_48 VDD18ETHPLL through FB1, a BLM18PG121SH1D (120 Ω at 100 MHz, rated 2 A); VDD18ETHPLL carries C21 (1 µF) and C15 (10 nF). The bead matches the 2.0 A, 120 Ω part named in the LAN9512 power connections (Figure 2.2, p.27).

For VDD18CORE, that figure shows 4.7 µF plus two 0.1 µF capacitors. Here the two high-frequency parts are 10 nF. Figure 2.2 is an application drawing rather than a stated minimum, so this is a review item.

The remaining LAN9512 pin requirements are met. R19 (12.4 kΩ 1 %) sits on U9_50 EXRES and R17 (12 kΩ 1 %) on U9_63 USBRBIAS. U9_34 TEST2 is tied to GND and U9_40 TEST3 to 3V3_LAN1. U10 serves as the optional serial EEPROM. PRTCTL2 and PRTCTL3 each drive an RT9742 port switch, which is the external-switch option on pp.28-30.

The only connection on nRESET_LAN1 is R12, a 10 kΩ pull-up to 3V3_LAN1. C14 (10 nF, from nRESET_LAN1 to GND) is drawn and marked not fitted, so reset releases as 3V3_LAN1 rises, about 2.1 ms after U8 is enabled.

Device dissipation is 763 mW typical in 100BASE-TX full duplex (p.237). Its junction temperature cannot be computed without a thermal resistance.

4.9 Observations

AI-Assisted — Three findings share one cause: the main current path runs through 1206 zero-ohm links rated 2.0 A continuous. R45 carries the whole +5V load (about 2.02 A known), R50 the whole 3.3 V load (about 2.70 A), and R59 the CM4S VBAT current (about 2.12 A). All three are at or above rating on typical figures. F1, at 5 A, coordinates with none of them, so a fault between 2 A and 5 A opens a link rather than the fuse. Links rated 5 A or more resolve both the ratings and the coordination.

The input budget is tight against the 3.25 A that U19 requests. The buck draws about 1.99 A at typical CM4S load. The two J8 ports are rated 0.5 A each and limit at 0.6-0.8 A, while HDMI_5V and J2 pins 2 and 4 are offboard. The known load plus two fully loaded 0.5 A ports comes to about 3.02 A, which leaves about 0.23 A for HDMI_5V and J2 within the contract.

The highest-consequence configuration hazard remains the I2C path from U2 to U19, which can request 20 V. Every +5V load outside U20 is exposed to that request; this is reported with Q7. The other functional supply defects are U2_6 SDX_VDD, which is fed only through R28, and the J8 ports, which have no output capacitance.

Thermal margins are comfortable at the 40 C ambient. Estimated temperatures are about 83 C for the U20 junction, 62 C for the D22 junction, 50 C for the Q7 junction and 50 C for the L1 hot spot, and the port switches stay below 60 C. All are inside the 115 C limit of the Benign (controlled office) derating selected for this schematic analysis. The figures rest on typical CM4S power, and the CM4S datasheet notes that this greatly depends on the application.

Sequencing:
HDMI_5V comes up with +5V.
+3V3 follows the 5.5 ms buck soft-start.
SD_PWR comes up with +3V3.
The LAN and OTG domain waits for GPIO29.

J2 carries +5V on pins 2 and 4 and +3V3 on pins 1 and 17. A mating board that supplies either rail back-drives U20's output, or reaches J9 through Q7's body diode.

K1 switches RELAY1_COM to RELAY1_NO and RELAY1_NC, which leave the board only on J3. Neither the switched voltage nor the load current is stated.

4.10 Findings

AI-Assisted —
#DeviceRailObservationSeverity
4.10.1U19 (HUSB238), Q7 (AONR21307)Net-(D18-A2) to +5VProtection is needed at the Q7 gate: a 20 V request over I2C from U2 reaches U11, U12 and U14 (RT9742QGJ5, 7 V VIN absolute maximum), U3-U5 (TXS0108E-Q1) and U6 (TXB0108), both 6.5 V VCCB absolute maximum, and C37 and C38 (10 V). Add an over-voltage sense that holds Q7 off above 5.5 V, or fit an OVP load switch in place of Q7, enabled by U19 GATE.Medium
4.10.2R45 (RC1206FR-070R, 0 Ω)Net-(Q7-D) to +5VR45 carries the entire +5V load and is rated 2.0 A continuous (Yageo datasheet p.6, source: Tomachie). The known typical load is about 2.02 A, and the U19 contract allows 3.25 A. Replace R45 with a link rated at least 3.25 A continuous; 5 A or more also coordinates with F1.Medium
4.10.3U11, U12 (RT9742QGJ5)5V_OTG_1, 5V_OTG_2Neither J8 downstream port carries any output capacitor. The Richtek datasheet (p.13, source: Tomachie) calls for at least 120 µF per downstream-facing port, plus 0.01-0.1 µF ceramic at VOUT. Add 120-330 µF low-ESR bulk and 0.1 µF ceramic at U11_1 and at U12_1.Medium
4.10.4U2 (CM4S), U13 (RT9742QGJ5)SD_VDDNo power source feeds U2_6 SDX_VDD. Its only feed is R28 (10 kΩ) from Net-(U13-VIN) at 3.3 V, at most 0.33 mA, against a 1.71-3.45 V supply range (CM4S datasheet p.12); R28 holds U13_4 EN on but is not a supply. SDX_CLK, SDX_CMD and SDX_D0-SDX_D3 reach J5, which is powered from SD_PWR by U13, so the card back-drives the unpowered pad bank. Tie SD_VDD directly to Net-(U13-VIN).Medium
4.10.5R50, R59 (RC1206FR-070R, 0 Ω)Net-(C52-Pad1) to +3V3, +3V3 to +BATTR50 carries the full 3.3 V load of about 2.70 A, and R59 the CM4S VBAT current of 7 W / 3.3 V = 2.12 A. Both exceed the 2.0 A continuous jumper rating (Yageo p.6, source: Tomachie). Replace each with a link rated at least 3 A continuous.Medium
4.10.6F1 (3216FF5-R)Net-(D18-A2) to Net-(Q7-S1)F1's 5 A rating is above the 2.0 A rated current of R45 in series with it. At 100 % of rated current F1 does not open within 4 h, so a downstream fault between 2 A and 5 A leaves R45 unprotected (Eaton datasheet p.1). A 5 A-rated link in the R45 position restores coordination.Low
4.10.7D18 (ESD9B5.0ST5G)Net-(D18-A2)D18 sits between J9 VBUS and F1, on the unfused side, so a shorted clamp is not cleared by F1. Move F1 to the connector side so that D18 sits on Net-(Q7-S1).Low
4.10.8L1 (IHLP2525CZER8R2M01), U20Net-(D22-K)In overload, the U20 switch current limit reaches up to 9.7 A maximum (TI p.5), above L1's 7.5 A typical Isat. The p.4 graph shows soft saturation, with 6.69 µH at 9.0 A. An inductor with Isat of 9.7 A or more, as in the TI example (7 A RMS, 10 A saturation, p.18), removes this.Low
4.10.9D18, D30, D31 (ESD9B5.0ST5G)Net-(D18-A2), 5V_OTG_1, 5V_OTG_2Operated above a datasheet rating: the 5.0 V VRWM is below the 5.5 V rail maximum. 5.5 V is still below V_BR(min) 5.8 V (1 mA, 25 C), so the part is not in breakdown, but leakage above 5.0 V is not characterised (100 nA maximum is guaranteed only up to 5.0 V). A 6 V standoff class restores the guarantee (onsemi datasheet, source: Tomachie; USB Type-C specification).Review
4.10.10J9 (USB4085-GF-A)Net-(D18-A2)The VBUS contact current rating is not stated in the schematic data. The 3.25 A port contract is shared across J9_A4, J9_A9, J9_B4 and J9_B9.Review
4.10.11Q7 (AONR21307)+5VJ2 pins 2 and 4 take +5V off board. A supply applied there reaches Net-(Q7-S1), U19 VIN and J9 VBUS through Q7's body diode (VSD -0.7 V typ, AOS p.2) and F1, and back-drives the Type-C port.Review
4.10.12C7, C8, C9, C12, C42, C43 (CC0603KRX7R8BB104, 100 nF 25 V)+5V, Net-(U14-EN), HDMI_5VDerated 30 % (capacitor_voltage_pct = 70), these 25 V parts permit 17.5 V against 5.5 V applied. They are rated well beyond the position, and a 16 V part would serve.Review
4.10.13U11, U12, U13, U14 (RT9742QGJ5)+5V, Net-(U13-VIN), Net-(U14-EN)Input bypass is C37 and C38 (1 µF each) for U11 and U12, C46 (100 nF) for U13 and C42 (100 nF) for U14. The datasheet strongly recommends a 10 µF low-ESR ceramic at VIN (Richtek p.13); it is a recommendation, not a stated minimum. Values are nominal.Review
4.10.14U11, U12 (RT9742QGJ5)PRTCTL2_OTG_1, PRTCTL3_OTG_2U9_14 PRTCTL2 and U9_16 PRTCTL3 drive U11_4 and U12_4 EN, which have a 1.5 V VIH minimum (Richtek p.6). Check that the LAN9512 PRTCTL output-high level clears 1.5 V.Review
4.10.15U11, U12 (RT9742QGJ5)5V_OTG_1, 5V_OTG_2F̅L̅G̅ (U11_3, U12_3) is left unconnected, so a J8 over-current is limited at 0.6-0.8 A but is not returned to U9. The LAN9512 datasheet (pp.28-30) describes PRTCTL as a combined enable and over-current-sense pin for an external power switch.Review
4.10.16C46 (CC0603KRX7R8BB104, 100 nF 25 V)Net-(U13-VIN)Derated 30 % (capacitor_voltage_pct = 70) it permits 17.5 V against 3.3 V applied. It is rated well beyond the position, and a 16 V part would serve.Review
4.10.17R29 (CRCW0603, 0 Ω)+5V to Net-(U14-EN)R29 carries U14's input current, which U14's 1 A maximum over-current trip bounds. The Vishay datasheet states a 2.0 A maximum jumper current only; a continuous jumper rating is not stated (Datasheet).Review
4.10.18R40 (33 kΩ, not fitted)Net-(U19-ISET)R40 is drawn as 33 kΩ and marked not fitted (pins on Net-(U19-ISET) and GND). It matches no ISET table row; the nearest are 22.6 kΩ = 3 A and open = 3.25 A. If fitted, it lies beyond the last resistor row and likely reads as the 3.25 A end, but that is unspecified.Review
4.10.19C49, C50 (CL31B225KBHNNNE, 2.2 µF 50 V)+5VThe U20 input carries 4.4 µF on the POWER sheet and no 0.1 µF part, against the typical recommendation of 4.7-10 µF plus 0.1 µF close to the pins (TI p.20). The 2 x 2.2 µF matches the datasheet design example. This is a recommendation, not a minimum.Review
4.10.20C49, C50 (CL31B225KBHNNNE, 2.2 µF 50 V)+5VDerated 30 % (capacitor_voltage_pct = 70), these 50 V parts permit 35 V against 5.5 V applied. They are rated well beyond the position, and a 16 V part would serve (Datasheet).Review
4.10.21R8, R10, R27 (CRCW0603, 0 Ω)Net-(C2-Pad1), Net-(C3-Pad1), Net-(U13-VIN)R8 and R10 carry at most the 50 mA bank load (CM4S p.6). R27 carries U13's input, bounded by its 1 A maximum trip. Vishay states only a 2.0 A maximum jumper current; no continuous jumper rating is given (Datasheet).Review
4.10.22U2 (CM4S)+BATTU2 VBAT pins 197-200 carry about 2.1 A. No capacitor sits on +BATT or on +3V3 on the CM4 sheet; the nearest bulk is C52-C55 behind R50 on the POWER sheet. Bulk ceramic at the VBAT pins would give the module a local bypass.Review
4.10.23U2 (CM4S)Net-(C2-Pad1), Net-(C3-Pad1)Each GPIO bank is limited to 50 mA total (CM4S p.6). On the POWER, USD_CARD, HDMI and ETHERNET_LAN1 sheets the only GPIO loads are U8_4 EN (an input) and the R43 and R44 I2C pull-ups, 1.0 mA each while low. Loads on the IO sheet through U3-U6 and J2 are unknown; about 48 mA of headroom remains per bank.Review
4.10.24C4, C5, C6, C10, C11, C13, C19, C22, C25, C28, C29, C30, C31, C32, C33, C34, C35, C36 (CC0603KRX7R8BB104, 100 nF 25 V)+3V3, 3V3_LAN1, VDD33A_LAN1Derated 30 % (capacitor_voltage_pct = 70), these 25 V parts permit 17.5 V against 3.3 V. They are rated well beyond the position, and a 16 V part would serve.Review
4.10.25U8 (RT9742QGJ5)LAN1_ENLAN1_EN has no pull resistor, and Richtek states that EN must not float (p.11). Check that GPIO29 holds a defined level from power-up through CM4S boot. A pull-down from LAN1_EN to GND would hold U8, U9 and the J8 ports off until firmware drives GPIO29 high.Review
4.10.26U8 (RT9742QGJ5)+3V3The input bypass on the ETHERNET_LAN1 sheet is C20 (1 µF), against the 10 µF low-ESR ceramic that Richtek strongly recommends at VIN (p.13). This is a recommendation, not a stated minimum.Review
4.10.27R20 (10 Ω, 0603)VDD33A_LAN1 to Net-(C39-Pad1)If the full 10BASE-T magnetics current of about 104 mA (LAN9512 p.237) flows through the centre tap, R20 dissipates 0.108 W (0.018 W in 100BASE-TX). Its power rating is not stated in the schematic data; the conventional 0603 rating is 0.1 W, which permits 0.07 W when derated 30 %.Review
4.10.28U9 (LAN9512)VDD18CORE_LAN1U9_15 and U9_38 carry C18 (4.7 µF) plus C23 and C26 at 10 nF each. LAN9512 Figure 2.2 (p.27, an application drawing) shows 4.7 µF plus two 0.1 µF capacitors.Review
4.10.29C15, C23, C26, C27 (CC0603KRX7R9BB103, 10 nF 50 V)VDD18CORE_LAN1, Net-(U9A-VDD18ETHPLL), Net-(U9A-VDD18USBPLL)Derated 30 % (capacitor_voltage_pct = 70), these 50 V parts permit 35 V against 1.8 V. They are rated well beyond the position, and a 16 V part would serve.Review
4.10.30J9, U19, U11, U12Net-(D18-A2), +5VU19 requests 3.25 A. The buck draws about 1.99 A at typical CM4S load, and the two J8 ports are rated 0.5 A each, totalling about 3.02 A. That leaves about 0.23 A for HDMI_5V and J2 pins 2 and 4. With J8 ports at their 0.6-0.8 A current limits, the total exceeds the contract.Review
4.10.31J2+5V, +3V3J2 carries +5V on J2_2 and J2_4 and +3V3 on J2_1 and J2_17. A mating board that supplies either rail back-drives the U20 output node through R50, or reaches J9 VBUS through Q7's body diode and F1.Review
4.10.32K1 (IM03GR)RELAY1_COM, RELAY1_NO, RELAY1_NCK1 contacts switch a path that leaves the board only on J3. The voltage at RELAY1_COM and the load current are not stated, so neither contact rating can be judged. State both on the RELAYS sheet.Review
4.10.33U19 (HUSB238)Net-(U19-VSET)R42 (0 Ω to GND) on U19_8 VSET selects 5 V (Table 6, p.9), matching the designer's note "Vset 5V". 6.04 kΩ, 10 kΩ, 14 kΩ, 17.8 kΩ or open would select 9, 12, 15, 18 or 20 V.Info
4.10.34U19 (HUSB238)Net-(U19-ISET)U19_9 ISET is open (R40 not fitted), which selects 3.25 A (Table 7, p.10) and matches the designer's note "Iset 3.25A". 0 Ω to 22.6 kΩ would select 1.25 A to 3 A.Info
4.10.35U20 (LMR14050)+5VU20_3 EN is tied to VIN, which enables the part (TI p.3); the 44 V EN absolute maximum is not approached. Start-up is set by the 3.5-3.9 V rising UVLO. An EN divider from VIN would set a higher system UVLO instead.Info
4.10.36F1 (3216FF5-R)Net-(D18-A2)The 3.25 A port contract is below the 5 A rating and below Eaton's 80 % (4 A) recommended operating current, and 5.5 V is below the 32 V DC rating. Breaking capacity is 50 A (Datasheet).✓
4.10.37Q7 (AONR21307)Net-(Q7-S1) to +5VVGS is the R38 arm of the R38/R39/GATE divider: 5.5 V x 51.51/(51.51 + 5.049 + 0.1) = 5.0 V worst case (R38 +1 %, R39 -1 %, GATE 100 Ω minimum pull-low, Hynetek p.5). This is well inside the ±25 V VGS absolute maximum (AOS datasheet p.1, Datasheet).✓
4.10.38Q7 (AONR21307)Net-(Q7-S1) to +5VAt the 4.75 V band bottom (R38 -1 %, R39 +1 %, GATE 300 Ω), VGS = 4.75 x 50.49/55.94 = 4.29 V. Figure 5 (On-Resistance vs. Gate-Source Voltage, p.3, 25 C) reads about 16.2 mΩ at that VGS, so Q7 is fully enhanced.✓
4.10.39Q7 (AONR21307)+5VAt the 3.25 A contract, Rds(on) is 16.2 mΩ x 1.09 (Figure 4, p.3, at 50 C) = 17.7 mΩ, giving 0.19 W. With RθJA of 55 C/W maximum steady state (1 in² of 2 oz copper, p.1), Tj is about 50 C at 40 C ambient, below the 115 C limit of the Benign (controlled office) derating selected for this schematic analysis.✓
4.10.40Q7 (AONR21307)+5VRated VDS is 30 V; derated 20 % it permits 24 V. At most 5.5 V is applied across it when off, so it is correctly sized.✓
4.10.41C37, C38 (CL10B105KP8NNNC, 1 µF 10 V)+5VRated 10 V; derated 30 % (capacitor_voltage_pct = 70) they permit 7 V against 5.5 V applied, so they are correctly sized (Samsung datasheet).✓
4.10.42D4 (1N4007FL)+5VFlyback diode across the K1 coil, cathode on +5V and anode on Net-(D4-A), so its orientation is consistent. Rated VRRM is 1000 V; derated 20 % it permits 800 V against 5.5 V applied (AGERTECH datasheet p.1, Datasheet).✓
4.10.43K1 (IM03GR)+5VThe 5 V coil has a 3.75 V operate voltage and 140 mW rated power (28 mA) (TE datasheet p.3, Datasheet). +5V at its lowest, about 4.5 V after the F1, Q7 and R45 drops at 3.25 A, is above 3.75 V.✓
4.10.44D7, D8, D21 (SML-M13MTT86)5V_OTG_1, 5V_OTG_2, +5VEach LED has a 1.5 kΩ resistor to GND, limiting current to at most 3.7 mA (V/R bound, LED forward voltage not subtracted). This is against the 30 mA absolute maximum, which holds to 40 C on the derating curve (ROHM datasheet p.1-2, Datasheet).✓
4.10.45U3-U5 (TXS0108E-Q1), U6 (TXB0108)+5VVCCB on +5V at about 4.5-5.5 V is within the 1.65-5.5 V recommended range, and VCCA at 3.3 V is not above VCCB (Datasheet p.6; Datasheet p.5).✓
4.10.46U11, U12 (RT9742QGJ5)+5VVIN at about 4.5-5.5 V is within the 2.7-6 V recommended range and below the 7 V absolute maximum (Richtek datasheet p.5, source: Tomachie).✓
4.10.47U13, U14 (RT9742QGJ5)SD_PWR, HDMI_5VF̅L̅G̅ (U13_3, U14_3) is unused and left unconnected. The 10-100 kΩ pull-up (Richtek pp.7, 11) is needed only when the flag is read.✓
4.10.48U11-U14 (RT9742QGJ5)5V_OTG_1, 5V_OTG_2, SD_PWR, HDMI_5VOver-current trip (0.65-1 A) and current limit (0.6-0.8 A) are above the 0.5 A rating. At 0.8 A with the 96 mΩ 125 C reading (On Resistance vs. Temperature, p.8, scaled up for U13 at 3.3 V), dissipation is at most 0.08 W. At 203 C/W the junction is at most about 57 C, against the 115 C limit.✓
4.10.49U13 (RT9742QGJ5)Net-(U13-VIN)3.3 V on VIN is within the 2.7-6 V recommended range and above the 2.4 V maximum UVLO (Richtek p.5-6).✓
4.10.50C41 (CL21B106KOQNNNE, 10 µF 16 V)SD_PWRRated 16 V; derated 30 % (capacitor_voltage_pct = 70) it permits 11.2 V against 3.3 V applied, so it is correctly sized (Samsung datasheet).✓
4.10.51D11 (PTVS5V0S1UR)SD_PWRA 5.0 V standoff is adequate for the 3.3 V rail. The cathode is on SD_PWR and the anode on GND, so orientation is consistent (Datasheet).✓
4.10.52U14 (RT9742QGJ5)Net-(U14-EN)U14_4 EN shares the net with U14_5 VIN. At up to 5.5 V it is within the 0-6 V EN recommended range and above the 1.5 V VIH, so U14 is on whenever +5V is present (Richtek p.5-6).✓
4.10.53U14 (RT9742QGJ5)HDMI_5VC43 (100 nF) at VOUT matches the 0.01-0.1 µF general-application output capacitor (Richtek p.13).✓
4.10.54U19 (HUSB238)Net-(U19-VIN)C47 (1 µF X7R) on U19_1 VIN, fed through R37 (10 Ω), matches the required 1 µF and the typical 10 Ω series resistor (Hynetek p.1, p.9, source: Tomachie). Derated 30 % (capacitor_voltage_pct = 70), the 50 V part permits 35 V, which also covers a 20 V contract (Cal-Chip datasheet).✓
4.10.55U19 (HUSB238)Net-(U19-VIN)5 V on VIN is within the 3-25 V operating range and the 30 V absolute maximum (Hynetek p.5, p.7).✓
4.10.56U19 (HUSB238)Net-(U19-GATE)The open-drain GATE turns Q7 on through R39 (5.1 kΩ) against R38 (51 kΩ) to Net-(Q7-S1). This matches the 49.9 kΩ / 5.1 kΩ network of the typical application (p.1), and the sink current of 5.5 V / 56.1 kΩ = 0.1 mA is below the 10 mA maximum.✓
4.10.57U19 (HUSB238)Net-(D16-A2), Net-(D17-A2)U19_4 CC1 and U19_5 CC2 connect directly to J9. The internal 5.1 kΩ Rd is present even unpowered (p.5), so no external Rd is needed. The 5.0 V standoff of D16 and D17 is adequate for the 2.45 V maximum CC level (VDBH).✓
4.10.58U19 (HUSB238)CM4_SDA0, CM4_SCL0R43 and R44 (3.3 kΩ to +3V3) sink 1.0 mA, below the 2 mA at which SDA VOL is 0.4 V maximum. 3.3 V is within the 2.5-5.5 V I2C supply range and above the 1.4 V VIH (p.5).✓
4.10.59U20 (LMR14050)Net-(C52-Pad1)R47 (51 kΩ) and R48 (15 kΩ) with VREF 0.750 V set VOUT to 3.300 V. Across the 0.735-0.765 V reference band (TI p.5) and 1 % resistors, the output is 3.185-3.419 V. This is inside the CM4S GPIO and SDX supply range of 1.71-3.45 V (p.12) and the LAN9512 band of 3.0-3.6 V (p.235).✓
4.10.60U20 (LMR14050)Net-(U20-RT/SYNC)R41 (82 kΩ) to GND sets fSW = (32537/82)^(1/1.045) = 306 kHz (formula, TI p.12), inside the 200-2500 kHz RT-mode range. The pin is neither floating nor grounded, as p.3 requires.✓
4.10.61U20 (LMR14050)Net-(D22-K)On-time is D/fSW = 0.76/306 kHz = 2.5 µs, well above the 75 ns minimum controllable on-time (TI p.6).✓
4.10.62U20 (LMR14050)+5VVIN on +5V, at about 4.5-5.5 V, is within the 4-40 V recommended range and above the 3.9 V maximum UVLO (TI p.4-5).✓
4.10.63U20 (LMR14050)Net-(U20-SS)C48 (22 nF) gives tSS = 22 x 0.75 / 3 = 5.5 ms (Equation 4, TI p.10).✓
4.10.64U20 (LMR14050), C51Net-(U20-BOOT)C51 (100 nF, 25 V X7R) between U20_1 BOOT and the SW node meets the required 0.1 µF X5R/X7R rated 16 V or higher (TI p.20, Yageo datasheet).✓
4.10.65U20 (LMR14050)GNDU20_9 thermal pad and U20_7 GND connect to GND, as the pin table requires (TI p.3).✓
4.10.66U20 (LMR14050)Net-(C52-Pad1)The known load is about 2.70 A typical: CM4S PVBAT 7 W and P3.3V 1 W (CM4S p.13) plus about 0.30 A for the LAN9512 domain. This is against the 5 A continuous rating (TI p.1).✓
4.10.67U20 (LMR14050)Net-(C52-Pad1)Efficiency vs Load Current, VOUT 3.3 V, VIN 5 V, fSW 1 MHz (TI p.7), the nearest curve to 306 kHz, reads 89.6 % at 2.70 A. That gives an input current of about 1.99 A from +5V and about 1.03 W of total converter loss.✓
4.10.68U20 (LMR14050)Net-(C52-Pad1)Dropout Curve, VOUT 3.3 V, fSW 2.2 MHz (TI p.8), the nearest drawn: at IOUT 2.5 A, VOUT holds 3.30 V from VIN 3.9 V. +5V at its approximately 4.5 V minimum is above that at 2.70 A, and 306 kHz allows a higher duty cycle than 2.2 MHz.✓
4.10.69U20 (LMR14050)Net-(C52-Pad1)High-side conduction is 2.70² A² x 0.18 Ω (maximum Rds(on), TI p.5) x 0.76 = 1.0 W. With θJA 43.2 C/W (p.5, board not specified), Tj is about 83 C at 40 C ambient, below the 115 C limit.✓
4.10.70C52, C53, C54, C55 (GRM32EC81C476KE15K, 47 µF 16 V X6S)Net-(C52-Pad1)188 µF nominal matches the 4 x 47 µF of the datasheet design example (TI p.19). Ripple from capacitance is 0.53 A / (8 x 306 kHz x 188 µF) = 1.1 mV. DC-bias loss is not applied.✓
4.10.71C1, C52, C53, C54, C55 (GRM32EC81C476KE15K, 47 µF 16 V)Net-(C1-Pad1), Net-(C52-Pad1)Rated 16 V; derated 30 % (capacitor_voltage_pct = 70) they permit 11.2 V against 3.3 V applied, so they are correctly sized. The rated operating range of -55 to +105 C covers 40 C (Datasheet).✓
4.10.72L1 (IHLP2525CZER8R2M01, 8.2 µH)Net-(D22-K) to Net-(C52-Pad1)2.70 A DC against the 4 A Irms rating; derated 10 % (inductor_current_pct = 90) it permits 3.6 A, so it is correctly sized. The 8.2 µH graph (Vishay p.4, Datasheet) reads about 9.9 C rise at 2.7 A, giving a hot spot near 50 C against the 100 C permitted below the 125 C maximum.✓
4.10.73L1 (IHLP2525CZER8R2M01, 8.2 µH)Net-(D22-K)Ripple is 0.53 A and the peak 2.96 A, against Isat 7.5 A. The 8.2 µH graph (p.4) reads about 7.96 µH at 3 A.✓
4.10.74L1 (IHLP2525CZER8R2M01)Net-(D22-K)Rated operating voltage across the inductor is 75 V; derated 10 % it permits 67.5 V against at most 5.5 V applied.✓
4.10.75D22 (PDS760Q-13)Net-(D22-K)As the catch diode, D22 has its cathode on the U20_8 SW node and both anodes on GND, so orientation is correct. VRRM is 60 V; derated 20 % (diode_voltage_pct = 80) it permits 48 V against 5.5 V. This also exceeds the TI guidance of breakdown 25 % above maximum VIN (p.19) (Datasheet).✓
4.10.76D22 (PDS760Q-13)Net-(D22-K)Average current is 2.70 A x (1 - 0.72) = 0.76 A. Forward Power Dissipation (p.3) reads 0.26 W, and with θJA 85 C/W (FR-4 minimum pad) Tj is about 62 C, below 115 C.✓
4.10.77R6 (RC1206FR-070R, 0 Ω)+3V3 to Net-(C1-Pad1)R6 carries the CM4S 3V3 current, P3.3V 1 W / 3.3 V = 0.30 A, within its 2.0 A continuous rating (Yageo p.6, source: Tomachie).✓
4.10.78U2 (CM4S)+BATTVBAT at 3.185-3.419 V is within the 2.5-5.25 V operating range (CM4S p.12). +5V would exceed 5.25 V at the 5.5 V top of the USB band, so feeding VBAT from +3V3 is the in-range choice.✓
4.10.79U2 (CM4S)Net-(C2-Pad1), Net-(C3-Pad1)GPIO0-27_VDD and GPIO28-45_VDD connect through R8 and R10 to +3V3, which is the rail feeding the CM4S 3V3 pins through R6. This meets the requirement that each bank be tied to the CM4S 3.3 V rail, and 3.185-3.419 V is within 1.71-3.45 V (p.12). C2 and C3 (10 µF) bypass each bank.✓
4.10.80D23 (SML-M13MTT86)Net-(C52-Pad1)R49 (1 kΩ) limits D23 to at most 3.3 mA (V/R bound), against the 30 mA absolute maximum (ROHM p.1, Datasheet).✓
4.10.81C20, C45 (CL10B105KP8NNNC, 1 µF 10 V)+3V3Rated 10 V; derated 30 % (capacitor_voltage_pct = 70) they permit 7 V against 3.3 V, so they are correctly sized (Datasheet).✓
4.10.82C2, C3 (GRM188D71A106MA73D, 10 µF 10 V)Net-(C2-Pad1), Net-(C3-Pad1)Rated 10 V; derated 30 % (capacitor_voltage_pct = 70) they permit 7 V against 3.3 V, so they are correctly sized (Datasheet).✓
4.10.83U8 (RT9742QGJ5)+3V3VIN at 3.185-3.419 V is within the 2.7-6 V recommended range and above the 2.4 V maximum UVLO (Richtek p.5-6, source: Tomachie).✓
4.10.84U8 (RT9742QGJ5)3V3_LAN1, VDD33A_LAN1The domain load is at most about 0.33 A. This comprises the LAN9512 at 273 mA typical in 100BASE-TX and 292 mA in 10BASE-T, magnetics included (p.237); R21-R23 LEDs at up to 30 mA (V/R bound); and D5 and U10 under 4 mA. It is against the 0.5 A rating and 0.6 A minimum current limit (Richtek p.2, p.6).✓
4.10.85U8 (RT9742QGJ5), FB23V3_LAN1, VDD33A_LAN1Rds(on) is about 84 mΩ at 3.3 V (On Resistance vs Input Voltage, p.8), scaled to 124 mΩ at 125 C (On Resistance vs Temperature, p.8). At 0.33 A that gives 41 mV and 13.5 mW. With FB2's 0.10 Ω end-of-life DCR, VDD33A is about 3.12 V at the buck's 3.185 V low corner, inside 3.0-3.6 V.✓
4.10.86U8 (RT9742QGJ5)LAN1_ENU2_30 GPIO29 drives U8_4 EN. Its VOH minimum of VDD - 0.4 V is 2.8 V at the low corner, against the 1.5 V EN VIH (CM4S p.12, Richtek p.6).✓
4.10.87U8 (RT9742QGJ5)3V3_LAN1, VDD33A_LAN1The output carries 13 x 100 nF, which are the LAN9512 pin bypasses. The 0.01-0.1 µF figure (Richtek p.13) improves short-circuit immunity and is not an upper limit.✓
4.10.88U8 (RT9742QGJ5)3V3_LAN1F̅L̅G̅ (U8_3) is unused and unconnected. A pull-up is needed only when the flag is read (Richtek pp.7, 11).✓
4.10.89FB2 (BLM18PG121SH1D)3V3_LAN1 to VDD33A_LAN1FB2 is 120 Ω at 100 MHz and rated 2000 mA from -55 to +85 C (Murata p.1, source: Tomachie). It carries at most about 0.25 A and matches the 2.0 A, 120 Ω bead in LAN9512 Figure 2.2 (p.27).✓
4.10.90U9 (LAN9512)3V3_LAN1, VDD33A_LAN1U9_5, U9_10, U9_49, U9_51, U9_54, U9_57 and U9_64 VDD33A have seven 100 nF capacitors (C29-C34, C36). U9_19, U9_27, U9_33, U9_39 and U9_46 VDD33IO, together with U10, have six (C13, C19, C22, C25, C28, C35). This meets the 0.1 µF per pin of Figure 2.2 (p.27).✓
4.10.91U9 (LAN9512)3V3_LAN1, VDD33A_LAN1At 3.12-3.42 V the supply is within the 3.3 V ± 300 mV operating range and below the 3.6 V absolute maximum (p.235).✓
4.10.92U9 (LAN9512), FB1Net-(U9A-VDD18USBPLL), Net-(U9A-VDD18ETHPLL)VDD18USBPLL carries C24 (1 µF) and C27 (10 nF), meeting the 1.0 µF requirement. FB1 (120 Ω at 100 MHz, 2 A) feeds VDD18ETHPLL, which carries C21 (1 µF) and C15 (10 nF), more than the 0.1 µF of Figure 2.2 (p.27).✓
4.10.93C18 (CL10A475KQ8NNNC, 4.7 µF 6.3 V X5R)VDD18CORE_LAN1Rated 6.3 V; derated 30 % (capacitor_voltage_pct = 70) it permits 4.41 V against 1.8 V, so it is correctly sized. The rated operating range of -55 to +85 C covers 40 C (Datasheet).✓
4.10.94C21, C24 (CL10B105KP8NNNC, 1 µF 10 V)Net-(U9A-VDD18ETHPLL), Net-(U9A-VDD18USBPLL)Rated 10 V; derated 30 % (capacitor_voltage_pct = 70) they permit 7 V against 1.8 V, so they are correctly sized.✓
4.10.95U9 (LAN9512)Net-(U9B-EXRES), Net-(U9B-USBRBIAS)R19 (12.4 kΩ, 1 %) from U9_50 EXRES to GND and R17 (12 kΩ, 1 %) from U9_63 USBRBIAS to GND meet the required 12.4 kΩ 1 % and 12 kΩ 1 % (LAN9512 pp.24-25).✓
4.10.96U9 (LAN9512)GND, 3V3_LAN1U9_34 TEST2 is tied hard to GND and U9_40 TEST3 hard to 3V3_LAN1 (VDD33IO), as required (LAN9512 p.23).✓
4.10.97U9 (LAN9512)PRTCTL2_OTG_1, PRTCTL3_OTG_2, EECLK_LAN1U9_14 PRTCTL2 and U9_16 PRTCTL3 each drive an external USB power switch (U11, U12), meeting pp.28-30. EECLK, EECS, EEDO and EEDI connect to the optional serial EEPROM U10 (p.21).✓

4.11 Citations

AI-Assisted —
References
1N4007FL (AGERTECH MICROELECTRONICS) — datasheet, cited pages 1
datasheet.lcsc.com/datasheet/pdf/e95e9f9588b304a160769fb2...
2N7002W (onsemi) — datasheet
www.onsemi.com/pdf/datasheet/2n7002w-d.pdf
3216FF5 (Eaton) — datasheet
www.eaton.com/content/dam/eaton/products/electronic-compo...
93LC66A (Microchip Technology Inc.) — datasheet
ww1.microchip.com/downloads/en/DeviceDoc/21795E.pdf
AONR21307 (Alpha & Omega Semiconductor) — datasheet
www.aosmd.com/res/data_sheets/AONR21307.pdf
CC0603KRX7R8BB104 (Yageo) — datasheet
www.yageo.com/upload/media/product/productsearch/datashee...
CC0603KRX7R9BB103 (Yageo) — datasheet
www.yageo.com/upload/media/product/productsearch/datashee...
CL10A475KQ8NNNC (Samsung Electro-Mechanics) — datasheet
mm.digikey.com/Volume0/opasdata/d220001/medias/docus/609/...
CL10B105KP8NNNC (Samsung Electro-Mechanics) — datasheet
datasheet.octopart.com/CL10B105KP8NNNC-Samsung-datasheet-...
CL10B223KB8NNNC (Samsung Electro-Mechanics) — datasheet
media.digikey.com/pdf/Data%20Sheets/Samsung%20PDFs/CL10B2...
CL21B106KOQNNN (Samsung Electro-Mechanics) — datasheet
media.digikey.com/pdf/Data%20Sheets/Samsung%20PDFs/CL_Ser...
CL31B225KBHNNNE (Samsung Electro-Mechanics) — datasheet
media.digikey.com/pdf/Data%20Sheets/Samsung%20PDFs/CL31B2...
CRCW0603 (Vishay) — datasheet
www.vishay.com/docs/20035/dcrcwe3.pdf
FSUSB42 (onsemi) — datasheet
www.onsemi.com/pub/Collateral/FSUSB42-D.PDF
GMC10X7R105M50NT (Cal-Chip Electronics) — datasheet
calchip.com/wp-content/uploads/2023/09/GMC-Series-2.pdf
GRM188D71A106MA73D (Murata) — datasheet
mm.digikey.com/Volume0/opasdata/d220001/medias/docus/8942...
GRM32EC81C476KE15 (Murata Manufacturing Co., Ltd.) — datasheet
static6.arrow.com/aropdfconversion/226b0f37381afec66b0bab...
IHLP2525CZ8R2M01 (Vishay Dale) — datasheet
www.vishay.com/docs/34104/ihlp-2525cz-01.pdf
IM03 (TE Connectivity (Axicom)) — datasheet, cited pages 1
www.te.com/commerce/DocumentDelivery/DDEController?Action...
KGM15ACG1E330JT (KYOCERA AVX) — datasheet
datasheets.kyocera-avx.com/C0GNP0-KGM.pdf
LAN9512i (SMSC (Standard Microsystems Corporation)) — datasheet
ogane.com/homebrew/rpi/1440/9512.pdf
LMR14050 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/lmr14050.pdf
PDS760Q (Diodes Incorporated) — datasheet
www.diodes.com/assets/Datasheets/PDS760Q.pdf
PTVS5V0S1UR (Nexperia) — datasheet
assets.nexperia.com/documents/data-sheet/PTVSXS1UR_SER.pdf
RClamp0524PA (Semtech Corporation) — datasheet
4donline.ihs.com/images/VipMasterIC/IC/SEMT/SEMT-S-A00050...
CM4S (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/cm4s/cm4s-datasheet.pdf
SML-LXFM0603SIC (Lumex) — datasheet, cited pages 1
www.mouser.lt/datasheet/2/244/LUMXD00049_141-2551042.pdf
SML-M13MT (ROHM Co., Ltd.) — datasheet
fscdn.rohm.com/en/products/databook/datasheet/opto/led/ch...
SN74LVC1G17 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/sn74lvc1g17.pdf
TXB0108 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/txb0108.pdf
TXS0108E-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/txs0108e.pdf
VPDD202W102K1GV001E (Johanson Dielectrics) — datasheet
www.johansondielectrics.com/docs/4901/johanson_high_volta...

5 Connector Pinouts

Total connectors9

5.1 J1 S1G20

J1 - S1G20 (S1G20)
PinPin NameNetNotes
1Pin_1USB_BOOT_VBUS
2Pin_2Net-(J1-Pin_2)
3Pin_3GND

5.2 J2 S2G20C

J2 - S2G20C (S2G20C)
PinPin NameNetNotes
1Pin_1+3V3
2Pin_2+5V
3Pin_3GPIO2_EXT
4Pin_4+5V
5Pin_5GPIO3_EXT
6Pin_6GND
7Pin_7GPIO4_EXT
8Pin_8GPIO14_EXT
9Pin_9GND
10Pin_10GPIO15_EXT
11Pin_11GPIO17_EXT
12Pin_12GPIO18_EXT
13Pin_13GPIO27_EXT
14Pin_14GND
15Pin_15GPIO22_EXT
16Pin_16GPIO23_EXT
17Pin_17+3V3
18Pin_18GPIO24_EXT
19Pin_19GPIO10_EXT
20Pin_20GND
21Pin_21GPIO9_EXT
22Pin_22GPIO25_EXT
23Pin_23GPIO11_EXT
24Pin_24GPIO8_EXT
25Pin_25GND
26Pin_26GPIO7_EXT
27Pin_27ID_SD
28Pin_28ID_SC
29Pin_29GPIO5_EXT
30Pin_30GND
31Pin_31GPIO6_EXT
32Pin_32GPIO12_EXT
33Pin_33GPIO13_EXT
34Pin_34GND
35Pin_35GPIO19_EXT
36Pin_36GPIO16_EXT
37Pin_37GPIO26_EXT
38Pin_38GPIO20_EXT
39Pin_39GND
40Pin_40GPIO21_EXT

5.3 J3 1862055

J3 - 1862055 (1862055)
PinPin NameNetNotes
1Pin_1RELAY1_NO
2Pin_2RELAY1_NO
3Pin_3RELAY1_COM
4Pin_4RELAY1_COM
5Pin_5RELAY1_NC
6Pin_6RELAY1_NC

5.4 J4 ARJM11D7-009-AB-EW2

J4 - ARJM11D7-009-AB-EW2 (ARJM11D7-009-AB-EW2)
PinPin NameNetNotes
1TD+LAN1_TXP
2TD-LAN1_TXN
3RD+LAN1_RXP
4CTNet-(C39-Pad1)
5CTNet-(C39-Pad1)
6RD-LAN1_RXN
7NCNC
8GNDGND
9LEDG_ANet-(J4-LEDG_A)
10LEDG_KnLNKA_LAN1
11LEDY_ANet-(J4-LEDY_A)
12LEDY_KnSPD_LAN1
13CHASSISEarth

5.5 J5 MEM2052-00-195-00-A

J5 - MEM2052-00-195-00-A (MEM2052-00-195-00-A)
PinPin NameNetNotes
1DAT2SD_DAT2
2DAT3/CDSD_DAT3
3CMDSD_CMD
4VDDSD_PWR
5CLKSD_CLK
6VSSGND
7DAT0SD_DAT0
8DAT1SD_DAT1
9CDNC
S1S1GND
S2S2GND
S3S3GND
S4S4GND

5.6 J6 685119134923

J6 - 685119134923
PinPin NameNetNotes
1D2+HDMI0_D2_P
2D2SNet-(J6-CKS)
3D2-HDMI0_D2_N
4D1+HDMI0_D1_P
5D1SNet-(J6-CKS)
6D1-HDMI0_D1_N
7D0+HDMI0_D0_P
8D0SNet-(J6-CKS)
9D0-HDMI0_D0_N
10CK+HDMI0_CK_P
11CKSNet-(J6-CKS)
12CK-HDMI0_CK_N
13CECHDMI0_CEC
14UTILITYNC
15SCLHDMI0_SCL
16SDAHDMI0_SDA
17GNDGND
18+5VHDMI_5V
19HPDHDMI0_HOTPLUG
SHSHNet-(J6-CKS)

5.7 J7 USB4205-GF-A

J7 - USB4205-GF-A (USB4205-GF-A)
PinPin NameNetNotes
A1GNDGND
A4VBUSUSB_BOOT_VBUS
A5CC1Net-(J7-CC1)
A6D+USB_BOOT_P
A7D-USB_BOOT_N
A8SBU1NC
A9VBUSUSB_BOOT_VBUS
A12GNDGND
B1GNDGND
B4VBUSUSB_BOOT_VBUS
B5CC2Net-(J7-CC2)
B6D+USB_BOOT_P
B7D-USB_BOOT_N
B8SBU2NC
B9VBUSUSB_BOOT_VBUS
B12GNDGND
SHSHIELDNet-(J7-SHIELD)

5.8 J8 5787745-1

J8 - 5787745-1 (5787745-1)
PinPin NameNetNotes
1VUSB15V_OTG_1
2D1-USB_OTG_1_N
3D1+USB_OTG_1_P
4GND1GND
5VUSB25V_OTG_2
6D2-USB_OTG_2_N
7D2+USB_OTG_2_P
8GND2GND
S1SHIELDNet-(J7-SHIELD)
S2SHIELDNet-(J7-SHIELD)
S3SHIELDNet-(J7-SHIELD)
S4SHIELDNet-(J7-SHIELD)

5.9 J9 USB4085-GF-A

J9 - USB4085-GF-A (USB4085-GF-A)
PinPin NameNetNotes
A1GNDGND
A4VBUSNet-(D18-A2)
A5CC1Net-(D16-A2)
A6D+USB_D+
A7D-USB_D-
A8SBU1NC
A9VBUSNet-(D18-A2)
A12GNDGND
B1GNDGND
B4VBUSNet-(D18-A2)
B5CC2Net-(D17-A2)
B6D+USB_D+
B7D-USB_D-
B8SBU2NC
B9VBUSNet-(D18-A2)
B12GNDGND
S1SHIELDGND

6 Indicator Documentation

8 indicator device(s) found.

6.1 Indicator Assignments

Indicators
RefDesTypeColorSignalSheetNotes
D10805_LED_REDRedNet-(D1-K)CM4.kicad_schLOW = On; R2 (1k); A:+3V3 K:Net-(D1-K)
D30805_LED_REDRedNet-(D3-A)CM4.kicad_schDefault OFF; Q3 switches this LED; pull the gate of Q3 below its source rail to light it; R7 (1k); A:Net-(D3-A) K:Net-(D3-K)
D230805_LED_GREENGreenPOWER.kicad_schR49 (1k); Always-on (VCC to GND, no control signal); A:Net-(D23-A) K:GND
D210805_LED_GREENGreenPOWER.kicad_schR46 (1k5); Always-on (VCC to GND, no control signal); A:+5V K:Net-(D21-K)
D60603_LED_REDRednFDX_LAN1ETHERNET_LAN1.kicad_schLOW = On; R23 (330R); A:Net-(D6-A) K:nFDX_LAN1
D70805_LED_GREENGreenETHERNET_LAN1.kicad_schR24 (1k5); Always-on (VCC to GND, no control signal); A:5V_OTG_1 K:Net-(D7-K)
D80805_LED_GREENGreenETHERNET_LAN1.kicad_schR25 (1k5); Always-on (VCC to GND, no control signal); A:5V_OTG_2 K:Net-(D8-K)
D50805_LED_GREENGreenETHERNET_LAN1.kicad_schR14 (1k); Always-on (VCC to GND, no control signal); A:3V3_LAN1 K:Net-(D5-K)

6.2 Indicator Testability

0 of 3 indicators have test coverage. 5 indicator(s) illuminate on their own (power-on / rail-fed / module-driven) and do not need a test point. 1 are transistor-driven.

Indicator Testability
RefDesDriverControl SignalDFT StatusTestable
D1DirectNet-(D1-K)Design Warning: Test point needed on Net-(D1-K). Drive LOW to turn on LED D1.
D3Q3RUNDesign Warning: Test point needed on RUN - pull the gate of Q3 below its source rail to light LED D3, which tests the transistor at the same time.
D23DirectPower indicator (connector)✓
D21DirectPower indicator (connector)✓
D6DirectnFDX_LAN1Design Warning: Test point needed on nFDX_LAN1. Drive LOW to turn on LED D6.
D7DirectPower indicator (connector)✓
D8DirectPower indicator (connector)✓
D5DirectPower indicator✓

7 Switch Documentation

1 switch(es) found in design.

7.1 Switch Configurations

A B
S1 Contact Pairs (PTS810)
ContactPin ANet APin BNet BWhen OpenWhen ClosedNotes
13RUN1GNDSIGNALLOW
S1 All Pins
Pin #Pin NameNetPaired WithType
1GND3CONTACT
2GND3CONTACT
3RUN1CONTACT
4RUN1CONTACT

7.2 Switch DFT Analysis

Switches for mode selection are useful for development and manual debug, but production test environments require electrical override capability. A latching switch (DIP, slide, toggle) holds the signal at the rail it closes onto until somebody moves it, so ATE cannot drive past the contact: it needs a test point and a series isolation resistor between the switch and that rail. A momentary switch (push button) does not hold the signal — the bias resistor sets the level again as soon as the button is released — so it needs only a test point for ATE stimulus access.

IC VCC R_pullup TP SW Rs GND
Design Rationale: Switches for mode selection are valuable for engineering development and bench debug. However, production test and field returns require electrical override capability without manual intervention. Adding test points and isolation resistors creates a lifecycle-robust design that works across development, production test, and field returns without requiring procedure documentation or specialized knowledge of switch positions. The goal is a self-documenting, procedure-proof test interface. BOM impact: One 0201/0402 resistor per controlled signal.
SwitchSignalFunctionPullupRailIssueTest Point?
S1RUNSwitch-controlled signalR4 (100.00K)+3V3 (3.3V)No test point + Switch forces signal, ATE cannot override

7.2.1 Isolation Resistor Options: RUN

Circuit: +3V3 --- R4 (100.00K) --- [signal node/testpoint] --- [switch] --- R_series --- GND. R_series sits on the far side of the switch, so the switch pin never lands on the ground plane. Closing the switch then forms a voltage divider: the IC sees V = Vcc × R_series / (R_pullup + R_series) instead of hard GND. ViL threshold (generic CMOS): 0.990000V max, target 0.841500V (15% margin for resistor tolerance). Verify against device datasheet.

Trade-offs: Lower R_series = more margin below ViL but higher ATE current draw. Higher R_series = lower current but reduced noise margin. Values near 1K-1.5K typically provide good balance for 1.8V signals.

R_seriesV at IC (switch closed)Margin to ViLATE Current (override HIGH)Status
1500.005V0.837V22.00 mAHIGH
2200.007V0.834V15.00 mAOK
3300.011V0.831V10.00 mAOK
4700.015V0.826V7.02 mAOK
6800.022V0.819V4.85 mAOK
1.0K0.033V0.809V3.30 mAOK
1.5K0.049V0.793V2.20 mABEST

8 Low-Speed Serial Interfaces (LSSI)

Detected: 2 I2C

8.1 I2C

I2C: U2 -> U19
Topology: U2 » Targets (U19, TP24, TP25)
SignalNet NameConnectorTest PointTarget Pin
SCLCM4_SCL0(none)TP24_1U19_7 (SCL), U2_5 (GPIO1)
SDACM4_SDA0(none)TP25_1U19_6 (SDA), U2_3 (GPIO0)
AddressTargetIndustry TypeDescription
0x08 (port I2C (SCL on CM4_SCL0), fixed address - Fixed slave address, no address-select pins present; device works as I2C slave role to system MCU/processor)U19HUSB238USB-PD Sink IC Port Controller,
VBUS = 3..25V, WDFN-10
I2C: U2
Topology: U2 » Targets (J6)
SignalNet NameConnectorTest PointTarget Pin
SCLHDMI0_SCLJ6_15(none)U2_175 (HDMI_SCL)
SDAHDMI0_SDAJ6_16(none)U2_173 (HDMI_SDA)
I2C Pull-up Check
NetComponentStatus
CM4_SDA0R44Pull-up resistor 3.3K (R44) found on SDA✓
CM4_SCL0R43Pull-up resistor 3.3K (R43) found on SCL✓
HDMI0_SDAR5Pull-up resistor 4.7K (R5) found on SDA✓
HDMI0_SCLR58Pull-up resistor 4.7K (R58) found on SCL✓

8.2 LSSI DFT Analysis

2 signal(s) missing test point coverage. Test points allow ATE to run tests without requiring operator intervention and setup. They should be considered mandatory for high volume products.
During test, ATE can override functional operation to explicitly test through the interface in ways that functional operation cannot, or is not available at certain test stages.
Missing Test Points
SignalNet NameConnectorInterface
SCLHDMI0_SCLJ6_15I2C: U2
SDAHDMI0_SDAJ6_16I2C: U2

9 High-Speed Serial Interfaces (HSSI)

24 differential pair(s)

Differential pairs detected from _P/_N naming convention which KiCad uses for differential pair identification. Designer should consider explicit assignment to distinct net classes for each SERDES type to explicitly document layout intent.
2 USB differential pair(s) have no controlled-impedance net class assigned. Assign a 90 Ohm differential net class so the impedance intent carries into PCB layout and length tuning.

9.1 Differential Pairs

Differential pairs with designer-specified class annotations.

7 of 15 differential pairs do not specify a target impedance (the Impedance column is blank). Strongly suggested: put the value in the class name - e.g. 100_OHM.
Differential Pairs
Net NameClassImpedanceNotes
LAN1_RXNDIFF_PAIR
LAN1_RXPDIFF_PAIR
LAN1_TXNDIFF_PAIR
LAN1_TXPDIFF_PAIR
HDMI0_CK_P/NDP_100R100 Ohm
HDMI0_D0_P/NDP_100R100 Ohm
HDMI0_D1_P/NDP_100R100 Ohm
HDMI0_D2_P/NDP_100R100 Ohm
USB_LAN_P/NDP_90R90 Ohm
USB_OTG_1_P/NDP_90R90 Ohm
USB_OTG_2_P/NDP_90R90 Ohm
USB_P/NDP_90R90 Ohm
USB_BOOT_P/NUSB
USB_D+USB
USB_D-USB

9.2 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

9.2.1 USB 2.0 Host Port and Boot Multiplexer (U2, U16, J7)

AI-Assisted — U2 USB_DP (U2_165) and USB_DM (U2_167) form the only USB 2.0 port of the CM4S. The port is 480 Mbps high-speed and must be routed as a 90 Ω differential pair with P/N matched to better than 0.15 mm (Raspberry Pi CM4S datasheet). The firmware disables this port by default, and otg_mode=1 in config.txt enables it.

U16 (onsemi FSUSB42 datasheet) steers the port either to the J7 boot receptacle on HSD1 or to the LAN9512 upstream port on HSD2. In the signal path it adds at most 6.5 Ω series resistance per line, 3.7 pF typical on-capacitance and 20 ps typical intra-pair skew. Its -3 dB bandwidth of 720 MHz is well above the 240 MHz fundamental of 480 Mbps signalling.

USB 2.0 is DC-coupled, and its high-speed terminations are inside the transceivers. The absence of series capacitors and external terminations on these pairs is therefore correct.

J7 is drawn with USB 2.0 contacts only, which suits 480 Mbps. Its CC pins carry Rd, so the port presents itself as a sink. On USB_BOOT_P and USB_BOOT_N the line capacitance is set by D24 and D14 at 15 pF typical each, plus the U16 on-capacitance. This loading, not the multiplexer, dominates the high-speed eye at J7.

The host or device role is fixed in hardware by R51 to GND on USB_OTGID. The designer's note on the USB sheet expects the role to follow the cable plugged into the boot socket.

9.2.2 LAN9512 Hub Upstream and Downstream Ports (U9, J8)

AI-Assisted — The upstream port of U9 is USB_LAN_P and USB_LAN_N. It runs from U16_9 HSD2+ and U16_8 HSD2- to U9_59 USBDP0 and U9_58 USBDM0. The two downstream ports, USBDP2/USBDM2 and USBDP3/USBDM3, go directly to the stacked Type-A receptacle J8. All three pairs carry the 90 Ω differential class with correct polarity (SMSC LAN9512 datasheet).

The high-speed transmit current and on-chip termination of U9 are set by R17 on U9_63 USBRBIAS. That resistor was already found compliant in the power review, so no external termination is needed on any hub port.

R16 (825 Ω) pulls U9_11 VBUS_DET to 3V3_LAN1, so the hub behaves as a self-powered hub that is permanently attached. As a result, U9 asserts its USBDP0 pull-up whenever 3V3_LAN1 is on. U2 sees that connect event only while U16 selects HSD2. When J7 VBUS switches U16 to HSD1, the hub, the Ethernet controller and both J8 ports drop off the CM4S bus together.

D26, D27, D28 and D29 put 15 pF typical on each downstream data line. This is the same loading concern as on the J7 boot pair.

9.2.3 HDMI TMDS, DDC and Hot-Plug (U2, J6)

AI-Assisted — The four TMDS pairs run from U2 to the J6 Type A receptacle. U2 pins 131/129 (D2), 125/123 (D1), 119/117 (D0) and 113/111 (CLK) land on J6 pins 1/3, 4/6, 7/9 and 10/12, which is the standard HDMI contact order. All eight nets carry the 100 Ω class.

The CM4S datasheet also sets two layout constraints that the class alone does not convey: P/N matching better than 0.15 mm, and pair-to-pair matching better than 25 mm. TMDS is DC-coupled to the sink termination, so the absence of series capacitors is correct.

D12 and D13 (RClamp0524PA, Semtech datasheet) are wired flow-through, with each IN pin and its matching OUT pin on the same net. They add at most 0.8 pF to ground per line.

J6 pins 2, 5, 8 and 11 are the TMDS shield contacts. They share Net-(J6-CKS) with the shell, and that net reaches GND only through C44 (1 nF) and R30 (1 MΩ). At 250 MHz, C44 alone is about 0.64 Ω before its parasitic inductance, so each pair's shield return passes through a capacitor rather than tying to the ground plane.

HDMI0_HOTPLUG drives Q4, which pulls U2_88 HDMI_HPD_N_1V8 low against its internal 2.2 kΩ pull-up to 1.8 V. This inverts and level-shifts the sink's hot-plug level. Nothing holds the Q4 gate low when no sink is attached.

R5 and R58 (4.7 kΩ) pull the DDC lines to HDMI_5V, and U2 tolerates 5 V on those pins.

9.2.4 10/100 Ethernet and 25 MHz Reference (U9, J4, Y1)

AI-Assisted — The four PHY lines connect straight to the RJ45 magjack J4. U9_55 TXP and U9_56 TXN go to J4_1 TD+ and J4_2 TD-, and U9_52 RXP and U9_53 RXN go to J4_3 RD+ and J4_6 RD-. J4 is described as having integrated magnetics, which provide the line isolation and coupling, so no series capacitors are needed on the PHY side.

R55, R56, R57 and R36 (49.9 Ω each) bias each line to VDD33A_LAN1. Each pair therefore sees 99.8 Ω differential, which matches the 100 Ω cable of 100BASE-TX (IEEE 802.3). The J4 centre taps J4_4 and J4_5 are fed from VDD33A_LAN1 through R20 (10 Ω), with C39 (22 nF) to GND. The four LAN nets are tagged as differential but carry no impedance class.

The PHY analogue supply filtering through FB2, and the PLL supply filtering through FB1, were already found compliant in the power review.

U9 needs a 25 MHz fundamental crystal with ±50 ppm total budget, 50 Ω maximum ESR and 300 µW minimum drive level (LAN9512 datasheet p.243). Y1 is described as a 25 MHz, 18 pF load, 15 ppm part. C16 and C17 (33 pF each) together with the 3 pF typical XI and XO pin capacitance present (33 + 3) / 2 = 18 pF before any PCB stray capacitance. The total load therefore sits a few pF above Y1's rated 18 pF, which pulls the oscillator slightly low. R13 (1 MΩ) is fitted across XI and XO.

9.2.5 microSD Interface (U2, J5)

AI-Assisted — SD_CLK, SD_CMD and SD_DAT0 to SD_DAT3 connect U2 pins 10, 12, 16, 18, 22 and 24 one-to-one to J5. These lines are single-ended, so there is no differential impedance or AC-coupling requirement.

Each line carries one ESD9B5.0ST5G (D35, D34, D9, D10, D32, D33). Each adds 15 pF typical at 0 V and 1 MHz (onsemi ESD9B datasheet, source: Tomachie). With SD_CLK and five more lines at that loading, edge rate and clock frequency are linked: the maximum SDX clock the CM4S drives sets how much of the clock period those 15 pF edges consume.

None of the six SD nets carries a pull-up on this board. The SD bus idles with CMD and DAT held high, so the internal pulls of the CM4S SDX pins decide the idle level when the card is inserted or the host is not driving.

The resistive feed of U2_6 SDX_VDD, and its back-power path through these lines, are reported in the power review.

9.3 Observations

AI-Assisted — Impedance classes are applied unevenly. USB_P, USB_N, USB_LAN, both J8 pairs and all HDMI pairs carry their 90 Ω or 100 Ω class. USB_BOOT_P, USB_BOOT_N and the four LAN1 lines are tagged as differential with no impedance, so the layout receives no target for them.

The ESD strategy is inconsistent. HDMI uses a sub-picofarad flow-through array, while every 480 Mbps USB line uses a 15 pF discrete. The board already carries a low-capacitance part in RClamp0524PA, which could serve the J7 and J8 pairs as well.

J9 is a power-only USB-PD input. Its D+ and D- reach only U19 for charger detection, and no data path exists through it.

The U16 control logic matches the designer's note. The open questions are the fixed USB_OTGID strap, the floating Q4 gate and the J6 shield return.

9.4 Findings

AI-Assisted —
#InterfaceProtocolFindingSeverity
9.4.1USB 2.0 boot port (J7)USB 2.0 High-SpeedUSB_BOOT_P and USB_BOOT_N (J7_A6/B6 and J7_A7/B7 to U16_7 HSD1+ and U16_6 HSD1-) carry 480 Mbps but have no impedance class, while the sibling USB_P/N and USB_LAN_P/N carry the 90 Ω class. Assign the 90 Ω differential class (USB 2.0 specification; Raspberry Pi CM4S datasheet p.4).Low
9.4.210/100 Ethernet (U9, J4)100BASE-TX / 10BASE-TLAN1_TXP, LAN1_TXN, LAN1_RXP and LAN1_RXN are tagged as differential but carry no impedance class. Assign a 100 Ω differential class (IEEE 802.3, 100 Ω twisted-pair media).Low
9.4.3USB 2.0 (U2 role)USB 2.0 OTGR51 (0 Ω) ties U2_168 USB_OTGID to GND. The Raspberry Pi CM4S datasheet (p.4) states this makes the CM4S a USB host, and that it is also the connection for a fixed slave or fixed master, with the role then set by the OS driver. The designer's note on the USB sheet expects the CM4 to become a device when a cable is plugged into the boot socket. With USB_OTGID grounded, the role does not follow the cable or U16 SEL. Check that the OS configuration switches to device mode when U16 selects HSD1.Review
9.4.4USB 2.0 (J7, J8)USB 2.0 High-SpeedD14 and D24 (USB_BOOT_N/P) and D26-D29 (USB_OTG_1_P/N, USB_OTG_2_P/N) are ESD9B5.0ST5G, each 15 pF typical at 0 V and 1 MHz (onsemi ESD9B datasheet p.2, source: Tomachie). On USB_BOOT this adds to the 3.7 pF on-capacitance of U16. The load on a 480 Mbps line was not judged against a stated limit. A low-capacitance array such as the RClamp0524PA already fitted on HDMI (0.8 pF maximum I/O to ground, Semtech datasheet p.3) removes about 14 pF per line.Review
9.4.5USB boot port VBUS (J7)USB Type-CD25 (ESD9B5.0ST5G) on USB_BOOT_VBUS is operated above a datasheet rating. Its VRWM is 5.0 V, below the 5.5 V maximum on the rail (USB Type-C vSafe5V). However, 5.5 V is still below the breakdown, V_BR(min) 5.8 V (at 1 mA, 25 C), so the part is not in breakdown. There is leakage at 5.5 V that the datasheet does not characterise: it guarantees leakage of 100 nA maximum only up to 5.0 V, and leakage rises with temperature (onsemi ESD9B datasheet p.2, source: Tomachie). This leakage is a small shunt on a detect-only VBUS line. A 6 V standoff part restores the leakage guarantee across the whole band.Review
9.4.625 MHz reference (U9, Y1)CrystalY1 is described as an 18 pF load crystal. C16 and C17 (33 pF) with the 3 pF typical U9_61 XI and U9_60 XO pin capacitance (SMSC LAN9512 datasheet p.243) present 18 pF before PCB stray capacitance, so the total load sits above 18 pF and pulls the frequency low. Check the stray capacitance and the frequency-error budget against the ±50 ppm total (p.243); 30 pF load capacitors land nearer 18 pF with typical stray.Review
9.4.725 MHz reference (U9, Y1)CrystalU9 requires a crystal with at most 50 Ω ESR, at least a 300 µW drive-level rating, and a ±50 ppm total budget including aging (SMSC LAN9512 datasheet p.243). Check that Y1 (described as 15 ppm) meets all three. The Y1 ESR and drive-level values were not available at report generation time.Review
9.4.8HDMI DDC (D15)HDMI DDCD15 (RClamp0524PA) on HDMI0_SCL and HDMI0_SDA is operated above a datasheet rating, because R5 and R58 pull both lines to HDMI_5V. VRWM for this part is 5 V, below the 5.5 V maximum on the rail. However, 5.5 V is still below the breakdown, V_BR(min) 6 V (at 1 mA, 25 C), so the part is not in breakdown. There is leakage at 5.5 V that the datasheet does not characterise: it guarantees leakage of 1 µA maximum only up to 5 V, and leakage rises with temperature (Semtech datasheet p.3). The leakage is a small shunt on the pulled-up lines.Review
9.4.9HDMI DDC (U2, J6)HDMI DDCR5 and R58 (4.7 kΩ) pull HDMI0_SDA and HDMI0_SCL to HDMI_5V. The CM4S requires pull-ups as per the HDMI specification without stating a value (Raspberry Pi CM4S datasheet p.16), and the HDMI specification sets the source-side DDC pull-up at 1.5-2.0 kΩ. Check R5 and R58 against the specification revision the product claims.Review
9.4.10HDMI hot-plug (Q4)HDMI HPDHDMI0_HOTPLUG carries only J6_19, D15 and the Q4 gate, with no pull-down. With no sink attached, the Q4 gate floats, and Q4 can pull U2_88 HDMI_HPD_N_1V8 low and report a false hot-plug. Q4 inverts the sink's HPD into the active-low 1.8 V input, which has an internal 2.2 kΩ pull-up (Raspberry Pi CM4S datasheet). A pull-down from HDMI0_HOTPLUG to GND holds Q4 off until a sink drives HPD high.Review
9.4.11HDMI (J6)HDMI TMDSJ6_2 D2S, J6_5 D1S, J6_8 D0S and J6_11 CKS share Net-(J6-CKS) with J6_SH. That net reaches GND only through C44 (1 nF, about 0.64 Ω at 250 MHz before its inductance) and R30 (1 MΩ), so the TMDS shield returns are not tied to ground. The HDMI specification grounds the TMDS shield contacts. Moving J6 pins 2, 5, 8 and 11 to GND, and keeping J6_SH on the chassis net, gives each pair a direct shield return.Review
9.4.12microSD (U2, J5)SD busD9, D10 and D32-D35 (ESD9B5.0ST5G) add 15 pF typical each to SD_CLK, SD_CMD and SD_DAT0-SD_DAT3 (onsemi ESD9B datasheet p.2, source: Tomachie). The maximum SDX clock frequency is not in the CM4S datasheet. It may be possible to supply it with free text on the schematic page where U2 is placed.Review
9.4.13microSD (U2, J5)SD busSD_CMD and SD_DAT0-SD_DAT3 have no pull-up on this board. The SDX_CMD and SDX_D0-SDX_D3 internal pull-ups are not in the CM4S datasheet. It may be possible to supply them with free text on the schematic page where U2 is placed.Review
9.4.14USB 2.0 (U16)USB 2.0 High-SpeedU16_10 O̅E̅ is tied to GND, which enables the switch permanently with SEL choosing the source. Tying it HIGH would disconnect both channels regardless of SEL (onsemi FSUSB42 datasheet p.2).Info
9.4.15USB 2.0 hub (U9)USB 2.0R16 (825 Ω) pulls U9_11 VBUS_DET to 3V3_LAN1, which selects self-powered, permanently attached operation: the USBDP0 pull-up is asserted and Port 1 (Ethernet) is powered (SMSC LAN9512 datasheet pp.22, 139). Pulled low, the hub would remove Port 1 power and the Ethernet controller would stay UNPOWERED.Info
9.4.1610/100 Ethernet (U9)100BASE-TX / 10BASE-TR18 (10 kΩ) pulls U9_41 AUTOMDIX_EN to 3V3_LAN1, which enables HP Auto-MDIX so TXP/TXN and RXP/RXN may swap. Tying the pin to GND would disable Auto-MDIX (SMSC LAN9512 datasheet p.22).Info
9.4.1725 MHz reference (U9)ClockU9_44 CLK24_EN is tied to GND, so no 24 MHz clock is generated on CLK24_OUT. Tied to VDD33IO it would output a 24 MHz partner-hub reference (SMSC LAN9512 datasheet p.23).Info
9.4.18USB-PD input (J9)USB 2.0 (detection only)J9 D+ and D- (A6/B6, A7/B7) reach only U19 D+ and D- for charger detection (Hynetek HUSB238 datasheet, source: Tomachie). No USB data passes through J9, so USB_D+ and USB_D- need no 90 Ω class.Info
9.4.19USB 2.0 (U2 to U16)USB 2.0 High-SpeedUSB_P and USB_N (U2_165 USB_DP, U2_167 USB_DM to U16_3 D+, U16_4 D-) carry the 90 Ω differential class with correct polarity. This meets the 90 Ω, 0.15 mm P/N-matching requirement (Raspberry Pi CM4S datasheet p.4).✓
9.4.20USB 2.0 (all pairs)USB 2.0 High-SpeedNo series capacitor on USB_P/N, USB_BOOT_P/N, USB_LAN_P/N or USB_OTG_1/2_P/N. This is correct: USB 2.0 is DC-coupled and its terminations are on-die (USB 2.0 specification).✓
9.4.21USB 2.0 (U16)USB 2.0 High-SpeedU16 is specified for 480 Mbps USB 2.0 (onsemi FSUSB42 datasheet p.1). Figures: 720 MHz typical -3 dB bandwidth, 200 ps typical jitter at 480 Mbps, 6.5 Ω maximum on-resistance at VCC 3.0 V. VCC on +3V3 (3.185-3.419 V) is within the 2.4-4.4 V recommended range, and USB levels of 3.6 V or less are within the -0.5 to 4.5 V switch I/O range (p.3-4).✓
9.4.22USB 2.0 (U16)USB 2.0 High-SpeedU16_2 SEL on Net-(Q6-D) is held HIGH by R31 (47 kΩ to +3V3), which selects HSD2 (USB_LAN to U9). When USB_BOOT_VBUS is present, Q6 (gate through R32, 1 kΩ) pulls SEL LOW, which selects HSD1 (USB_BOOT to J7) (onsemi p.2). This matches the designer's note on the USB sheet. The HIGH level is at least 3.3 V - 1 µA x 47 kΩ = 3.25 V, against the 1.3 V VIH (p.3).✓
9.4.23USB 2.0 boot port (J7)USB Type-CJ7_A6 and J7_B6 share USB_BOOT_P, and J7_A7 and J7_B7 share USB_BOOT_N, so either plug orientation reaches U16 (USB Type-C specification).✓
9.4.24USB 2.0 boot port (J7)USB Type-CR33 and R34 (5.1 kΩ) connect J7_A5 CC1 and J7_B5 CC2 to GND as Rd. This presents a sink, so a Type-C source applies VBUS to USB_BOOT_VBUS (USB Type-C specification).✓
9.4.25USB 2.0 (J7, J8, J9)USB 2.0D14, D24, D26-D29, D19 and D20 (ESD9B5.0ST5G) have a 5.0 V standoff, which is adequate for USB data lines of at most 3.6 V (onsemi ESD9B datasheet p.2, source: Tomachie).✓
9.4.26USB 2.0 hub upstream (U9)USB 2.0 High-SpeedUSB_LAN_P and USB_LAN_N connect U16_9 HSD2+ and U16_8 HSD2- to U9_59 USBDP0 and U9_58 USBDM0 with correct polarity and the 90 Ω differential class (SMSC LAN9512 datasheet p.22).✓
9.4.27USB 2.0 hub downstream (U9, J8)USB 2.0 High-SpeedU9_2 USBDP2 and U9_1 USBDM2 go to J8_3 D1+ and J8_2 D1-. U9_4 USBDP3 and U9_3 USBDM3 go to J8_7 D2+ and J8_6 D2-. Polarity is correct and both pairs carry the 90 Ω class (SMSC LAN9512 datasheet p.22).✓
9.4.2810/100 Ethernet (U9, J4)100BASE-TX / 10BASE-TU9_55 TXP, U9_56 TXN, U9_52 RXP and U9_53 RXN connect to J4_1 TD+, J4_2 TD-, J4_3 RD+ and J4_6 RD- with correct polarity. Coupling is through the magnetics integrated in J4, so no series capacitors are needed.✓
9.4.2910/100 Ethernet (U9, J4)100BASE-TX / 10BASE-TR55, R56, R57 and R36 (49.9 Ω, 1 %) from each line to VDD33A_LAN1 give 99.8 Ω across each pair, which matches the 100 Ω line impedance of IEEE 802.3.✓
9.4.30HDMI (U2 to J6)HDMI TMDSThe D2, D1, D0 and CLK pairs (U2 pins 131/129, 125/123, 119/117, 113/111) land on J6 pins 1/3, 4/6, 7/9 and 10/12 in the HDMI contact order, and all eight nets carry the 100 Ω class. The CM4S also requires P/N matching better than 0.15 mm and pair-to-pair matching better than 25 mm (Raspberry Pi CM4S datasheet pp.16-17).✓
9.4.31HDMI (U2 to J6)HDMI TMDSThere is no series capacitor on any TMDS pair. This is correct: TMDS is DC-coupled to the sink termination (HDMI specification).✓
9.4.32HDMI (D12, D13)HDMI TMDSD12 and D13 (RClamp0524PA) are wired flow-through, with each IN and matching OUT on the same net. They add at most 0.8 pF line-to-ground and 0.4 pF line-to-line, with -0.126 dB typical insertion loss at 2.5 GHz (Semtech RClamp0524PA datasheet pp.3-4).✓
9.4.33HDMI (D12, D13)HDMI TMDSThe 5 V standoff of D12 and D13 is adequate for the 3.465 V maximum TMDS termination supply (Semtech RClamp0524PA datasheet p.3; HDMI specification).✓

9.5 Citations

AI-Assisted —
References
FSUSB42 (onsemi) — datasheet
www.onsemi.com/pub/Collateral/FSUSB42-D.PDF
LAN9512i (SMSC (Standard Microsystems Corporation)) — datasheet
ogane.com/homebrew/rpi/1440/9512.pdf
RClamp0524PA (Semtech Corporation) — datasheet
4donline.ihs.com/images/VipMasterIC/IC/SEMT/SEMT-S-A00050...
CM4S (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/cm4s/cm4s-datasheet.pdf

10 Memory Interface Analysis

Found 2 complete memory interface(s)

10.1 U10 MICROWIRE

U10 (93LC66AT-I) - MICROWIRE
SignalPin NamePin #Net NameTest Point
DATA_INDI3EEDO_LAN1-
DATA_OUTDO1EEDI_LAN1-
SELECTCS5EECS_LAN1-
DESIGN_WARNING: Test points needed on EECS_LAN1, EEDI_LAN1 and EEDO_LAN1 for direct on-board programming

10.2 J5 SDMMC Connector

J5 (microSD_MEM2052-00-195-00-A) - SDMMC Connector Interface [4-bit]
SignalPin NamePin #Net NameTest PointSource IC
CARD_DETECTCD9--
CLOCKCLK5SD_CLK-U2_10
CMDCMD3SD_CMD-U2_12
DATA_0DAT07SD_DAT0-U2_16
DATA_1DAT18SD_DAT1-U2_18
DATA_2DAT21SD_DAT2-U2_22
DATA_3DAT3/CD2SD_DAT3-U2_24
Direct programming via test points is not needed since SD cards can be pre-programmed and inserted

10.3 AI-Assisted Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

10.3.1 Microwire EEPROM U10 (93LC66A) on the LAN9512 EEPROM Port

AI-Assisted — U10 is a 4 Kbit Microchip 93LC66A in a SOT-23-6 package. It is organised as a fixed 512 x 8, with no ORG pin. It serves as the configuration store for the U9 LAN9512 USB hub and Ethernet controller on sheet ETHERNET_LAN1 (Microchip datasheet).

The link is a point-to-point, four-wire Microwire bus with no series elements. U9 drives EECS_LAN1, EECLK_LAN1 and EEDO_LAN1, and U10_1 DO returns data on EEDI_LAN1.

U10 and the U9 VDD33IO pins share 3V3_LAN1, the U8 load-switch output that GPIO29 enables. The EEPROM and its controller therefore power up and down together, and neither side can back-drive the other.

The timing comparison uses the U9 EEPROM timing table on p.241 of the SMSC LAN9512 datasheet (Datasheet) against the 2.5-5.5 V rows on p.4 of the Microchip datasheet. EECLK runs at 0.88-0.90 MHz, under half the 2 MHz limit, and every setup, hold and chip-select interval clears its minimum by several hundred nanoseconds. On read-back, the 250 ns maximum output delay leaves 860 ns before the next sampling edge, against the 90 ns EEDI setup U9 requires.

R15 (10 kΩ, EECS_LAN1 to GND) holds CS low while U9 is in reset or unpowered. The 93LC66A states table defines CS low as deselected, in standby, with the control logic held in reset, so stray clocking during U9 start-up cannot start an instruction.

The part has no hardware write-protect pin. Array protection relies only on the EWEN/EWDS instruction latch.

10.3.2 microSD Card Interface J5 to the CM4S SDX Port

AI-Assisted — J5 is a microSD socket on the 4-bit SDX port of the CM4S module U2. U2 is the plug-in compute module that holds the BCM2711, its DRAM and any eMMC; none of that memory sits on this board.

The Raspberry Pi CM4S datasheet (Datasheet) states that SDX_CLK, SDX_CMD and SDX_D0-SDX_D3 are available only on CM4Lite. The designer's note "CM4Lite SDCARD I/F" on sheet USD_CARD matches this, so the socket is functional only with an eMMC-less module fitted.

All six bus nets run point-to-point from U2 to J5 with no series resistors. Each net carries one ESD9B5.0ST5G clamp to GND (D9, D10, D32-D35).

Card power comes from SD_PWR, the U13 RT9742 output, which carries C41 (10 µF) and D11. U13_4 EN sits on SD_VDD, whose only other members are R28 (10 kΩ to Net-(U13-VIN)) and U2_4/U2_6 SDX_VDD. As a result, U13 is on whenever Net-(U13-VIN) is up.

The CM4S datasheet defines SDX_VDD as a supply input (1.71-3.45 V operating, p.12) that sets the SDIO signalling level. On this board that input is fed only through R28, which delivers at most 0.33 mA. With the card powered from SD_PWR and the SDX pad bank effectively unpowered, the card side reaches the SDX_CLK, SDX_CMD and SDX_D0-SDX_D3 pads from the wrong side. This defect is carried at its own severity in the power review; here it means the SD bus has no defined signalling level as drawn.

J5_9 (card detect) is on no net. U2_2 EMMC_DISABLE_N is left open, which selects normal boot from SD card or eMMC.

10.4 Observations

AI-Assisted — The U10 Microwire link is correctly wired and comfortably inside every timing and level limit both datasheets state. Its remaining exposures are minor. Access is possible only through U9, because none of the four EEPROM nets carries a test point. Protection against an errant write cycle is provided only by the software write-enable latch.

The microSD interface is where the risk lies, and all of it traces to the SD_VDD net. Because R28 is used both as the U13 enable pull-up and as the only feed to the CM4S SDX_VDD supply input, the host-side pad bank is not powered, and the card cannot be power-cycled by the host. The power-cycle limitation means a card that hangs in a bad state is recovered only by removing the module supply. Feeding SDX_VDD directly from the 3.3 V supply removes the back-drive path. Giving U13_4 EN its own control, whether a host GPIO or a tie to its input, then decides whether card power cycling is available.

Three SD-bus checks are left open because the CM4S datasheet does not state the values they need: the maximum SDX clock, the SDX pin transient rating, and the internal pull-ups on CMD/DAT. With 15 pF typical of clamp capacitance on every line and no series resistor on SD_CLK, edge quality at higher bus speeds depends on the clock rate the firmware selects.

10.5 Findings

AI-Assisted —
#MemoryInterfaceFindingSeverity
10.5.193LC66A (U10)MicrowireNone of EECS_LAN1, EECLK_LAN1, EEDO_LAN1 or EEDI_LAN1 carries a test point, so U10 can be read or programmed only through U9. Adding test points on these four nets gives direct access for factory programming and fault isolation.Review
10.5.2microSD (J5)SD 4-bitU2_4/U2_6 SDX_VDD, the supply input that sets the SDIO signalling level (1.71-3.45 V, CM4S p.12), is fed only through R28 (10 kΩ from Net-(U13-VIN), at most 0.33 mA). The SD bus therefore has no defined signalling level. The card, powered from SD_PWR by U13, reaches the SDX_CLK, SDX_CMD and SDX_D0-SDX_D3 pads of the unpowered bank. This defect is reported at its severity in the power review; feeding SDX_VDD from the 3.3 V supply removes it.Review
10.5.3microSD (J5)SD 4-bitU13_4 EN is held on by R28 whenever Net-(U13-VIN) is present, so the host cannot switch SD_PWR and cannot power-cycle a hung card. Check whether card power cycling is required. If it is, give U13_4 EN its own host-controlled drive.Review
10.5.4microSD (J5)SD 4-bitSD_CMD and SD_DAT0-SD_DAT3 have no pull-up on this board. This is reported in the signal-integrity review; the SDX internal pull-ups are not in the CM4S datasheet.Review
10.5.5microSD (J5)SD 4-bitSD_CLK has no series source resistor between U2_10 and J5_5. The maximum SDX clock frequency is not in the CM4S datasheet. It may be possible to supply it with free text on the schematic page where U2 is placed.Review
10.5.6microSD (J5)SD 4-bitD9, D10 and D32-D35 clamp at 12.5 V maximum at 1 A, 8/20 µs (onsemi ESD9B datasheet p.2, source: Tomachie). The SDX pin ESD/transient voltage rating is not in the CM4S datasheet. It may be possible to supply it with free text on the schematic page where U2 is placed.Review
10.5.7microSD (J5)SD 4-bitNone of SD_CLK, SD_CMD or SD_DAT0-SD_DAT3 carries a test point; only SD_PWR has one (TP21). Test points on the six bus nets would allow the SD bus to be probed and tested in production.Review
10.5.893LC66A (U10)MicrowireU10 has no hardware write-protect pin in this package. The array is protected only by the EWEN/EWDS write-enable latch (Microchip p.5).Info
10.5.993LC66A (U10)MicrowireU10 (-I grade, -40 to +85 C, Microchip p.1) and U9 (industrial, -40 to +85 C, LAN9512 p.235) share the same range. The design states no maximum ambient.Info
10.5.10microSD (J5)SD 4-bitThe SDX pins are available only on CM4Lite (CM4S p.13). The designer's note "CM4Lite SDCARD I/F" on sheet USD_CARD states this build intent; with an eMMC module fitted, J5 is unused.Info
10.5.11microSD (J5)SD 4-bitU2_2 EMMC_DISABLE_N is open, which selects normal boot from SD card or eMMC through the internal 10 kΩ pull-up. Driving it low, which Q1 can do, forces USB boot (CM4S p.13).Info
10.5.12microSD (J5)SD 4-bitJ5_9 card detect is on no net, so card insertion and removal are not signalled to the host. Wiring it with a pull-up to a host GPIO, such as GPIO32, whose ALT4 function is SD_CARD_PRES (CM4S p.5), would provide card detection.Info
10.5.1393LC66A (U10)MicrowireU10_6 VCC is on 3V3_LAN1 (3.12-3.42 V from U8), within the 2.5-5.5 V supply range. U10_2 GND is on GND (Microchip datasheet p.1, Datasheet).✓
10.5.1493LC66A (U10)MicrowireSignal direction is correct. U9_25 EEDO drives U10_3 DI, U10_1 DO drives U9_26 EEDI, U9_23 EECLK drives U10_4 CLK, and U9_24 EECS drives U10_5 CS (SMSC LAN9512 datasheet p.21, Datasheet).✓
10.5.1593LC66A (U10)MicrowireThe EECLK cycle of 1110-1130 ns (0.88-0.90 MHz, LAN9512 p.241) is below the 2 MHz maximum. EECLK high and low times of 550 ns minimum exceed the 250 ns high and 200 ns low minimums (Microchip p.4).✓
10.5.1693LC66A (U10)MicrowireEECS high before EECLK rising is 1070 ns minimum, against the 100 ns CS setup. EECS low time is 1070 ns, against the 250 ns CS low minimum. EECLK falling to EECS low is 30 ns, against the 0 ns CS hold (LAN9512 p.241; Microchip p.4).✓
10.5.1793LC66A (U10)MicrowireEEDO is valid 550 ns before and held 550 ns after the EECLK rising edge. Both exceed the 100 ns DI setup and 100 ns DI hold minimums (LAN9512 p.241; Microchip p.4).✓
10.5.1893LC66A (U10)MicrowireThe maximum DO output delay is 250 ns (2.5 V ≤ VCC < 4.5 V, 100 pF). This leaves 1110 - 250 = 860 ns before the next EECLK rising edge, against the 90 ns EEDI setup U9 requires (Microchip p.4; LAN9512 p.241).✓
10.5.1993LC66A (U10)MicrowireU9 drives U10's inputs with a VOH minimum of VDD33IO - 0.4 V = 2.72 V at 3.12 V, above the 2.0 V VIH, and a VOL of 0.4 V maximum, below the 0.8 V VIL. The maximum level of 3.42 V is inside the VIH maximum of VCC + 1 V (LAN9512 p.238; Microchip p.3).✓
10.5.2093LC66A (U10)MicrowireU10 DO drives U9 EEDI. VOL is 0.2 V maximum (100 µA, VCC 2.5 V row), below the 1.01 V VILT minimum. VOH is 2.4 V minimum (VCC 4.5 V, -400 µA) and VCC - 0.2 V (VCC 2.5 V, -100 µA); both rows bracketing 3.3 V exceed the 1.8 V VIHT maximum. The load is the 50 µA typical internal pull-down (Microchip p.3; LAN9512 pp.238, 21).✓
10.5.2193LC66A (U10)MicrowireR15 (10 kΩ) runs from EECS_LAN1 to GND and holds U10_5 CS low while U9 is reset or unpowered. The states table gives this as deselected, standby, with control logic held in reset. It loads the U9 O8 output with 0.33 mA, against 8 mA drive (Microchip p.4; LAN9512 p.242).✓
10.5.2293LC66A (U10)MicrowireU10_1 DO is High-Z outside a read. EEDI_LAN1 is defined by the U9_26 50 µA typical internal pull-down. DI and DO are separate nets, so the bus-conflict resistor required when they are tied together does not apply (Microchip p.6; LAN9512 p.21).✓
10.5.2393LC66A (U10)MicrowireU10_6 VCC and the U9 VDD33IO pins are on the same switched rail, 3V3_LAN1. No EEPROM line can back-power an unpowered side.✓
10.5.24microSD (J5)SD 4-bitJ5_7 DAT0, J5_8 DAT1, J5_1 DAT2, J5_2 DAT3/CD, J5_3 CMD and J5_5 CLK connect one-to-one to U2_16 SDX_D0, U2_18 SDX_D1, U2_22 SDX_D2, U2_24 SDX_D3, U2_12 SDX_CMD and U2_10 SDX_CLK. This is a 4-bit, point-to-point bus (Raspberry Pi CM4S datasheet p.13, Datasheet).✓
10.5.25microSD (J5)SD 4-bitD9, D10 and D32-D35 (ESD9B5.0ST5G) have a 5.0 V standoff, which is adequate for the SD lines at the 3.45 V maximum SDX_VDD level (onsemi ESD9B datasheet p.2, source: Tomachie; CM4S p.12).✓

10.6 Citations

AI-Assisted —
References
93LC66A (Microchip Technology Inc.) — datasheet
ww1.microchip.com/downloads/en/DeviceDoc/21795E.pdf
CL10A475KQ8NNNC (Samsung Electro-Mechanics) — datasheet
mm.digikey.com/Volume0/opasdata/d220001/medias/docus/609/...
CL10B105KP8NNNC (Samsung Electro-Mechanics) — datasheet
datasheet.octopart.com/CL10B105KP8NNNC-Samsung-datasheet-...
CL10B223KB8NNNC (Samsung Electro-Mechanics) — datasheet
media.digikey.com/pdf/Data%20Sheets/Samsung%20PDFs/CL10B2...
KGM15ACG1E330JT (KYOCERA AVX) — datasheet
datasheets.kyocera-avx.com/C0GNP0-KGM.pdf
LAN9512i (SMSC (Standard Microsystems Corporation)) — datasheet
ogane.com/homebrew/rpi/1440/9512.pdf
CM4S (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/cm4s/cm4s-datasheet.pdf
VPDD202W102K1GV001E (Johanson Dielectrics) — datasheet
www.johansondielectrics.com/docs/4901/johanson_high_volta...

11 Functional Analysis

9 device(s) to review across 5 category(ies)

Device Inventory
RefDesCategoryPart NumberDescriptionInterfacesHSSI
Y1CRYSTALFY250011725 MHz, 18pF, shunt 5pF, 15ppm, Three pin crystal, GND on pin 2--
U16DEVICEFSUSB42MUXLow-Power, Two-Port, High-Speed, USB2.0 (480Mbps) or UART Switch, MSOP-10--
U2DEVICERPi-CM4S_RABCM2711B Broadcom 1.5 GHZ quad core, 1/2/4/8 GB RAM 0/8/16/32 GB eMMC, industrial SoM computerI2C, SDMMC [SD]-
U9DEVICELAN9512I-JZXTwo USB 2.0 hub with an integrated 10/100 Ethernet controller (-40°C to +85°C), QFN-64--
D3DIODESML-M13UTT86LED red 0805--
D6DIODESML-LXFM0603SIC-TRLED red 0603--
K1RELAYIM03GRIM Relay, monostable, switching current 2A, 5V, Rcoil 178R, gull wing--
Q1Trans.2N7002WN-MOSFET 60V, 0,31A, Vgsth = 2.1Vtyp, SC-70--
Q7Trans.AONR21307P-Channel 30V, Id 24A, Vgstyp = 1.8V, DFN-8 3x3 mm--

11.1 Reset-Time Strap Configuration

Each device below takes part of its start-up configuration from resistors the board fits on pins it samples at reset. Every setting is resolved against that device's own datasheet tables - the combination this board selects, and whether the datasheet marks that combination reserved or invalid.

RefDesConfigurationThis Board SelectsRead FromStatus
U9LAN9512I-JZXNo reset-time straps: The provided pages describe dedicated configuration inputs like AUTOMDIX_EN and factory TEST1-4 pins with fixed static connections, but do not describe any pin sampled once at reset for boot-mode/address/strap selection that then reverts to a different functional role, nor any multi-level resistor-divider strap table.✓
RefDesPinRead FromSets
U2EMMC_DISABLE_N (U2_2)open (no strap resistor fitted)boot source = boot from SD card or eMMC (normal boot)
U2USB_OTGID (U2_168)down (R51 to GND)USB host/device role = CM4S becomes a USB host
U2EEPROM_nWP (U2_38)open (on no net - unconnected)on-board EEPROM write protection = EEPROM writable

11.2 Functional Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

11.2.1 Raspberry Pi CM4S Module (U2)

AI-Assisted — U2 is the CM4S compute module. Its VBAT, 3V3, GPIO bank and SDX_VDD feeds are covered in the power review. This section checks the remaining pin requirements against the Raspberry Pi CM4S datasheet (Datasheet).

U2_189 and U2_190 VDAC reach the module 3V3 net through R9 (0 Ω). U2_166 TVDAC is left unconnected, so composite video is unused. In that case the datasheet allows VDAC on +3.3 V but requires it to be powered, and it is. U2_179 VDD_CORE is unconnected, as the datasheet requires. The NC pins 124 to 162 are unconnected, and pins 183 to 186, which may be either unconnected or +1.8 V, are left unconnected. The VideoCore JTAG pins U2_172, U2_174, U2_176, U2_178 and U2_180 are open, which the datasheet describes as the usual connection. DSI0, DSI1, CAM0 and CAM1 are unused in this build.

U2_38 EEPROM_nWP is unconnected. The module's internal 100 kΩ pull-up therefore holds the bootcode EEPROM writable at all times, although the datasheet recommends that final products ground the pin. Because the module's own bootloader writes this EEPROM, the pin cannot usefully be gated from a module GPIO.

GPIO0 and GPIO1 (U2_3, U2_5) carry the U19 I2C bus through R52 and R53. These are the HAT-ID pins, which the firmware probes at boot.

The RUN net carries several parts:
- the internal 10 kΩ pull-up, with R4 (100 kΩ) to +3V3 in parallel;
- the S1 reset button to GND;
- the Q3 gate and the U7 input;
- D2 (ESD9B3.3ST5G).

D2 is operated above its datasheet leakage rating on the +3V3 band; the findings table states the margin. Its leakage is a shunt on a node held by 10 kΩ and has no functional effect. The ESD9B5.0ST5G already fitted elsewhere on the board would restore the leakage guarantee, at the cost of a higher clamp: 12.5 V instead of 10.5 V at 1 A.

The module is rated -20 to +85 C, which covers the stated 40 C ambient.

11.2.2 Boot-Select and ACT LED Stage (Q1, Q2, J1, D1)

AI-Assisted — Q1 and Q2 (2N7002W) form an AND gate on U2_2 EMMC_DISABLE_N. Q1's drain is on EMMC_DISABLE_N, and its source sits on Net-(Q1-S), which is Q2's drain. Q2's source is grounded, and its gate is driven by U2_90 EMMC_EN_N_1V8.

U2_2 is pulled low, forcing USB boot, only when both of these hold:
- J1 links pin 2 to pin 1, putting the Q1 gate on USB_BOOT_VBUS with a boot cable present;
- the module holds EMMC_EN_N_1V8 high, meaning it is not accessing SD or eMMC.

This matches the CM4S datasheet's guidance that EMMC_EN_N_1V8 is typically connected through a FET to EMMC_DISABLE_N, and that EMMC_DISABLE_N must be driven by an open-collector device (p.7, p.13). With no jumper fitted, R1 (47 kΩ) holds Q1 off, and J1 pins 2-3 ground the gate.

The same Q2 sinks D1 through R2 (1 kΩ) from +3V3, making D1 the activity indicator.

Q1's gate sees at most 5.5 V from USB_BOOT_VBUS against a source near ground. This is well inside the ±20 V VGS rating (onsemi datasheet, p.1).

Q2 is the weak point. EMMC_EN_N_1V8 idles at 1.8 V through the module's 2.2 kΩ pull-up. The 2N7002W threshold is 1.0 to 2.0 V at 250 µA, and its Rds(on) is specified only at VGS 5 V and 10 V (p.2). The stage asks Q2 to sink about 1.9 mA:
- 0.33 mA from the 10 kΩ EMMC_DISABLE_N pull-up;
- about 1.5 mA through D1.

At the 2.0 V threshold maximum, Q2 does not turn on at all.

11.2.3 Reset Indicator (D3)

AI-Assisted — D3 (SML-M13UTT86, red) lights while the module is not running. Its anode is driven from +3V3 by the Q3 drain, whose gate sits on RUN. Its cathode returns to GND through R7 (1 kΩ). When RUN is low, the module is held in reset or has not started.

The current is at most 3.4 mA by the V/R bound. At a forward voltage near 1.85 V, the ROHM forward current curve (p.15) gives about 1.5 mA. The DERATING curve (p.18) allows 30 mA continuous up to 40 C (ROHM datasheet, source: Tomachie).

Q3 (BSS84AK) has no datasheet data here, so its threshold at the -3.3 V gate drive was not checked.

11.2.4 USB Hub and Ethernet Controller (U9)

AI-Assisted — U9 is the LAN9512 two-port USB 2.0 hub with an integrated 10/100 Ethernet controller. The following were checked against the SMSC LAN9512 datasheet (Datasheet) and are not repeated from the earlier sections: power, EXRES, USBRBIAS, TEST2, TEST3, VBUS_DET, AUTOMDIX_EN, CLK24_EN, PRTCTL and the EEPROM interface.

U9_12 R̅E̅S̅E̅T̅ has no internal pull. It is held high by R12 (10 kΩ) to 3V3_LAN1, which meets the datasheet's instruction to tie it high when unused (p.21). The internal 22 ms power-on reset handles start-up. C14 (10 nF), drawn on nRESET_LAN1 to GND, is marked not fitted.

U9_13 TEST1 and U9_47 TEST4 are unconnected, as the datasheet requires (p.23). The six NC pins (U9_6 to U9_9, U9_17, U9_18) are left floating, as p.25 requires. U9_35 to U9_37, U9_42 and U9_43 (GPIO3 to GPIO7) are open, and their 50 µA internal pull-ups keep them at a defined level.

The JTAG port pins are tied hard to 3V3_LAN1:
- U9_28 T̅R̅S̅T̅, which the datasheet says should be tied high when unused;
- U9_29 TMS, U9_30 TDI and U9_32 TCK, which have no internal pull, so the tie gives them a defined level.

U9_31 TDO is open. The datasheet's connection rule is met, but no access to the port remains.

The industrial grade (-40 to +85 C) covers the stated 40 C ambient. The junction temperature at the 763 mW 100BASE-TX dissipation (p.237) was not computed.

11.2.5 25 MHz Crystal (Y1)

AI-Assisted — Y1 (FY2500117) drives U9_61 XI and U9_60 XO. Load capacitors C16 and C17 (33 pF C0G) each run to GND, and R13 (1 MΩ) sits across the crystal.

As seen across the crystal through ground, the load is C16 × C17 / (C16 + C17) + C_stray. With the 3 pF typical XI and XO pin capacitance added to each side (LAN9512 p.243), that is 36 × 36 / 72 = 18 pF, plus board stray. This matches Y1's 18 pF load, and the load balance itself is reported in the signal-integrity review.

The PSE Technology FY2500117 datasheet (source: Tomachie) settles the crystal requirements that the LAN9512 datasheet sets (p.243). Its ESR is 50 Ω maximum, against the 50 Ω maximum required. Its rated drive level is 300 µW, against a requirement that the drive-level rating be at least 300 µW; the typical operating drive is 10 µW.

The frequency budget totals 45 ppm:
- calibration ±20 ppm;
- stability over temperature ±20 ppm;
- first-year aging ±5 ppm.

This is inside the ±50 ppm IEEE 802.3u budget and matches the roughly ±45 ppm target that LAN9512 Note 5.13 sets once aging is allowed for. The crystal's -40 to +85 C range covers U9's industrial range and the 40 C ambient.

11.2.6 Full-Duplex LED (D6)

AI-Assisted — D6 (SML-LXFM0603SIC, red) has its anode on VDD33A_LAN1 through R23 (330 Ω) and its cathode on U9_20 F̅D̅X̅_L̅E̅D̅/GPIO0.

The pin is driven low in full duplex, which turns the LED on (LAN9512 p.21). When the pin is high, its internal 50 µA pull-up and the anode both sit at 3.3 V, so the LED stays off.

The current is bounded by 3.42 V / 330 Ω = 10.4 mA. Using the Lumex 2.0 V typical forward voltage (Datasheet), it is about 4 mA. The anode and the pin are both on the U8-switched LAN domain, so the LED cannot back-power U9. The LED's maximum forward current was not checked.

11.2.7 USB Data Switch (U16)

AI-Assisted — U16 (FSUSB42) routes the CM4S USB port between two destinations:
- the J7 boot port (HSD1);
- the U9 hub upstream port (HSD2).

The O̅E̅ and SEL wiring and the high-speed suitability are already covered in the signal-integrity review.

U16_1 VCC is on +3V3. At 3.185 to 3.419 V this is inside the 2.4 to 4.4 V recommended range and well below the 5.6 V absolute maximum. It is bypassed locally by C45 (1 µF X7R).

When Q6 pulls SEL low against R31 (47 kΩ), the SEL level is about 0.6 mV. This uses at most 73 µA through Q6's 7.5 Ω maximum Rds(on) (onsemi 2N7002W, p.2). The result is far below the 0.5 V VIL (onsemi FSUSB42 datasheet, p.3).

The USB lines stay at or below 3.6 V, inside the -0.5 to 4.5 V switch I/O range.

11.2.8 Relay Drive (K1)

AI-Assisted — K1 (IM03GR, 5 V monostable) is wired as follows:
- one coil end, K1_1, is on +5V;
- the other coil end, K1_8, is switched to GND by Q5 (2N7002W);
- the Q5 gate is on RELAY1, driven by U2_28 GPIO28.

The coil supply and the D4 flyback diode passed in the power review. Only one pole is used. K1_5, K1_6 and K1_7 go to J3 as NO, COM and NC, and the second pole (K1_2 to K1_4) is left unconnected by the designer.

GPIO28 has no default pull (CM4S p.5). R11 (100 kΩ) to GND therefore holds Q5 off from power-up until firmware drives the pin, drawing at most 34 µA when the pin is driven high.

The coil draws up to 34 mA at 5.5 V across the 160 Ω minimum coil resistance (178 Ω -10 %; TE datasheet, p.3). Q5's gate sees the GPIO high level of 2.79 to 3.42 V, which is the GPIO28-45_VDD supply minus 0.4 V at the low corner. That is above the 2.0 V maximum threshold, but the 2N7002W's Rds(on) is specified only at VGS 5 V and 10 V.

11.2.9 USB-PD Input Switch (Q7)

AI-Assisted — Q7 (AONR21307, P-channel) is the sink switch between the fused J9 VBUS and +5V. Its VGS, Rds(on), thermal, VDS and back-feed questions are covered in the power review.

The sources (Q7_1 to Q7_3) are on Net-(Q7-S1) after F1, and the drain (Q7_5) feeds +5V through R45. The input voltage therefore reverse-biases the body diode, so +5V stays off until U19_10 GATE pulls the gate low through R39.

When U19 releases GATE, Q7 turns off only through R38 (51 kΩ). Removing the 17 nC typical gate charge at VGS 4.5 V (AOS datasheet, p.2) at about 0.1 mA takes of the order of 0.2 ms. This adds to U19's 50 µs over-voltage debounce (Hynetek HUSB238 datasheet, source: Tomachie).

11.3 Findings

AI-Assisted —
#DeviceFindingSeverity
11.3.1Q2 (2N7002W) in the Q1 boot-select stageThe Q2 gate is on EMMC_EN_N_1V8, which idles at 1.8 V through the module's 2.2 kΩ pull-up. The 2N7002W VGS(th) is 1.0-2.0 V at 250 µA, and Rds(on) is specified only at VGS 5 V and 10 V (onsemi p.2). At the 2.0 V maximum threshold Q2 does not conduct. At the 1.76 V typical it passes about the 250 µA test current, against the about 1.9 mA the stage needs (0.33 mA from the U2_2 pull-up plus about 1.5 mA through D1 and R2). With J1 in the boot position, U2_2 is therefore not reliably pulled low and D1 may not light. Fit an N-MOSFET whose Rds(on) is specified at VGS 1.8 V or lower.Medium
11.3.2U2 (CM4S)U2_38 EEPROM_nWP is unconnected. The internal 100 kΩ pull-up to GPIO28-45_VDD holds the bootcode EEPROM writable at all times. The CM4S datasheet (p.14) recommends that final products ground this pin. The module's own bootloader or usbboot writes the EEPROM (p.22), so it cannot be gated from a GPIO. Add a jumper or 0 Ω option from U2_38 to GND, fitted on production units and removed for bootloader updates.Low
11.3.3U2 (CM4S)U2_3 GPIO0 and U2_5 GPIO1 carry the U19 I2C bus (CM4_SDA0 and CM4_SCL0 via R52 and R53) rather than a HAT ID EEPROM. The CM4S datasheet says to add force_eeprom_read=0 and disable_poe_fan=1 to config.txt in this case, so the firmware does not probe these pins for a HAT EEPROM.Review
11.3.4D2 (ESD9B3.3ST5G) on RUNOperated above a datasheet rating. VRWM for this part is 3.3 V, below the 3.419 V maximum on +3V3. However, 3.419 V is still below the breakdown voltage, V_BR(min) 5.0 V (at 1.0 mA, 25 C), so the part is not in breakdown. There is leakage at 3.419 V that the datasheet does not characterise: it guarantees 100 nA maximum only up to 3.3 V, and leakage rises with temperature. That leakage is a shunt on a node held by 10 kΩ and has no functional effect. The ESD9B5.0ST5G already fitted elsewhere restores the guarantee, with a 12.5 V instead of 10.5 V clamp at 1 A (onsemi datasheet, source: Tomachie).Review
11.3.5U9 (LAN9512)U9_28 T̅R̅S̅T̅, U9_29 TMS, U9_30 TDI and U9_32 TCK are tied directly to 3V3_LAN1, and U9_31 TDO is unconnected. This meets the instruction to tie T̅R̅S̅T̅ high when unused (p.21), and TMS, TDI and TCK have no internal pull, so the tie defines them. It leaves U9's boundary-scan port unreachable. Connecting the four inputs through pull resistors with test points, and adding a test point on TDO, gives JTAG access.Review
11.3.6K1 (IM03GR) / Q5 (2N7002W)Q5's gate is driven at 2.79-3.42 V (GPIO VOH min = GPIO28-45_VDD - 0.4 V, CM4S p.12). This is above the 2.0 V maximum VGS(th), but the 2N7002W Rds(on) is specified only at VGS 5 V and 10 V (onsemi p.2). The K1 coil draws up to 34 mA (5.5 V into 160 Ω minimum, TE p.3). To reach the 3.75 V operate voltage from +5V at 4.75 V, Q5 may drop at most 1.0 V. A MOSFET with Rds(on) specified at VGS 2.5 V would characterise the switch at the drive it is given.Review
11.3.7Q7 (AONR21307)When U19 releases GATE, Q7 turns off only through R38 (51 kΩ). Removing the 17 nC typical gate charge at VGS 4.5 V (AOS p.2) at about 0.1 mA takes of the order of 0.2 ms, after U19's 50 µs over-voltage debounce (Hynetek HUSB238 datasheet p.6, source: Tomachie). This sets how long +5V stays connected after a fault is detected.Review
11.3.8U2 (CM4S)DSI0, DSI1, CAM0 and CAM1 pins are left unconnected by the designer, so the display and camera interfaces are unused in this build. Wiring them would require 100 Ω differential routing (CM4S p.16-17).Info
11.3.9U9 (LAN9512)C14 (10 nF), drawn from nRESET_LAN1 to GND, is marked not fitted, so the reset pin has no RC filter. Fitting it would slow the reset edge from the R12 pull-up.Info
11.3.10K1 (IM03GR)Only one pole is used: K1_5 NO, K1_6 COM and K1_7 NC go to J3. The second pole, K1_2 to K1_4, is left unconnected by the designer.Info
11.3.11U2 (CM4S)U2_189 and U2_190 VDAC are tied to the module 3V3 net through R9 (0 Ω), and U2_166 TVDAC is unconnected. The CM4S datasheet (p.7) permits VDAC on +3.3 V when TV-out is unused, provided it stays powered, which it is.✓
11.3.12U2 (CM4S)U2_179 VDD_CORE is unconnected, as the CM4S datasheet requires ("do not connect anything to this pin").✓
11.3.13U2 (CM4S)NC pins U2_124, U2_126, U2_130, U2_132, U2_154, U2_156, U2_160 and U2_162 are unconnected. U2_183 to U2_186 are also unconnected, which the CM4S datasheet allows ("either unconnected or +1.8V").✓
11.3.14U2 (CM4S)U2_172 V̅C̅_̅T̅R̅S̅T̅, U2_174 VC_TDI, U2_176 VC_TMS, U2_178 VC_TDO and U2_180 VC_TCK are unconnected. The CM4S datasheet gives this as the usual connection.✓
11.3.15U2 (CM4S)The rated operating range is -20 to +85 C (CM4S p.11), which covers the stated 40 C ambient.✓
11.3.16Q1 (2N7002W)Q1's drain drives U2_2 EMMC_DISABLE_N as an open-drain device, which meets the CM4S requirement that this pin, with its internal 10 kΩ pull-up, be driven by an open-collector signal (p.13). Together with Q2 it forms an AND gate: USB boot is forced only with J1 pins 1-2 linked, a boot cable present and EMMC_EN_N_1V8 high.✓
11.3.17Q1 (2N7002W)The gate reaches at most 5.5 V from USB_BOOT_VBUS through J1, with the source near GND, giving VGS ≤ 5.5 V against the ±20 V continuous rating (onsemi p.1). R1 (47 kΩ) to GND holds Q1 off with no jumper fitted. Q1 carries 0.33 mA against its 115 mA rating.✓
11.3.18D1 (SML-M13UTT86)D1 current through R2 (1 kΩ) from +3V3 is at most 3.4 mA (V/R bound), and about 1.5 mA at its forward voltage. This is against 30 mA at 40 C on the DERATING curve (ROHM p.18, source: Tomachie).✓
11.3.19D3 (SML-M13UTT86)D3 lights through Q3 from +3V3 while RUN is low, with R7 (1 kΩ) to GND. Current is at most 3.4 mA (V/R bound) and about 1.5 mA from the forward current curve (p.15). The DERATING curve (p.18) permits 30 mA at 40 C, and the 75 mW rating is not approached (ROHM datasheet, source: Tomachie).✓
11.3.20U9 (LAN9512)U9_12 R̅E̅S̅E̅T̅ is held high by R12 (10 kΩ) to 3V3_LAN1, which meets the instruction to tie it high when unused (LAN9512 p.21). The internal 22 ms power-on reset (p.145) handles start-up.✓
11.3.21U9 (LAN9512)U9_13 TEST1 and U9_47 TEST4 are unconnected, and the six NC pins U9_6 to U9_9, U9_17 and U9_18 are floating. Both meet the LAN9512 datasheet requirements (p.23, p.25).✓
11.3.22U9 (LAN9512)U9_35, U9_36, U9_37, U9_42 and U9_43 (GPIO3 to GPIO7) are unconnected. Their 50 µA internal pull-ups give them a defined level (LAN9512 p.22).✓
11.3.23U9 (LAN9512)The industrial rating is -40 to +85 C (LAN9512 p.235), which covers the stated 40 C ambient.✓
11.3.24Y1 (FY2500117)ESR is 50 Ω maximum, against the 50 Ω maximum U9 requires (PSE FY2500117 datasheet p.3, source: Tomachie; LAN9512 p.243, Datasheet).✓
11.3.25Y1 (FY2500117)The rated maximum drive level is 300 µW, against U9's requirement of a drive-level rating of at least 300 µW. The operating drive level is 10 µW typical (FY2500117 p.3; LAN9512 p.243).✓
11.3.26Y1 (FY2500117)Calibration ±20 ppm, stability ±20 ppm and first-year aging ±5 ppm give ±45 ppm. This is inside the ±50 ppm IEEE 802.3u budget and matches LAN9512 Note 5.13 (about ±45 ppm allowing for aging).✓
11.3.27Y1 (FY2500117)The operating range is -40 to +85 C, which matches U9's industrial crystal range (LAN9512 p.243) and covers the 40 C ambient.✓
11.3.28D6 (SML-LXFM0603SIC)The cathode is on U9_20 F̅D̅X̅_L̅E̅D̅, and the anode goes through R23 (330 Ω) to VDD33A_LAN1. The pin driven low (full duplex) lights the LED. Driven high, with its 50 µA internal pull-up, the pin turns the LED off. Orientation and drive are consistent (LAN9512 p.21).✓
11.3.29D6 (SML-LXFM0603SIC)Current is at most 10.4 mA (3.42 V / 330 Ω), and about 4 mA at the 2.0 V typical forward voltage (Lumex datasheet). The LED and U9 share the U8-switched domain, so there is no back-powering path.✓
11.3.30U16 (FSUSB42)U16_1 VCC on +3V3 at 3.185-3.419 V is inside the 2.4-4.4 V recommended range and below the 5.6 V absolute maximum (onsemi FSUSB42 datasheet p.3, Datasheet). C45 (1 µF, 10 V X7R) bypasses it locally.✓
11.3.31U16 (FSUSB42)With Q6 on, U16_2 SEL sits at about 0.6 mV (73 µA from R31 at 47 kΩ, through Q6's 7.5 Ω maximum Rds(on), onsemi 2N7002W p.2). This is below the 0.5 V VIL at VCC 3.0-3.6 V (FSUSB42 p.3).✓
11.3.32U16 (FSUSB42)The USB lines on D+, D-, HSD1 and HSD2 stay at or below 3.6 V, inside the -0.5 to 4.5 V recommended switch I/O range. The -40 to +85 C rating covers the 40 C ambient (FSUSB42 p.3).✓
11.3.33K1 (IM03GR)R11 (100 kΩ) from RELAY1 to GND holds the Q5 gate low while U2_28 GPIO28, which has no default pull (CM4S p.5), is an input. K1 therefore stays released through power-up and boot.✓
11.3.34Q7 (AONR21307)The sources Q7_1 to Q7_3 are on Net-(Q7-S1) after F1, and the drain Q7_5 feeds +5V through R45. The input reverse-biases the body diode, so +5V stays off until U19_10 GATE pulls the gate low through R39 (5.1 kΩ). The orientation is correct for a sink load switch (AOS datasheet p.1, Datasheet).✓

11.4 Citations

AI-Assisted —
References
1N4007FL (AGERTECH MICROELECTRONICS) — datasheet, cited pages 1
datasheet.lcsc.com/datasheet/pdf/e95e9f9588b304a160769fb2...
2N7002W (onsemi) — datasheet
www.onsemi.com/pdf/datasheet/2n7002w-d.pdf
3216FF5 (Eaton) — datasheet
www.eaton.com/content/dam/eaton/products/electronic-compo...
AONR21307 (Alpha & Omega Semiconductor) — datasheet
www.aosmd.com/res/data_sheets/AONR21307.pdf
CC0603KRX7R8BB104 (Yageo) — datasheet
www.yageo.com/upload/media/product/productsearch/datashee...
CC0603KRX7R9BB103 (Yageo) — datasheet
www.yageo.com/upload/media/product/productsearch/datashee...
CL10A475KQ8NNNC (Samsung Electro-Mechanics) — datasheet
mm.digikey.com/Volume0/opasdata/d220001/medias/docus/609/...
CL10B105KP8NNNC (Samsung Electro-Mechanics) — datasheet
datasheet.octopart.com/CL10B105KP8NNNC-Samsung-datasheet-...
CL10B223KB8NNNC (Samsung Electro-Mechanics) — datasheet
media.digikey.com/pdf/Data%20Sheets/Samsung%20PDFs/CL10B2...
CL21B106KOQNNN (Samsung Electro-Mechanics) — datasheet
media.digikey.com/pdf/Data%20Sheets/Samsung%20PDFs/CL_Ser...
CL31B225KBHNNNE (Samsung Electro-Mechanics) — datasheet
media.digikey.com/pdf/Data%20Sheets/Samsung%20PDFs/CL31B2...
CRCW0603 (Vishay) — datasheet
www.vishay.com/docs/20035/dcrcwe3.pdf
FSUSB42 (onsemi) — datasheet
www.onsemi.com/pub/Collateral/FSUSB42-D.PDF
GMC10X7R105M50NT (Cal-Chip Electronics) — datasheet
calchip.com/wp-content/uploads/2023/09/GMC-Series-2.pdf
GRM188D71A106MA73D (Murata) — datasheet
mm.digikey.com/Volume0/opasdata/d220001/medias/docus/8942...
GRM32EC81C476KE15 (Murata Manufacturing Co., Ltd.) — datasheet
static6.arrow.com/aropdfconversion/226b0f37381afec66b0bab...
IHLP2525CZ8R2M01 (Vishay Dale) — datasheet
www.vishay.com/docs/34104/ihlp-2525cz-01.pdf
IM03 (TE Connectivity (Axicom)) — datasheet, cited pages 1
www.te.com/commerce/DocumentDelivery/DDEController?Action...
KGM15ACG1E330JT (KYOCERA AVX) — datasheet
datasheets.kyocera-avx.com/C0GNP0-KGM.pdf
LAN9512i (SMSC (Standard Microsystems Corporation)) — datasheet
ogane.com/homebrew/rpi/1440/9512.pdf
LMR14050 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/lmr14050.pdf
PDS760Q (Diodes Incorporated) — datasheet
www.diodes.com/assets/Datasheets/PDS760Q.pdf
PTVS5V0S1UR (Nexperia) — datasheet
assets.nexperia.com/documents/data-sheet/PTVSXS1UR_SER.pdf
RClamp0524PA (Semtech Corporation) — datasheet
4donline.ihs.com/images/VipMasterIC/IC/SEMT/SEMT-S-A00050...
CM4S (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/cm4s/cm4s-datasheet.pdf
SML-LXFM0603SIC (Lumex) — datasheet, cited pages 1
www.mouser.lt/datasheet/2/244/LUMXD00049_141-2551042.pdf
SML-M13MT (ROHM Co., Ltd.) — datasheet
fscdn.rohm.com/en/products/databook/datasheet/opto/led/ch...
VPDD202W102K1GV001E (Johanson Dielectrics) — datasheet
www.johansondielectrics.com/docs/4901/johanson_high_volta...

12 Designer Annotated Nets

No additional annotations are present beyond those already reported in previous sections.

13 EMC & ESD Protection Checks

Checks run1
Passed0
Issues found2
EMC Check Summary
CheckIssuesStatus
Connector Shell Grounding5

13.1 Connector Shell Grounding

RefDesTypeIssueRecommendationSeverity
J4RJ45-POE_ARJM11D7-009-AB-EW2J4 (ARJM11D7-009-AB-EW2): the shell pins are properly connected to logic ground through an R||C network.✓
J5microSD_MEM2052-00-195-00-AJ5 (MEM2052-00-195-00-A): Mounting pins S1, S2, S3, S4 share the logic GND net, so the shield-bond strategy is not captured as design intent.Assign a dedicated schematic net per connector (e.g. SHIELD_GND_TYPE_C, SHIELD_GND_SD) so the pour and bond parts are explicit. A copper pour under the connector and stitched directly to logic GND is an acceptable simplification for a board that has no access to an earth ground and will not be ESD-tested. For professional designs, with or without earth ground access, use a 1 MΩ || 4.7 nF (≥2 kV) from the shield net to logic GND. IEC 61000-4-2.
J7USB_C_USB2.0_1.6mm_FlagJ7 (USB4205-GF-A): the shell pins are properly connected to logic ground through an R||C network.✓
J8USB_A_2x_5787745-1J8 (5787745-1): the shell pins are properly connected to logic ground through an R||C network.✓
J9USB_C_USB2.0_1.6mmJ9 (USB4085-GF-A): Shell pins share the logic GND net, so the shield-bond strategy is not captured as design intent.USB Type-C R2.5 §3.2.1 requires the receptacle shell to be connected to the PCB ground plane; a shield net bonded to logic GND through R||C satisfies it and does not leave the shell floating. Assign a dedicated schematic net per connector (e.g. SHIELD_GND_TYPE_C, SHIELD_GND_SD) so the pour and bond parts are explicit. A copper pour under the connector and stitched directly to logic GND is an acceptable simplification for a board that has no access to an earth ground and will not be ESD-tested. For professional designs, with or without earth ground access, use a 1 MΩ || 4.7 nF (≥2 kV) from the shield net to logic GND. IEC 61000-4-2.

13.2 ESD/TVS Protection Audit

Audit of connector-facing signal nets for ESD/TVS protection presence and orientation correctness.

Connector-facing signal nets analyzed: 39 connector-facing signal(s). 28 protected, 7 unprotected, 4 to review, 0 orientation issue(s).

13.2.1 Unprotected Signal Nets

Signal NetConnectorStatus
Net-(J7-CC1)J7No ESD Protection
Net-(J7-CC2)J7No ESD Protection
Net-(J4-LEDY_A)J4No ESD Protection
nSPD_LAN1J4No ESD Protection
nLNKA_LAN1J4No ESD Protection
Net-(C39-Pad1)J4No ESD Protection
Net-(J4-LEDG_A)J4No ESD Protection

13.2.2 Protected Signal Nets

Signal NetConnectorProtection DeviceDevice TypeRail ConnectionOrientationStatus
SD_CMDJ5D34ESD9B5.0ST5GGNDCorrectProtected
SD_CLKJ5D35ESD9B5.0ST5GGNDCorrectProtected
SD_DAT3J5D33ESD9B5.0ST5GGNDCorrectProtected
SD_DAT2J5D32ESD9B5.0ST5GGNDCorrectProtected
SD_DAT1J5D10ESD9B5.0ST5GGNDCorrectProtected
SD_DAT0J5D9ESD9B5.0ST5GGNDCorrectProtected
HDMI0_SCLJ6D15RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_D1_PJ6D12RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_D0_PJ6D13RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_HOTPLUGJ6D15RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_SDAJ6D15RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_CK_NJ6D13RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_D2_NJ6D12RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_CECJ6D15RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_D2_PJ6D12RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_CK_PJ6D13RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_D0_NJ6D13RClamp0524PAGNDNot applicable (array); rail pins correctProtected
HDMI0_D1_NJ6D12RClamp0524PAGNDNot applicable (array); rail pins correctProtected
Net-(D17-A2)J9D17ESD9B5.0ST5GGNDCorrectProtected
Net-(D16-A2)J9D16ESD9B5.0ST5GGNDCorrectProtected
USB_D+J9D19ESD9B5.0ST5GGNDCorrectProtected
USB_D-J9D20ESD9B5.0ST5GGNDCorrectProtected
USB_OTG_1_NJ8D28ESD9B5.0ST5GGNDCorrectProtected
USB_OTG_1_PJ8D26ESD9B5.0ST5GGNDCorrectProtected
USB_BOOT_PJ7D24ESD9B5.0ST5GGNDCorrectProtected
USB_OTG_2_NJ8D29ESD9B5.0ST5GGNDCorrectProtected
USB_BOOT_NJ7D14ESD9B5.0ST5GGNDCorrectProtected
USB_OTG_2_PJ8D27ESD9B5.0ST5GGNDCorrectProtected
LAN1_TXPJ4——Review: no transformer on the board between J4 and U9, so the isolation is expected inside J4 (integrated magnetics); J4's datasheet confirms it on the AI run
LAN1_RXPJ4——Review: no transformer on the board between J4 and U9, so the isolation is expected inside J4 (integrated magnetics); J4's datasheet confirms it on the AI run
LAN1_RXNJ4——Review: no transformer on the board between J4 and U9, so the isolation is expected inside J4 (integrated magnetics); J4's datasheet confirms it on the AI run
LAN1_TXNJ4——Review: no transformer on the board between J4 and U9, so the isolation is expected inside J4 (integrated magnetics); J4's datasheet confirms it on the AI run

13.3 EMC & ESD Analysis

This section is created by AI and should be reviewed for accuracy. There may be some incorrect analysis, especially if any errors are called out in the Design Summary or Component Value sections. STANDARD MODE — this analysis was produced by the standard model tier.

13.3.1 EMC Architecture: Grounding, Shielding and Filtering

AI-Assisted — This review is judged at the professional level, because the board is classified as industrial and has to pass IEC 61000-4-2 and IEC 61000-6-2. The board has two ground domains. GND is logic ground. Earth is chassis and carries only J4_13 CHASSIS, C40 and R26. C40 (1 nF, 2 kV) in parallel with R26 (1 MΩ) is the single Earth-to-GND bond. It is a deliberate high-impedance bond: it passes the discharge edge, bleeds static and breaks the DC and mains-frequency loop.

The cable connectors handle their shields in four different ways. J4 has its own chassis net. J6 has a dedicated shield net, Net-(J6-CKS), bonded to GND through C44 (1 nF, 2 kV) and R30 (1 MΩ). J7 and J8 share one shield net, Net-(J7-SHIELD), bonded through C56 (1 nF, 2 kV) and R54 (1 MΩ). J9 has its shell directly on GND.

All three bond capacitors are 1 nF. A 1 nF part is about 1.6 Ω at 100 MHz, against about 0.3 Ω for 4.7 nF, so the high-frequency shield bond is weaker than the usual R||C value.

Every mounting hole (H1-H4, H5, H6, H8) is on GND. No mounting hole puts Earth onto an enclosure.

Every ESD array on the board returns to logic GND, never to a shield net. This is correct, because each clamp must reference the PHY it protects.

On the nets reviewed, no common-mode choke or ferrite filter sits on any cable interface. Emissions control on the cable interfaces therefore relies on the shield bonds and on the differential signalling.

13.3.2 Ethernet Port J4

AI-Assisted — J4 (ARJM11D7-009-AB-EW2) is a right-angle-style panel magjack and is external. It carries 10/100BASE-T with integrated magnetics, which give the IEEE 802.3 clause 14 galvanic isolation. J4_13 CHASSIS sits on Earth, so the shield-bond intent is captured.

On the PHY side:
- The centre taps J4_4 and J4_5 are on Net-(C39-Pad1), which returns to GND through C39 (22 nF, 50 V) and to VDD33A_LAN1 through R20 (10 Ω).
- The 49.9 Ω terminations R55, R56, R57 and R36 tie the four lines to VDD33A_LAN1.
- No clamp sits on LAN1_TXP, LAN1_TXN, LAN1_RXP or LAN1_RXN.

The LAN9512 datasheet (Datasheet, p.235) states ±8 kV contact and ±15 kV air performance per IEC 61000-4-2, tested by a third party. That covers the gun test. It does not cover cable discharge events or the IEC 61000-4-5 surge that IEC 61000-6-2 applies to ports with cables longer than 30 m.

The jack LEDs share the housing opening with the cable. Their cathodes, on nLNKA_LAN1 and nSPD_LAN1, connect directly to U9_21 and U9_22 with no series element. A discharge to the LED area therefore couples straight onto U9 pins.

13.3.3 HDMI Port J6

AI-Assisted — J6 (685119134923) is a right-angle receptacle and is external.

The outer shell J6_SH is on Net-(J6-CKS), bonded to GND through C44 and R30, which matches the professional shield practice. However, the four TMDS pair-shield contacts are on that same net: J6_2 D2S, J6_5 D1S, J6_8 D0S and J6_11 CKS. The signal-integrity review already reports this. The EMC consequence is that the common-mode return of every TMDS pair passes through C44 rather than a direct ground. Pair-shield common-mode current that cannot return locally radiates from the cable, which is a CISPR 32 / IEC 61000-6-4 radiated-emissions risk at the TMDS clock harmonics.

Clamp coverage is as follows:
- D12 and D13 (RClamp0524PA) protect the eight TMDS lines flow-through.
- D15 protects HDMI0_HOTPLUG, HDMI0_SDA, HDMI0_SCL and HDMI0_CEC.
- All three arrays have their ground pins on GND.

The Semtech datasheet (Datasheet, p.3) rates the arrays at ±12 kV contact and ±17 kV air per IEC 61000-4-2. Their clamping voltage is 15 V maximum at 1 A, 8/20 µs.

On HDMI0_HOTPLUG the protected pin is the Q4 gate, whose source is on GND, so the clamped level appears directly as VGS.

J6_18 +5V is on HDMI_5V, which is the output of U14. No clamp sits on that net.

13.3.4 USB Type-C Ports J9 (Power Input) and J7 (Boot)

AI-Assisted — Both Type-C receptacles are external hot-plug cable ports. A USB-PD source could deliver up to 20 V at J9 under a fault, so it is the board's main power entry.

J9 (USB4085-GF-A) has:
- shell J9_S1 directly on GND;
- GND pins A1, A12, B1 and B12 hard to GND;
- ESD9B5.0ST5G clamps D16 and D17 on CC1 and CC2, D19 and D20 on D+ and D-, and D18 on VBUS, all referenced to GND.

The onsemi ESD9B datasheet (source: Tomachie) gives 12.5 V maximum clamping at 1 A, 8/20 µs. D18 is the last clamp before:
- U19 VIN, reached through R37 (10 Ω), which has a 30 V absolute maximum (Hynetek datasheet, source: Tomachie);
- the +5V loads, reached through F1, Q7 and R45.

J7 (USB4205-GF-A) has:
- its shell on Net-(J7-SHIELD), bonded through C56 and R54;
- GND pins A1, A12, B1 and B12 on GND;
- D14 and D24 on USB_BOOT_N and USB_BOOT_P, and D25 on USB_BOOT_VBUS.

USB_BOOT_VBUS reaches the Q6 gate through R32 and the Q1 gate through jumper J1. The 2N7002W gate is rated 20 V continuous (onsemi datasheet, p.1).

J7 CC1 and CC2 carry only R33 and R34 (5.1 kΩ to GND) and reach no IC.

The shield-net sharing between J7 and J8 is reported in the findings table.

13.3.5 USB-A Stack J8

AI-Assisted — J8 (5787745-1) is a right-angle dual USB-A stack and is external. Its shield pins S1-S4 sit on Net-(J7-SHIELD), the same net as the J7 shell. Copper pours under two separate connectors therefore merge into one bond point, through C56 and R54. The extra inductance this adds depends on the distance between J7 and J8 in layout.

Clamp coverage is complete:
- D26-D29 on USB_OTG_1_P, USB_OTG_1_N, USB_OTG_2_P and USB_OTG_2_N;
- D30 on 5V_OTG_1 and D31 on 5V_OTG_2.

All six clamps reference GND. The data lines terminate at U9 pins 1-4. The LAN9512 datasheet (p.235) states IEC 61000-4-2 performance of ±8 kV contact and ±15 kV air for U9. That meets the IEC 61000-6-2 industrial levels of ±4 kV contact and ±8 kV air even before the parallel clamps act.

13.3.6 microSD Socket J5

AI-Assisted — J5 (MEM2052-00-195-00-A) is a card socket. It is user-accessible, but it carries no cable and no hot-plug from a second device at another potential. A direct low-inductance bond of its shell contacts S1-S4 to GND is therefore acceptable.

All six bus lines carry ESD9B5.0ST5G clamps to GND: D9, D10 and D32-D35. SD_PWR carries D11 (PTVS5V0S1UR), cathode on SD_PWR and anode on GND. The Nexperia datasheet (Datasheet, p.3) rates D11 at 30 kV contact per IEC 61000-4-2.

The comparison of the clamping level against the U2 SDX pins is left to the memory-bus review, which already reports it.

13.3.7 GPIO Header J2 and Boot Jumper J1

AI-Assisted — J2 is a vertical 2x20 header labelled "IO ports" by the designer. It is a board-to-board or HAT-style interface, but in an industrial product it may be cabled out of the enclosure.

Its 26 GPIO contacts connect directly to translator B ports, with no series element or clamp:
- 24 lines reach U3-U5 (TXS0108E-Q1), whose B port is rated ±8 kV contact and ±6 kV air per IEC 61000-4-2 (TI datasheet, p.5).
- J2_38 GPIO20_EXT and J2_40 GPIO21_EXT reach U6 (TXB0108). Its B port carries only a component-level ±15 kV HBM rating (TI datasheet, p.5), which is not a system-level IEC 61000-4-2 figure.

The TXS one-shot edge accelerators drive fast edges straight onto the header. A ribbon cable attached to J2 becomes an unfiltered antenna for those edges.

The J2 power contacts have no clamp on their own nets:
- On +5V (J2_2, J2_4), the only diodes are D21 (an LED) and D4 (the K1 flyback diode). A positive transient reaches D18 only through the Q7 body diode, F1 and R45.
- On +3V3 (J2_1, J2_17), the only diode is the LED D1.

J1 is a vertical 1x3 jumper header and is internal. J1_1 is USB_BOOT_VBUS, clamped by D25. J1_2 drives the Q1 gate, held low by R1 (47 kΩ to GND).

13.3.8 Relay Terminal J3

AI-Assisted — J3 (1862055) is a 45-degree 3.5 mm terminal block for field wiring, so it is external and exposed to IEC 61000-4-4 burst and, with long lines, to IEC 61000-4-5 surge.

RELAY1_NO, RELAY1_COM and RELAY1_NC connect directly to K1_5, K1_6 and K1_7. Each signal has two terminal positions. These are output contacts the board switches toward external equipment, so no input filtering applies.

No snubber or varistor sits across the contacts. Breaking an inductive load produces contact arcing and showering-arc bursts that radiate and are conducted back along the J3 wiring.

The K1 coil side is separate. Its coil transient is suppressed by D4, as the power review reports.

13.4 Observations

AI-Assisted — The connectors divide into three groups by how fully their ESD protection is captured. J5, J7, J8 and J9 have clamps on every signal contact, referenced to GND. J6 has the same coverage. J4 relies on its integrated magnetics and on the stated system-level ESD rating of U9.

The largest EMC risks are:
- the J9 shell sitting directly on logic GND, so the shield-bond intent is not captured on the main power and PD entry;
- the HDMI pair shields returning only through C44;
- the unfiltered and unclamped J2 GPIO header, if it is cabled off-board;
- the J3 relay contacts with no suppression.

The Earth domain has no mounting-hole bond. As a result, a J4 cable-shield discharge enters GND through C40 before it can reach any enclosure. Mounting holes bonded to GND then carry it out of the board.

Where a clamp's 8/20 µs clamping figure exceeds a protected pin's DC absolute maximum, the comparison spans two different transient classes. Those rows ask for the pin's rating at that waveform rather than declaring an overstress. This applies to U16, U19 CC and D± pins, the U2 HDMI pins and the +5V translator loads.

13.5 Findings

AI-Assisted —
#ConnectorFindingSeverity
13.5.1J9Shell contact J9_S1 shares the logic GND net, so the shield-bond strategy is not captured as design intent. Assign a dedicated SHIELD_GND_J9 net so the pour and bond parts are explicit. A copper pour under the connector and stitched directly to logic GND is an acceptable simplification for a board that has no access to an earth ground and will not be ESD-tested. For professional designs, with or without earth ground access, use a 1 MΩ || 4.7 nF (>= 2 kV) from SHIELD_GND_J9 to logic GND. USB Type-C R2.5 section 3.2.1; IEC 61000-4-2.Medium
13.5.2J7, J8The J7 shell (J7_SH) and the J8 shield pins J8_S1-J8_S4 share a single shield net, Net-(J7-SHIELD), with one bond through C56 and R54. Two connectors' pours are merged, so layout tools may join them over a long run that adds inductance. Assign SHIELD_GND_J7 and SHIELD_GND_J8, each with its own 1 MΩ || 4.7 nF (≥2 kV) bond to logic GND at its connector (IEC 61000-4-2).Low
13.5.3J4, J6, J7, J8C40, C44 and C56 are 1 nF, 2 kV parts. The 2 kV rating meets the ≥2 kV shield-bond requirement. However, 1 nF is about 1.6 Ω at 100 MHz, against about 0.3 Ω for 4.7 nF, so the high-frequency shield bond is weaker than the 1 MΩ || 4.7 nF practice. 4.7 nF rated 2 kV or higher lowers the bond impedance (IEC 61000-4-2).Review
13.5.4Mounting holesH1-H4 and H5, H6, H8 are all on GND, and Earth reaches only J4_13, C40 and R26. In a metal enclosure, the board bonds to chassis through GND, so a J4 cable-shield discharge crosses C40 into GND before reaching the enclosure. Decide whether a mounting hole next to J4 should be on Earth to return the shield current to chassis directly (IEC 61000-4-2).Review
13.5.5J4No clamp sits on LAN1_TXP, LAN1_TXN, LAN1_RXP or LAN1_RXN on the PHY side of the magnetics. U9 states ±8 kV contact and ±15 kV air per IEC 61000-4-2 (LAN9512 datasheet p.235), which does not cover cable discharge events or IEC 61000-4-5 surge on cables longer than 30 m (IEC 61000-6-2). Investigate a low-capacitance array between the magnetics and U9_52, U9_53, U9_55 and U9_56, terminated to GND.Review
13.5.6J4The jack LED cathodes J4_10 and J4_12 connect directly to U9_21 (nLNKA_LAN1) and U9_22 (nSPD_LAN1), with no series element or clamp, beside the cable opening. A discharge to the LED window couples straight onto U9 pins. A series resistor on each cathode line would limit the injected current; investigate this (IEC 61000-4-2).Review
13.5.7J6J6_2 D2S, J6_5 D1S, J6_8 D0S and J6_11 CKS share Net-(J6-CKS) with the shell, as the signal-integrity review reports. The EMC consequence is that TMDS common-mode return passes through C44 and radiates from the cable (CISPR 32 / IEC 61000-6-4). Moving the four pair-shield contacts to GND and leaving only J6_SH on Net-(J6-CKS) keeps both the bond and the return path (HDMI specification).Review
13.5.8J6D12, D13 and D15 clamp at 15 V maximum at 1 A, 8/20 µs (Semtech datasheet p.3), and they are the last clamps before U2_111-U2_131 (TMDS), U2_171 HDMI_CEC, U2_173 HDMI_SDA and U2_175 HDMI_SCL. Check that these U2 pins are rated for this waveform. The U2 HDMI pin transient rating was not available at report generation time.Review
13.5.9J6J6_18 +5V (HDMI_5V, the output of U14) has no transient clamp on its net. Its members are J6_18, C43, R5, R58, TP23 and U14 VOUT. A discharge to that contact reaches U14 VOUT and the DDC pull-ups. A 5 V-class clamp to GND at J6_18 would cover the contact; investigate this (IEC 61000-4-2).Review
13.5.10J9D16 and D17 (CC1, CC2) and D19 and D20 (D+, D-) are the last clamps before U19_4, U19_5, U19_2 and U19_3. They clamp at 12.5 V maximum at 1 A, 8/20 µs (onsemi ESD9B datasheet p.2, source: Tomachie). U19 is rated ±6 kV HBM (Hynetek datasheet p.7, source: Tomachie), a component-level test. Check that the U19 CC and D± pins are rated for this waveform.Review
13.5.11J9The D18 clamp level of 12.5 V (1 A, 8/20 µs) is a transient figure. The +5V loads beyond F1, Q7 and R45 include U3-U5 and U6, whose VCCB absolute maximum is 6.5 V, a DC rating (TI TXS0108E and TXB0108 datasheets p.5). These two figures are different transient classes. Check that the residual VBUS transient reaching +5V, after the series path and the +5V bulk capacitance, stays within those parts' ratings.Review
13.5.12J7D14 and D24 are the last clamps before U16_6 HSD1- and U16_7 HSD1+, clamping at 12.5 V maximum at 1 A, 8/20 µs (onsemi ESD9B datasheet p.2, source: Tomachie). U16 is rated 9 kV HBM on D± and 7 kV on all pins (JESD22-A114), with a 5.25 V DC switch I/O absolute maximum (onsemi FSUSB42 datasheet p.3). Check that U16 HSD1± are rated for this waveform.Review
13.5.13J2J2 has no clamp on any GPIO contact. J2_38 GPIO20_EXT and J2_40 GPIO21_EXT reach U6 B1 and B2, rated only ±15 kV HBM (TI TXB0108 datasheet p.5), a component-level rating. The other 24 lines reach U3-U5 B ports rated ±8 kV contact but only ±6 kV air per IEC 61000-4-2 (TI TXS0108E datasheet p.5), below the ±8 kV air level of IEC 61000-6-2. If J2 is cabled out of the enclosure, investigate a low-capacitance array at the header.Review
13.5.14J2The 26 GPIO lines leave the board from the translator B ports with no series resistance or filtering. The TXS0108E one-shot edge accelerators put fast edges onto any cable fitted to J2, which is a CISPR 32 / IEC 61000-6-4 radiated-emissions risk. Check the edge rates at the header with the intended cable. Any filter must remain compatible with the TXS one-shot drive.Review
13.5.15J2J2_2 and J2_4 (+5V) and J2_1 and J2_17 (+3V3) have no transient clamp on their own nets. On +5V the diodes are D21 (an LED) and D4 (the K1 flyback diode). A transient reaches D18 only through the Q7 body diode, F1 and R45. On +3V3 the only diode is the LED D1. If J2 is cabled, investigate clamps at these contacts (IEC 61000-4-2).Review
13.5.16J3The J3 field-wiring contacts (RELAY1_NO, RELAY1_COM, RELAY1_NC to K1_5, K1_6, K1_7) carry no snubber or varistor. Breaking an inductive load produces arcing bursts conducted and radiated along the J3 wiring (IEC 61000-4-4, CISPR 32). The suppression part depends on the switched voltage and load type, which are not stated. Stating them on the RELAYS sheet allows an RC snubber or varistor to be sized.Review
13.5.17Ground architectureEarth and GND are joined only by C40 (1 nF, 2 kV) in parallel with R26 (1 MΩ). This is a deliberate high-impedance chassis bond that passes the discharge edge, bleeds static and breaks the DC and mains-frequency ground loop (IEC 61000-4-2).✓
13.5.18All ESD arraysD9, D10, D14, D16-D20, D24-D35 (ESD9B5.0ST5G), D11 (PTVS5V0S1UR), and D12, D13, D15 (RClamp0524PA) all have their ground pins on logic GND and none on a shield net. Each clamp therefore references the IC it protects (onsemi, Nexperia and Semtech datasheets).✓
13.5.19J4J4_13 CHASSIS sits on Earth, a dedicated chassis net separate from logic GND, and returns through C40 || R26. The shield-bond strategy is captured as design intent (IEC 61000-4-2; IEEE 802.3).✓
13.5.20J4J4_4 and J4_5 centre taps return to GND through C39 (22 nF, 50 V) and to VDD33A_LAN1 through R20 (10 Ω). This gives a local common-mode return on the PHY side of the magnetics.✓
13.5.21J6J6_SH is on a dedicated shield net, Net-(J6-CKS), bonded to GND through C44 (1 nF, 2 kV) and R30 (1 MΩ). The shield-bond strategy is captured as design intent (IEC 61000-4-2).✓
13.5.22J6All eight TMDS lines carry D12 and D13, and HDMI0_HOTPLUG, HDMI0_SDA, HDMI0_SCL and HDMI0_CEC carry D15, all wired flow-through. Each array is rated ±12 kV contact and ±17 kV air per IEC 61000-4-2, above the IEC 61000-6-2 industrial levels of ±4 kV contact and ±8 kV air (Semtech RClamp0524PA datasheet p.3).✓
13.5.23J6On HDMI0_HOTPLUG, the D15 clamp level of 15 V maximum (1 A, 8/20 µs) appears as Q4 VGS, because the Q4 source is on GND. This is below the 20 V continuous and 40 V pulsed VGS rating (onsemi 2N7002W datasheet p.1).✓
13.5.24J9D18 clamps J9 VBUS at 12.5 V maximum at 1 A, 8/20 µs. U19_1 VIN, reached through R37 (10 Ω), has a 30 V absolute maximum, so the clamped level stays inside it (Hynetek datasheet p.7, source: Tomachie; onsemi ESD9B datasheet p.2, source: Tomachie).✓
13.5.25J7J7_A5 CC1 and J7_B5 CC2 carry only R33 and R34 (5.1 kΩ to GND) and reach no IC, so no semiconductor sits behind them that a clamp would protect.✓
13.5.26J7USB_BOOT_VBUS (J7 VBUS, J1_1) carries D25 to GND. Its endpoints are the Q6 gate through R32 and the Q1 gate through J1. The 12.5 V maximum clamp level (1 A, 8/20 µs) is below the 20 V continuous VGS of the 2N7002W (onsemi datasheet p.1).✓
13.5.27J8D26-D29 clamp all four data lines to GND ahead of U9_1 to U9_4. U9 itself states ±8 kV contact and ±15 kV air per IEC 61000-4-2 (LAN9512 datasheet p.235), which meets the IEC 61000-6-2 industrial levels.✓
13.5.28J8J8_1 (5V_OTG_1) and J8_5 (5V_OTG_2) VBUS contacts carry D30 and D31 to GND (onsemi ESD9B datasheet, source: Tomachie).✓
13.5.29J5The J5 shell contacts S1-S4 are on GND. A card socket has no cable hot-plug from another device, so a direct low-inductance shield bond to logic GND is acceptable (IEC 61000-4-2).✓
13.5.30J5All six bus lines carry clamps to GND (D9, D10, D32-D35), and SD_PWR carries D11, rated 30 kV contact per IEC 61000-4-2 (Nexperia datasheet p.3). The clamp-against-SDX-pin comparison is in the memory-bus review.✓
13.5.31J1J1 is a vertical 3-pin jumper header and is internal. J1_1 is USB_BOOT_VBUS, clamped by D25. J1_2 drives the Q1 gate, held low by R1 (47 kΩ to GND), so no external exposure needs added protection.✓

13.6 Citations

AI-Assisted —
References
1N4007FL (AGERTECH MICROELECTRONICS) — datasheet, cited pages 1
datasheet.lcsc.com/datasheet/pdf/e95e9f9588b304a160769fb2...
2N7002W (onsemi) — datasheet
www.onsemi.com/pdf/datasheet/2n7002w-d.pdf
FSUSB42 (onsemi) — datasheet
www.onsemi.com/pub/Collateral/FSUSB42-D.PDF
IM03 (TE Connectivity (Axicom)) — datasheet, cited pages 1
www.te.com/commerce/DocumentDelivery/DDEController?Action...
LAN9512i (SMSC (Standard Microsystems Corporation)) — datasheet
ogane.com/homebrew/rpi/1440/9512.pdf
PTVS5V0S1UR (Nexperia) — datasheet
assets.nexperia.com/documents/data-sheet/PTVSXS1UR_SER.pdf
RClamp0524PA (Semtech Corporation) — datasheet
4donline.ihs.com/images/VipMasterIC/IC/SEMT/SEMT-S-A00050...
CM4S (Raspberry Pi Ltd) — datasheet
datasheets.raspberrypi.com/cm4s/cm4s-datasheet.pdf
SML-M13MT (ROHM Co., Ltd.) — datasheet
fscdn.rohm.com/en/products/databook/datasheet/opto/led/ch...
TXB0108 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/txb0108.pdf
TXS0108E-Q1 (Texas Instruments) — datasheet
www.ti.com/lit/ds/symlink/txs0108e.pdf

14 Design-for-Test

Design for Testability (DFT) analysis for ICT/bed-of-nails test coverage.

14.1 DFx Options Selected

OptionSettingDescription
Test Point Insertion
Insert on power railsYesPlace test points on power rail nets in schematic
Insert on LSSI busesYesPlace test points on every LSSI bus signal (JTAG, SWD, I2C, I3C, MDIO, SPI, QSPI, UART) that has none
Insert on all netsNoExtend TP insertion to signal nets beyond power rails
Insert on feedback pinsYesPlace a test point on each regulator feedback / set net that has none, so its divider can be checked
Insert on power-good netsNoPlace a test point on each used power-good net that has none and no boundary scan
Insert on NVM programming netsNoPlace test points on the nets used to program on-board memory (QSPI, etc.)
Exclude HSSI netsYesExclude HSSI/differential pair nets from TP insertion
Exclude DRAM netsYesExclude SDRAM/DDR nets from TP insertion
Exclude BSCAN opens (full)YesExclude nets with 100% boundary scan opens coverage
Exclude BSCAN opens (partial)NoExclude nets with partial boundary scan opens coverage
Exclude BSCAN shortsNoExclude nets with boundary scan shorts coverage
GND test points6Number of GND test points to insert for BON fixture ground connections
Target PCOLA-SOQ0%Insert TPs in priority order until this PCOLA-SOQ % is reached
Target solder-joint testability0%Insert TPs in priority order until this shorts/opens solder-joint testability % is reached
Kelvin min resistance0.000 ohmLower bound (ohms) for Kelvin 4-wire TP insertion range
Kelvin max resistance1.000 ohmUpper bound (ohms) for Kelvin 4-wire TP insertion range
Tester Styles
OpticalAOIAutomated Optical Inspection of visible solder joints
AXIYesAutomated X-ray Inspection of hidden solder joints (BGA, QFN)
ATEFlying_probeDigital IO, DMM, shorts/opens via flying probe
Test Access
JTAG/LSSI ConnectorYesConnector access to JTAG, SPI, I2C buses
IO ConnectorsNoIO connectors available for external stimulus/observation
TP AccessFlying_probeFlying probe access without fixture
Test Point Identification
BON TP refdesTP#,TP-*,TP_*,TP#*Refdes patterns identifying BON test points
BON TP footprints*All footprints accepted
FP TP refdesTP#,TP-*,TP_*,TP#*,MP#Refdes patterns identifying flying probe test points
FP TP footprints*All footprints accepted
LoopbackNoneNo loopback cables
Test Types
Powered-Off Shorts/OpensYesUnpowered shorts and opens detection via probe access
PassivesYesR, C, L value measurement via probe or fixture access
Active AnalogNoVoltage regulator, reference, and op-amp output verification
Non-BSCAN DigitalNoDigital ICs without boundary scan: pin observability analysis
Boundary Scan1149.1_1149.6IEEE 1149.1-2001 + 1149.6-2003 AC boundary scan
LSSINoJTAG chain, SPI, I2C, UART bus test coverage analysis
JTAG FunctionalNoFunctional verification beyond structural scan
Require Rail TPs for Diode TestNoRequire TPs on all IO power rails for ESD diode opens test (default: basic test with GND TP only)
Capacitance Probe Plate Target Devices—Refdes or footprint patterns for capacitance probe plate targets (ICs and vertical connectors)
Use Boundary Scan for Capacitance Probe Plate StimulusNoCount boundary scan drive cells on other devices as valid stimulus for the capacitance probe plate (applicable to VTEP / IEEE 1149.8.1-capable hardware)
NVM Programming
Default MethodDirectProgram via direct pin access; TPs on flash data/control lines
Environment
Test environmentlabPrototype/NPI: manual probing, bench JTAG, longer test times acceptable

14.2 Power Rail Test Point Check

Power rails found20
Rails with TPs16
Rails without TPs4
Parts adjudicated as TH: J8 (5787745-1). Their description and footprint do not say how they mount, so the mounting was looked up. If any is wrong, state SMT or TH/THT/THRU in the part's description.
4 power rail(s) need test points in the submitted design.
16 test point(s) inserted in modified output. Download modified schematics to see placements.
Power Rail Coverage
Net NameAnnotationTest PointStatus
+3V3TP30✓
+5VTP27✓
+BATTTP30 on +3V3, across R59✓
3V3_LAN1- NEEDS TP
5V_OTG_1J8_1 (through-hole)✓
5V_OTG_2J8_5 (through-hole)✓
EarthJ4_13 (through-hole)✓
GNDTP1✓
HDMI_5VTP23✓
Net-(C1-Pad1)TP30 on +3V3, across R6✓
Net-(C2-Pad1)TP30 on +3V3, across R8✓
Net-(C3-Pad1)TP30 on +3V3, across R10✓
Net-(C52-Pad1)TP29✓
Net-(D18-A2)- NEEDS TP
Net-(U13-VIN)TP20✓
Net-(U14-EN)TP22✓
SD_PWRTP21✓
USB_BOOT_VBUSJ1_1 (through-hole)✓
VDD18CORE_LAN1- NEEDS TP
VDD33A_LAN1- NEEDS TP
Inserted Test Points (Modified Output)
Test PointNetSheet
TP333V3_LAN1ETHERNET_LAN1.kicad_sch
TP34EarthETHERNET_LAN1.kicad_sch
TP35VDD18CORE_LAN1ETHERNET_LAN1.kicad_sch
TP36VDD33A_LAN1ETHERNET_LAN1.kicad_sch
TP40Net-(D18-A2)POWER.kicad_sch
TP42GNDETHERNET_LAN1.kicad_sch
TP43GNDPOWER.kicad_sch
TP44GNDIO.kicad_sch
TP45GNDUSB.kicad_sch
TP46GNDUSD_CARD.kicad_sch
Signal Net Test Points (Modified Output)
Test PointNetSheet
TP31RUNCM4.kicad_sch
TP32Net-(D1-K)CM4.kicad_sch
TP37nFDX_LAN1ETHERNET_LAN1.kicad_sch
TP38HDMI0_SDAHDMI.kicad_sch
TP39HDMI0_SCLHDMI.kicad_sch
TP41Net-(U19-VSET)POWER.kicad_sch

14.3 IC Enable Test Point Check

ICs with enable pins (power switches, regulators, etc.) require test points for fixture-based test to disable the device during test.

ICTypePin NamePin #Issue
U13RT9742QGJ5EN4tied to VCC - recommend pull-up resistor and test point
U20LMR14050EN3tied to VCC - recommend pull-up resistor and test point
U16FSUSB42MUXOE10tied to GND - recommend pull-down resistor and test point
U14RT9742QGJ5EN4tied to VCC - recommend pull-up resistor and test point

14.4 Kelvin Test Points Check

Threshold0.000 < R ≤ 1.000 Ω
Current sense resistors found0

No current sense resistors found in range (0 < R < 1.000 ohm).

14.5 Current Test Points

Total test points29
Test Points by Footprint
FootprintDescriptionCount
TestPoint_D1.27SD_PWR29

14.5.1 By Sheet

Test PointNet NameFootprint
CM4 (16 test points)
TP3Net-(U2-GPIO30)TestPoint_D1.27
TP4Net-(U2-GPIO31)TestPoint_D1.27
TP5Net-(U2-GPIO32)TestPoint_D1.27
TP6Net-(U2-GPIO33)TestPoint_D1.27
TP7Net-(U2-GPIO34)TestPoint_D1.27
TP8Net-(U2-GPIO35)TestPoint_D1.27
TP9Net-(U2-GPIO36)TestPoint_D1.27
TP10Net-(U2-GPIO37)TestPoint_D1.27
TP11Net-(U2-GPIO38)TestPoint_D1.27
TP12Net-(U2-GPIO39)TestPoint_D1.27
TP13Net-(U2-GPIO40)TestPoint_D1.27
TP14Net-(U2-GPIO41)TestPoint_D1.27
TP15Net-(U2-GPIO42)TestPoint_D1.27
TP16Net-(U2-GPIO43)TestPoint_D1.27
TP17Net-(U2-GPIO44)TestPoint_D1.27
TP18Net-(U2-GPIO45)TestPoint_D1.27
HDMI (2 test points)
TP22Net-(U14-EN)TestPoint_D1.27
TP23HDMI_5VTestPoint_D1.27
POWER (8 test points)
TP1GNDTestPoint_D1.27
TP24CM4_SCL0TestPoint_D1.27
TP25CM4_SDA0TestPoint_D1.27
TP26Net-(Q7-D)TestPoint_D1.27
TP27+5VTestPoint_D1.27
TP283V3FBTestPoint_D1.27
TP29Net-(C52-Pad1)TestPoint_D1.27
TP30+3V3TestPoint_D1.27
RELAYS (1 test points)
TP19RELAY1TestPoint_D1.27
USD_CARD (2 test points)
TP20Net-(U13-VIN)TestPoint_D1.27
TP21SD_PWRTestPoint_D1.27

14.5.2 All Test Points

Test PointNet NameSheetFootprint
TP1GNDPOWERTestPoint_D1.27
TP3Net-(U2-GPIO30)CM4TestPoint_D1.27
TP4Net-(U2-GPIO31)CM4TestPoint_D1.27
TP5Net-(U2-GPIO32)CM4TestPoint_D1.27
TP6Net-(U2-GPIO33)CM4TestPoint_D1.27
TP7Net-(U2-GPIO34)CM4TestPoint_D1.27
TP8Net-(U2-GPIO35)CM4TestPoint_D1.27
TP9Net-(U2-GPIO36)CM4TestPoint_D1.27
TP10Net-(U2-GPIO37)CM4TestPoint_D1.27
TP11Net-(U2-GPIO38)CM4TestPoint_D1.27
TP12Net-(U2-GPIO39)CM4TestPoint_D1.27
TP13Net-(U2-GPIO40)CM4TestPoint_D1.27
TP14Net-(U2-GPIO41)CM4TestPoint_D1.27
TP15Net-(U2-GPIO42)CM4TestPoint_D1.27
TP16Net-(U2-GPIO43)CM4TestPoint_D1.27
TP17Net-(U2-GPIO44)CM4TestPoint_D1.27
TP18Net-(U2-GPIO45)CM4TestPoint_D1.27
TP19RELAY1RELAYSTestPoint_D1.27
TP20Net-(U13-VIN)USD_CARDTestPoint_D1.27
TP21SD_PWRUSD_CARDTestPoint_D1.27
TP22Net-(U14-EN)HDMITestPoint_D1.27
TP23HDMI_5VHDMITestPoint_D1.27
TP24CM4_SCL0POWERTestPoint_D1.27
TP25CM4_SDA0POWERTestPoint_D1.27
TP26Net-(Q7-D)POWERTestPoint_D1.27
TP27+5VPOWERTestPoint_D1.27
TP283V3FBPOWERTestPoint_D1.27
TP29Net-(C52-Pad1)POWERTestPoint_D1.27
TP30+3V3POWERTestPoint_D1.27

14.6 Powered-off Testing

76 nets with test points: 105 pins with opens coverage, 0 pins with partial opens, 453 pins with shorts coverage.

Powered-off Test Coverage by Net
Pin ⇅Net ⇅Type ⇅Opens ⇅Shorts ⇅
C4_1+3V3Capacitor-●
C5_1+3V3Capacitor-●
C6_1+3V3Capacitor-●
C10_1+3V3Capacitor-●
C11_1+3V3Capacitor-●
C20_1+3V3Capacitor-●
C45_1+3V3Capacitor-●
D1_2+3V3Passive-●
J2_1+3V3Connector-●
J2_17+3V3Connector-●
Q3_2+3V3Transistor-●
R4_1+3V3Passive-●
R6_1+3V3Passive-●
R8_1+3V3Passive-●
R10_2+3V3Passive-●
R27_2+3V3Passive●●
R31_1+3V3Passive-●
R43_1+3V3Passive●●
R44_1+3V3Passive●●
R50_2+3V3Passive●●
R59_2+3V3Passive-●
U3_2+3V3IC-●
U4_2+3V3IC-●
U5_2+3V3IC-●
U6_2+3V3IC-●
U7_5+3V3IC-●
U8_5+3V3IC-●
U16_1+3V3IC-●
C7_1+5VCapacitor-●
C8_1+5VCapacitor-●
C9_1+5VCapacitor-●
C12_1+5VCapacitor-●
C37_1+5VCapacitor-●
C38_1+5VCapacitor-●
C49_1+5VCapacitor-●
C50_1+5VCapacitor-●
D4_1+5VPassive-●
D21_2+5VPassive-●
J2_2+5VConnector-●
J2_4+5VConnector-●
K1_1+5VPassive-●
R29_1+5VPassive●●
R45_2+5VPassive●●
U3_19+5VIC-●
U4_19+5VIC-●
U5_19+5VIC-●
U6_19+5VIC-●
U11_5+5VIC-●
U12_5+5VIC-●
U20_2+5VIC-●
U20_3+5VIC-●
R47_23V3FBPassive●●
R48_13V3FBPassive●●
U20_53V3FBIC●●
D7_25V_OTG_1Passive-●
D30_25V_OTG_1Passive●●
J8_15V_OTG_1Connector-●
U11_15V_OTG_1IC-●
D8_25V_OTG_2Passive-●
D31_25V_OTG_2Passive●●
J8_55V_OTG_2Connector-●
U12_15V_OTG_2IC-●
R43_2CM4_SCL0Passive●●
R53_1CM4_SCL0Passive-●
U19_7CM4_SCL0IC●●
R44_2CM4_SDA0Passive●●
R52_1CM4_SDA0Passive-●
U19_6CM4_SDA0IC●●
C40_1EarthCapacitor-●
J4_13EarthConnector-●
R26_1EarthPassive●●
C1_2GNDCapacitor-●
C2_2GNDCapacitor-●
C3_2GNDCapacitor-●
C4_2GNDCapacitor-●
C5_2GNDCapacitor-●
C6_2GNDCapacitor-●
C7_2GNDCapacitor-●
C8_2GNDCapacitor-●
C9_2GNDCapacitor-●
C10_2GNDCapacitor-●
C11_2GNDCapacitor-●
C12_2GNDCapacitor-●
C13_2GNDCapacitor-●
C15_2GNDCapacitor-●
C16_2GNDCapacitor-●
C17_2GNDCapacitor-●
C18_2GNDCapacitor-●
C19_2GNDCapacitor-●
C20_2GNDCapacitor-●
C21_2GNDCapacitor-●
C22_2GNDCapacitor-●
C23_2GNDCapacitor-●
C24_2GNDCapacitor-●
C25_2GNDCapacitor-●
C26_2GNDCapacitor-●
C27_2GNDCapacitor-●
C28_2GNDCapacitor-●
C29_2GNDCapacitor-●
C30_2GNDCapacitor-●
C31_2GNDCapacitor-●
C32_2GNDCapacitor-●
C33_2GNDCapacitor-●
C34_2GNDCapacitor-●
C35_2GNDCapacitor-●
C36_2GNDCapacitor-●
C37_2GNDCapacitor-●
C38_2GNDCapacitor-●
C39_2GNDCapacitor-●
C40_2GNDCapacitor-●
C41_2GNDCapacitor-●
C42_2GNDCapacitor-●
C43_2GNDCapacitor-●
C44_2GNDCapacitor-●
C45_2GNDCapacitor-●
C46_2GNDCapacitor-●
C47_2GNDCapacitor-●
C48_2GNDCapacitor-●
C49_2GNDCapacitor-●
C50_2GNDCapacitor-●
C52_2GNDCapacitor-●
C53_2GNDCapacitor-●
C54_2GNDCapacitor-●
C55_2GNDCapacitor-●
C56_2GNDCapacitor-●
D2_1GNDPassive-●
D9_1GNDPassive-●
D10_1GNDPassive-●
D11_2GNDPassive●●
D12_3GNDPassive-●
D12_8GNDPassive-●
D13_3GNDPassive-●
D13_8GNDPassive-●
D14_1GNDPassive-●
D15_3GNDPassive-●
D15_8GNDPassive-●
D16_1GNDPassive-●
D17_1GNDPassive-●
D18_1GNDPassive-●
D19_1GNDPassive-●
D20_1GNDPassive-●
D22_2GNDPassive-●
D22_3GNDPassive-●
D23_1GNDPassive-●
D24_1GNDPassive-●
D25_1GNDPassive●●
D26_1GNDPassive●●
D27_1GNDPassive●●
D28_1GNDPassive●●
D29_1GNDPassive●●
D30_1GNDPassive●●
D31_1GNDPassive●●
D32_1GNDPassive-●
D33_1GNDPassive-●
D34_1GNDPassive-●
D35_1GNDPassive-●
H1_1GNDPassive●●
H2_1GNDPassive●●
H3_1GNDPassive●●
H4_1GNDPassive●●
H5_1GNDPassive●●
H6_1GNDPassive●●
H8_1GNDPassive●●
J1_3GNDConnector-●
J2_6GNDConnector-●
J2_9GNDConnector-●
J2_14GNDConnector-●
J2_20GNDConnector-●
J2_25GNDConnector-●
J2_30GNDConnector-●
J2_34GNDConnector-●
J2_39GNDConnector-●
J4_8GNDConnector-●
J5_S1GNDConnector-●
J5_S2GNDConnector-●
J5_S3GNDConnector-●
J5_S4GNDConnector-●
J5_6GNDConnector-●
J6_17GNDConnector-●
J7_A1GNDConnector-●
J7_A12GNDConnector-●
J7_B1GNDConnector-●
J7_B12GNDConnector-●
J8_4GNDConnector-●
J8_8GNDConnector-●
J9_A1GNDConnector-●
J9_A12GNDConnector-●
J9_B1GNDConnector-●
J9_B12GNDConnector-●
J9_S1GNDConnector-●
Q2_2GNDTransistor-●
Q4_2GNDTransistor-●
Q5_2GNDTransistor-●
Q6_2GNDTransistor-●
R1_2GNDPassive●●
R7_2GNDPassive-●
R11_2GNDPassive●●
R14_2GNDPassive-●
R15_2GNDPassive-●
R17_1GNDPassive-●
R19_1GNDPassive-●
R24_2GNDPassive-●
R25_2GNDPassive-●
R26_2GNDPassive●●
R30_2GNDPassive-●
R33_2GNDPassive-●
R34_2GNDPassive-●
R35_2GNDPassive●●
R41_2GNDPassive-●
R42_2GNDPassive-●
R46_2GNDPassive-●
R48_2GNDPassive●●
R51_2GNDPassive-●
R54_2GNDPassive●●
S1_1GNDPassive-●
S1_2GNDPassive-●
U2_1GNDIC-●
U2_7GNDIC-●
U2_8GNDIC-●
U2_13GNDIC-●
U2_14GNDIC-●
U2_19GNDIC-●
U2_20GNDIC-●
U2_25GNDIC-●
U2_26GNDIC-●
U2_31GNDIC-●
U2_32GNDIC-●
U2_37GNDIC-●
U2_43GNDIC-●
U2_44GNDIC-●
U2_49GNDIC-●
U2_50GNDIC-●
U2_55GNDIC-●
U2_56GNDIC-●
U2_61GNDIC-●
U2_62GNDIC-●
U2_67GNDIC-●
U2_68GNDIC-●
U2_73GNDIC-●
U2_74GNDIC-●
U2_79GNDIC-●
U2_80GNDIC-●
U2_85GNDIC-●
U2_86GNDIC-●
U2_91GNDIC-●
U2_92GNDIC-●
U2_97GNDIC-●
U2_98GNDIC-●
U2_103GNDIC-●
U2_104GNDIC-●
U2_109GNDIC-●
U2_110GNDIC-●
U2_115GNDIC-●
U2_116GNDIC-●
U2_121GNDIC-●
U2_122GNDIC-●
U2_127GNDIC-●
U2_128GNDIC-●
U2_133GNDIC-●
U2_134GNDIC-●
U2_139GNDIC-●
U2_140GNDIC-●
U2_145GNDIC-●
U2_146GNDIC-●
U2_151GNDIC-●
U2_152GNDIC-●
U2_157GNDIC-●
U2_158GNDIC-●
U2_163GNDIC-●
U2_164GNDIC-●
U2_169GNDIC-●
U2_170GNDIC-●
U2_181GNDIC-●
U2_182GNDIC-●
U2_187GNDIC-●
U2_188GNDIC-●
U2_195GNDIC-●
U2_196GNDIC-●
U3_11GNDIC-●
U4_11GNDIC-●
U5_11GNDIC-●
U6_11GNDIC-●
U7_3GNDIC-●
U8_2GNDIC-●
U9_34GNDIC-●
U9_44GNDIC-●
U9_65GNDIC-●
U10_2GNDIC-●
U11_2GNDIC-●
U12_2GNDIC-●
U13_2GNDIC-●
U14_2GNDIC-●
U16_5GNDIC-●
U16_10GNDIC-●
U19_11GNDIC-●
U20_7GNDIC-●
U20_9GNDIC-●
Y1_2GNDPassive-●
Y1_4GNDPassive-●
J2_19GPIO10_EXTConnector-●
U4_16GPIO10_EXTIC●●
J2_23GPIO11_EXTConnector-●
U4_13GPIO11_EXTIC●●
J2_32GPIO12_EXTConnector-●
U5_16GPIO12_EXTIC●●
J2_33GPIO13_EXTConnector-●
U5_15GPIO13_EXTIC●●
J2_8GPIO14_EXTConnector-●
U3_16GPIO14_EXTIC●●
J2_10GPIO15_EXTConnector-●
U3_15GPIO15_EXTIC●●
J2_36GPIO16_EXTConnector-●
U5_13GPIO16_EXTIC●●
J2_11GPIO17_EXTConnector-●
U3_14GPIO17_EXTIC●●
J2_12GPIO18_EXTConnector-●
U3_13GPIO18_EXTIC●●
J2_35GPIO19_EXTConnector-●
U5_14GPIO19_EXTIC●●
J2_38GPIO20_EXTConnector-●
U6_20GPIO20_EXTIC●●
J2_40GPIO21_EXTConnector-●
U6_18GPIO21_EXTIC●●
J2_15GPIO22_EXTConnector-●
U4_20GPIO22_EXTIC●●
J2_16GPIO23_EXTConnector-●
U4_18GPIO23_EXTIC●●
J2_18GPIO24_EXTConnector-●
U4_17GPIO24_EXTIC●●
J2_22GPIO25_EXTConnector-●
U4_14GPIO25_EXTIC●●
J2_37GPIO26_EXTConnector-●
U5_12GPIO26_EXTIC●●
J2_13GPIO27_EXTConnector-●
U3_12GPIO27_EXTIC●●
J2_3GPIO2_EXTConnector-●
U3_20GPIO2_EXTIC●●
J2_5GPIO3_EXTConnector-●
U3_18GPIO3_EXTIC●●
J2_7GPIO4_EXTConnector-●
U3_17GPIO4_EXTIC●●
J2_29GPIO5_EXTConnector-●
U5_18GPIO5_EXTIC●●
J2_31GPIO6_EXTConnector-●
U5_17GPIO6_EXTIC●●
J2_26GPIO7_EXTConnector-●
U5_20GPIO7_EXTIC●●
J2_24GPIO8_EXTConnector-●
U4_12GPIO8_EXTIC●●
J2_21GPIO9_EXTConnector-●
U4_15GPIO9_EXTIC●●
C43_1HDMI_5VCapacitor-●
J6_18HDMI_5VConnector-●
R5_1HDMI_5VPassive-●
R58_1HDMI_5VPassive-●
U14_1HDMI_5VIC-●
J2_28ID_SCConnector-●
J2_27ID_SDConnector-●
J4_6LAN1_RXNConnector-●
R36_2LAN1_RXNPassive-●
U9_53LAN1_RXNIC●●
J4_3LAN1_RXPConnector-●
R57_2LAN1_RXPPassive-●
U9_52LAN1_RXPIC●●
J4_2LAN1_TXNConnector-●
R56_2LAN1_TXNPassive-●
U9_56LAN1_TXNIC●●
J4_1LAN1_TXPConnector-●
R55_2LAN1_TXPPassive-●
U9_55LAN1_TXPIC●●
C39_1Net-(C39-Pad1)Capacitor-●
J4_4Net-(C39-Pad1)Connector-●
J4_5Net-(C39-Pad1)Connector-●
R20_2Net-(C39-Pad1)Passive-●
C52_1Net-(C52-Pad1)Capacitor-●
C53_1Net-(C52-Pad1)Capacitor-●
C54_1Net-(C52-Pad1)Capacitor-●
C55_1Net-(C52-Pad1)Capacitor-●
L1_2Net-(C52-Pad1)Passive-●
R47_1Net-(C52-Pad1)Passive●●
R49_1Net-(C52-Pad1)Passive-●
R50_1Net-(C52-Pad1)Passive●●
J1_2Net-(J1-Pin_2)Connector-●
Q1_1Net-(J1-Pin_2)Transistor-●
R1_1Net-(J1-Pin_2)Passive●●
J4_9Net-(J4-LEDG_A)Connector-●
R21_2Net-(J4-LEDG_A)Passive-●
J4_11Net-(J4-LEDY_A)Connector-●
R22_2Net-(J4-LEDY_A)Passive-●
C56_1Net-(J7-SHIELD)Capacitor-●
J7_SHNet-(J7-SHIELD)Connector-●
J8_S1Net-(J7-SHIELD)Connector-●
J8_S2Net-(J7-SHIELD)Connector-●
J8_S3Net-(J7-SHIELD)Connector-●
J8_S4Net-(J7-SHIELD)Connector-●
R54_1Net-(J7-SHIELD)Passive●●
Q7_5Net-(Q7-D)Transistor-●
R45_1Net-(Q7-D)Passive●●
C46_1Net-(U13-VIN)Capacitor-●
R27_1Net-(U13-VIN)Passive●●
R28_1Net-(U13-VIN)Passive-●
U13_5Net-(U13-VIN)IC-●
C42_1Net-(U14-EN)Capacitor-●
R29_2Net-(U14-EN)Passive●●
U14_4Net-(U14-EN)IC-●
U14_5Net-(U14-EN)IC-●
U2_34Net-(U2-GPIO30)IC●●
U2_36Net-(U2-GPIO31)IC●●
U2_46Net-(U2-GPIO32)IC●●
U2_48Net-(U2-GPIO33)IC●●
U2_52Net-(U2-GPIO34)IC●●
U2_54Net-(U2-GPIO35)IC●●
U2_58Net-(U2-GPIO36)IC●●
U2_60Net-(U2-GPIO37)IC●●
U2_64Net-(U2-GPIO38)IC●●
U2_66Net-(U2-GPIO39)IC●●
U2_70Net-(U2-GPIO40)IC●●
U2_72Net-(U2-GPIO41)IC●●
U2_76Net-(U2-GPIO42)IC●●
U2_78Net-(U2-GPIO43)IC●●
U2_82Net-(U2-GPIO44)IC●●
U2_84Net-(U2-GPIO45)IC●●
Q5_1RELAY1Transistor-●
R11_1RELAY1Passive●●
U2_28RELAY1IC●●
C41_1SD_PWRCapacitor-●
D11_1SD_PWRPassive●●
J5_4SD_PWRConnector-●
U13_1SD_PWRIC-●
D25_2USB_BOOT_VBUSPassive●●
J1_1USB_BOOT_VBUSConnector-●
J7_A4USB_BOOT_VBUSConnector-●
J7_A9USB_BOOT_VBUSConnector-●
J7_B4USB_BOOT_VBUSConnector-●
J7_B9USB_BOOT_VBUSConnector-●
R32_2USB_BOOT_VBUSPassive-●
R35_1USB_BOOT_VBUSPassive●●
D28_2USB_OTG_1_NPassive●●
J8_2USB_OTG_1_NConnector-●
U9_1USB_OTG_1_NIC●●
D26_2USB_OTG_1_PPassive●●
J8_3USB_OTG_1_PConnector-●
U9_2USB_OTG_1_PIC●●
D29_2USB_OTG_2_NPassive●●
J8_6USB_OTG_2_NConnector-●
U9_3USB_OTG_2_NIC●●
D27_2USB_OTG_2_PPassive●●
J8_7USB_OTG_2_PConnector-●
U9_4USB_OTG_2_PIC●●
J4_10nLNKA_LAN1Connector-●
U9_21nLNKA_LAN1IC●●
J4_12nSPD_LAN1Connector-●
U9_22nSPD_LAN1IC●●

14.7 Powered-on Testing

Power rail voltage verification via test points. Measuring the output voltage under load verifies the path from regulator output through series passives to the rail.

8 power rail nets with test points: 10 source-path pins (opens + shorts), 308 sink pins (shorts only).

Powered-on Test Coverage by Power Rail
Pin ⇅Net ⇅Role ⇅Opens ⇅Shorts ⇅
C4_1+3V3Sink-●
C5_1+3V3Sink-●
C6_1+3V3Sink-●
C10_1+3V3Sink-●
C11_1+3V3Sink-●
C20_1+3V3Sink-●
C45_1+3V3Sink-●
D1_2+3V3Sink-●
J2_1+3V3Sink-●
J2_17+3V3Sink-●
Q3_2+3V3Sink-●
R4_1+3V3Sink-●
R6_1+3V3Sink-●
R8_1+3V3Sink-●
R10_2+3V3Sink-●
R27_2+3V3Sink-●
R31_1+3V3Sink-●
R43_1+3V3Sink-●
R44_1+3V3Sink-●
R50_2+3V3Sink-●
R59_2+3V3Sink-●
TP30_1+3V3Sink-●
U3_2+3V3Sink-●
U4_2+3V3Sink-●
U5_2+3V3Sink-●
U6_2+3V3Sink-●
U7_5+3V3Sink-●
U8_5+3V3Sink-●
U16_1+3V3Sink-●
C7_1+5VSink-●
C8_1+5VSink-●
C9_1+5VSink-●
C12_1+5VSink-●
C37_1+5VSink-●
C38_1+5VSink-●
C49_1+5VSink-●
C50_1+5VSink-●
D4_1+5VSink-●
D21_2+5VSink-●
J2_2+5VSink-●
J2_4+5VSink-●
K1_1+5VSink-●
R29_1+5VSink-●
R45_2+5VSink-●
TP27_1+5VSink-●
U3_19+5VSink-●
U4_19+5VSink-●
U5_19+5VSink-●
U6_19+5VSink-●
U11_5+5VSink-●
U12_5+5VSink-●
U20_2+5VSink-●
U20_3+5VSink-●
C1_2GNDSink-●
C2_2GNDSink-●
C3_2GNDSink-●
C4_2GNDSink-●
C5_2GNDSink-●
C6_2GNDSink-●
C7_2GNDSink-●
C8_2GNDSink-●
C9_2GNDSink-●
C10_2GNDSink-●
C11_2GNDSink-●
C12_2GNDSink-●
C13_2GNDSink-●
C15_2GNDSink-●
C16_2GNDSink-●
C17_2GNDSink-●
C18_2GNDSink-●
C19_2GNDSink-●
C20_2GNDSink-●
C21_2GNDSink-●
C22_2GNDSink-●
C23_2GNDSink-●
C24_2GNDSink-●
C25_2GNDSink-●
C26_2GNDSink-●
C27_2GNDSink-●
C28_2GNDSink-●
C29_2GNDSink-●
C30_2GNDSink-●
C31_2GNDSink-●
C32_2GNDSink-●
C33_2GNDSink-●
C34_2GNDSink-●
C35_2GNDSink-●
C36_2GNDSink-●
C37_2GNDSink-●
C38_2GNDSink-●
C39_2GNDSink-●
C40_2GNDSink-●
C41_2GNDSink-●
C42_2GNDSink-●
C43_2GNDSink-●
C44_2GNDSink-●
C45_2GNDSink-●
C46_2GNDSink-●
C47_2GNDSink-●
C48_2GNDSink-●
C49_2GNDSink-●
C50_2GNDSink-●
C52_2GNDSink-●
C53_2GNDSink-●
C54_2GNDSink-●
C55_2GNDSink-●
C56_2GNDSink-●
D2_1GNDSink-●
D9_1GNDSink-●
D10_1GNDSink-●
D11_2GNDSink-●
D12_3GNDSink-●
D12_8GNDSink-●
D13_3GNDSink-●
D13_8GNDSink-●
D14_1GNDSink-●
D15_3GNDSink-●
D15_8GNDSink-●
D16_1GNDSink-●
D17_1GNDSink-●
D18_1GNDSink-●
D19_1GNDSink-●
D20_1GNDSink-●
D22_2GNDSink-●
D22_3GNDSink-●
D23_1GNDSink-●
D24_1GNDSink-●
D25_1GNDSink-●
D26_1GNDSink-●
D27_1GNDSink-●
D28_1GNDSink-●
D29_1GNDSink-●
D30_1GNDSink-●
D31_1GNDSink-●
D32_1GNDSink-●
D33_1GNDSink-●
D34_1GNDSink-●
D35_1GNDSink-●
H1_1GNDSink-●
H2_1GNDSink-●
H3_1GNDSink-●
H4_1GNDSink-●
H5_1GNDSink-●
H6_1GNDSink-●
H8_1GNDSink-●
J1_3GNDSink-●
J2_6GNDSink-●
J2_9GNDSink-●
J2_14GNDSink-●
J2_20GNDSink-●
J2_25GNDSink-●
J2_30GNDSink-●
J2_34GNDSink-●
J2_39GNDSink-●
J4_8GNDSink-●
J5_S1GNDSink-●
J5_S2GNDSink-●
J5_S3GNDSink-●
J5_S4GNDSink-●
J5_6GNDSink-●
J6_17GNDSink-●
J7_A1GNDSink-●
J7_A12GNDSink-●
J7_B1GNDSink-●
J7_B12GNDSink-●
J8_4GNDSink-●
J8_8GNDSink-●
J9_A1GNDSink-●
J9_A12GNDSink-●
J9_B1GNDSink-●
J9_B12GNDSink-●
J9_S1GNDSink-●
Q2_2GNDSink-●
Q4_2GNDSink-●
Q5_2GNDSink-●
Q6_2GNDSink-●
R1_2GNDSink-●
R7_2GNDSink-●
R11_2GNDSink-●
R14_2GNDSink-●
R15_2GNDSink-●
R17_1GNDSink-●
R19_1GNDSink-●
R24_2GNDSink-●
R25_2GNDSink-●
R26_2GNDSink-●
R30_2GNDSink-●
R33_2GNDSink-●
R34_2GNDSink-●
R35_2GNDSink-●
R41_2GNDSink-●
R42_2GNDSink-●
R46_2GNDSink-●
R48_2GNDSink-●
R51_2GNDSink-●
R54_2GNDSink-●
S1_1GNDSink-●
S1_2GNDSink-●
TP1_1GNDSink-●
U2_1GNDSink-●
U2_7GNDSink-●
U2_8GNDSink-●
U2_13GNDSink-●
U2_14GNDSink-●
U2_19GNDSink-●
U2_20GNDSink-●
U2_25GNDSink-●
U2_26GNDSink-●
U2_31GNDSink-●
U2_32GNDSink-●
U2_37GNDSink-●
U2_43GNDSink-●
U2_44GNDSink-●
U2_49GNDSink-●
U2_50GNDSink-●
U2_55GNDSink-●
U2_56GNDSink-●
U2_61GNDSink-●
U2_62GNDSink-●
U2_67GNDSink-●
U2_68GNDSink-●
U2_73GNDSink-●
U2_74GNDSink-●
U2_79GNDSink-●
U2_80GNDSink-●
U2_85GNDSink-●
U2_86GNDSink-●
U2_91GNDSink-●
U2_92GNDSink-●
U2_97GNDSink-●
U2_98GNDSink-●
U2_103GNDSink-●
U2_104GNDSink-●
U2_109GNDSink-●
U2_110GNDSink-●
U2_115GNDSink-●
U2_116GNDSink-●
U2_121GNDSink-●
U2_122GNDSink-●
U2_127GNDSink-●
U2_128GNDSink-●
U2_133GNDSink-●
U2_134GNDSink-●
U2_139GNDSink-●
U2_140GNDSink-●
U2_145GNDSink-●
U2_146GNDSink-●
U2_151GNDSink-●
U2_152GNDSink-●
U2_157GNDSink-●
U2_158GNDSink-●
U2_163GNDSink-●
U2_164GNDSink-●
U2_169GNDSink-●
U2_170GNDSink-●
U2_181GNDSink-●
U2_182GNDSink-●
U2_187GNDSink-●
U2_188GNDSink-●
U2_195GNDSink-●
U2_196GNDSink-●
U3_11GNDSink-●
U4_11GNDSink-●
U5_11GNDSink-●
U6_11GNDSink-●
U7_3GNDSink-●
U8_2GNDSink-●
U9_34GNDSink-●
U9_44GNDSink-●
U9_65GNDSink-●
U10_2GNDSink-●
U11_2GNDSink-●
U12_2GNDSink-●
U13_2GNDSink-●
U14_2GNDSink-●
U16_5GNDSink-●
U16_10GNDSink-●
U19_11GNDSink-●
U20_7GNDSink-●
U20_9GNDSink-●
Y1_2GNDSink-●
Y1_4GNDSink-●
C43_1HDMI_5VSink-●
J6_18HDMI_5VSink-●
R5_1HDMI_5VSink-●
R58_1HDMI_5VSink-●
TP23_1HDMI_5VSink-●
U14_1HDMI_5VSource (VOUT)●●
C52_1Net-(C52-Pad1)Sink-●
C53_1Net-(C52-Pad1)Sink-●
C54_1Net-(C52-Pad1)Sink-●
C55_1Net-(C52-Pad1)Sink-●
L1_1Net-(D22-K)Series (U20 → L1)●●
L1_2Net-(C52-Pad1)Series (U20 → L1)●●
R47_1Net-(C52-Pad1)Feedback divider of U20●●
R47_23V3FBFeedback divider of U20●●
R48_13V3FBFeedback divider of U20●●
R48_2GNDFeedback divider of U20●●
R49_1Net-(C52-Pad1)Sink-●
R50_1Net-(C52-Pad1)Sink-●
TP29_1Net-(C52-Pad1)Sink-●
U20_53V3FBFeedback divider of U20●●
U20_8Net-(D22-K)Source (SW)●●
C46_1Net-(U13-VIN)Sink-●
R27_1Net-(U13-VIN)Sink-●
R28_1Net-(U13-VIN)Sink-●
TP20_1Net-(U13-VIN)Sink-●
U13_5Net-(U13-VIN)Sink-●
C42_1Net-(U14-EN)Sink-●
R29_2Net-(U14-EN)Sink-●
TP22_1Net-(U14-EN)Sink-●
U14_4Net-(U14-EN)Sink-●
U14_5Net-(U14-EN)Sink-●
C41_1SD_PWRSink-●
D11_1SD_PWRSink-●
J5_4SD_PWRSink-●
TP21_1SD_PWRSink-●
U13_1SD_PWRSource (VOUT)●●

14.8 Boundary Scan Testability

Boundary scan capable device(s) were identified, but no JTAG test access exists - the TAP pins are not reachable from any connector, test point, or probe point.

14.8.1 Boundary Scan Capable, TAP Not Accessible

U9 (LAN9512I-JZX) is boundary scan capable - BSDL LAN9512_JZX identifies the device - but its JTAG TAP pins have no test access. This is less than optimal for manufacturing test: route the TAP to a debug connector, or at minimum place test points on the TAP nets so test equipment can drive the boundary scan chain.
PinPin NameRoleNetStatus
U9_32TCKTCK3V3_LAN1No test access
U9_29TMSTMS3V3_LAN1No test access
U9_30TDITDI3V3_LAN1No test access
U9_31TDOTDONot connected
U9_28TRSTTRST3V3_LAN1No test access

14.9 Inspection

Total: 187 components, 904 of 920 pins with inspection coverage.

14.9.1 AOI

Package Identified from the Footprint Name (Non-IPC Footprints)
Footprint names are not IPC-7351B or IPC-7251, but each one names its package: a chip size code (0201 or larger) or a package name such as SOT, SOIC or QFP. These solder joints count toward inspection coverage.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
Opens + Shorts (all joints visible)
daymoon
HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm_ThermalViasSOIC/SOPFootprint19U20
MSOP-10_3x3mm_P0.5mmSOIC/SOPFootprint110U16
TSSOP-20_4.4x6.5mm_P0.65mmSOIC/SOPFootprint480U3, U4, U5, U6
SOT-23SOT (Small Outline Transistor)Footprint13Q3
SOT-23-6SOT (Small Outline Transistor)Footprint16U10
SOT-323_SC-70SOT (Small Outline Transistor)Footprint515Q1, Q2, Q4, Q5, Q6
SOT-353_SC-70-5SOT (Small Outline Transistor)Footprint15U7
TSOT-23-5SOT (Small Outline Transistor)Footprint525U11, U12, U13, U14, U8
C_0603_1608MetricChip PassiveFootprint size4488C10, C11, C12, C13, C15, C16, C17, C18 ...+36 more
C_0805_2012MetricChip PassiveFootprint size12C41
C_1206_3216MetricChip PassiveFootprint size510C40, C44, C49, C50, C56
C_1210_3225MetricChip PassiveFootprint size510C1, C52, C53, C54, C55
R_0402_1005MetricChip PassiveFootprint size24R5, R58
R_0603_1608MetricChip PassiveFootprint size50100FB1, FB2, R1, R10, R11, R12, R13, R14 ...+42 more
R_1206_3216MetricChip PassiveFootprint size714R26, R30, R45, R50, R54, R59, R6
R_shunt_1206_3216MetricChip PassiveFootprint size12F1
D_0402_1005Metric [SOD-923]SOD (Diode Package)Part data2142D10, D14, D16, D17, D18, D19, D2, D20 ...+13 more
D_POWERDI5SOD (Diode Package)Footprint13D22
D_SOD-123FSOD (Diode Package)Footprint12D4
D_SOD-123WSOD (Diode Package)Footprint12D11
LED_0603_1608MetricSOD (Diode Package)Footprint size12D6
LED_0805_2012MetricSOD (Diode Package)Footprint size714D1, D21, D23, D3, D5, D7, D8
PinHeader_1x03_P2.54mm_VerticalConnectorPart data13J1
PinHeader_2x20_P2.54mm_VerticalConnectorPart data140J2
RJ45-POE_ARJM11D7-009ConnectorPart data113J4
TE_5787745-1ConnectorPart data112J8
Subtotal: 170 components, 516 pins
Assumed Classification (Non-IPC Footprints)
Footprint names are not IPC-7351B or IPC-7251. Package type inferred from Pkg Type property or designator prefix. Classification may be incorrect.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
Opens + Shorts (all joints visible)
daymoon
SO_DIMM_200p_TE_1473149-4SOIC/SOPDesignator1202U2
L_IHLP2525CZChip PassiveDesignator12L1
Subtotal: 2 components, 204 pins
Presence check (manual verification)
daymoon
685119134923ConnectorDesignator120J6
GCT_MEM2052-00-195-00-AConnectorDesignator113J5
GCT_USB4085-GF-A_REVA4ConnectorDesignator117J9
GCT_USB4205-GF-A_REVAConnectorDesignator117J7
PC_1862055ConnectorDesignator16J3
Subtotal: 5 components, 73 pins

14.9.2 AXI

Package Identified from the Footprint Name (Non-IPC Footprints)
Footprint names are not IPC-7351B or IPC-7251, but each one names its package (QFN, DFN, BGA or LGA). These hidden joints count toward X-ray inspection coverage.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
daymoon
DFN-8_FET_3x3mm [DFN]QFN/DFN (No-Lead)Part data15Q7
QFN-64-1EP_9x9mm_P0.5mm_EP7.3x7.3mmQFN/DFN (No-Lead)Footprint265U9, U9
SLP2510P8QFN/DFN (No-Lead)Footprint330D12, D13, D15
WDFN-10-1EP_3x3mm_P0.5mm_EP1.8x2.5mmQFN/DFN (No-Lead)Footprint111U19
Subtotal: 7 components, 111 pins

14.9.3 Unclassified Components

These components could not be classified for inspection. The library symbol lacks a Pkg Type property and the footprint name is not IPC-7351B or IPC-7251.
FootprintSize (mil)Pkg TypeClassificationMethodCountPinsRefdes
daymoon
Crystal_SMD_5032-4Pin_5.0x3.2mmOscillator / CrystalDesignator14Y1
MIKROSPINAC_PTS810UnclassifiedUnknown14S1
Relay_2P2T_10x6mm_TE_IMxxGUnclassifiedUnknown18K1
Subtotal: 3 components, 16 pins

14.10 Solder-Joint Testability

Predicted status of each pin for shorts and opens based on DFx options selected in section 13.1.

14.10.1 Solder-Joint Testability Summary

Solder-Joint Testability Summary (827 solder joints)
Test MethodOpensShorts
X-ray (AXI)95 (11.5%)95 (11.5%)
Optical (AOI)495 (59.9%)495 (59.9%)
Electrical
   Powered-off Testing118 (14.3%)451 (54.5%)
   Boundary Scan0 (0.0%)0 (0.0%)
   LSSI--
   Total132 (16.0%)540 (65.3%)
Total Solder-Joint Testability618 (74.7%)721 (87.2%)
No coverage209 (25.3%)106 (12.8%)

14.10.2 Untestable Solder Joints (106)

These pins have no electrical, optical, or X-ray test coverage even with all available test techniques applied.
Pin ⇅Net ⇅
J5_1SD_DAT2
J5_2SD_DAT3
J5_3SD_CMD
J5_5SD_CLK
J5_7SD_DAT0
J5_8SD_DAT1
S1_3RUN
S1_4RUN
U2_2EMMC_DISABLE_N
U2_9GPIO2
U2_10SD_CLK
U2_11GPIO3
U2_12SD_CMD
U2_15GPIO4
U2_16SD_DAT0
U2_17GPIO5
U2_18SD_DAT1
U2_21GPIO6
U2_22SD_DAT2
U2_23GPIO7
U2_24SD_DAT3
U2_27GPIO8
U2_29GPIO9
U2_30LAN1_EN
U2_33GPIO10
U2_35GPIO11
U2_45GPIO12
U2_47GPIO13
U2_51GPIO14
U2_53GPIO15
U2_57GPIO16
U2_59GPIO17
U2_63GPIO18
U2_65GPIO19
U2_69GPIO20
U2_71GPIO21
U2_75GPIO22
U2_77GPIO23
U2_81GPIO24
U2_83GPIO25
U2_87GPIO26
U2_88Net-(Q4-D)
U2_89GPIO27
U2_90EMMC_EN_N_1V8
U2_111HDMI0_CK_N
U2_113HDMI0_CK_P
U2_117HDMI0_D0_N
U2_119HDMI0_D0_P
U2_123HDMI0_D1_N
U2_125HDMI0_D1_P
U2_129HDMI0_D2_N
U2_131HDMI0_D2_P
U2_165USB_P
U2_167USB_N
U2_168USB_OTGID
U2_171HDMI0_CEC
U2_173HDMI0_SDA
U2_175HDMI0_SCL
U2_177RUN
U2_189Net-(R9-Pad2)
U2_190Net-(R9-Pad2)
J9_A4Net-(D18-A2)
J9_A5Net-(D16-A2)
J9_A6USB_D+
J9_A7USB_D-
J9_A9Net-(D18-A2)
J9_B4Net-(D18-A2)
J9_B5Net-(D17-A2)
J9_B6USB_D+
J9_B7USB_D-
J9_B9Net-(D18-A2)
J7_A5Net-(J7-CC1)
J7_A6USB_BOOT_P
J7_A7USB_BOOT_N
J7_B5Net-(J7-CC2)
J7_B6USB_BOOT_P
J7_B7USB_BOOT_N
Y1_1Net-(U9A-XO)
Y1_3Net-(U9A-XI)
J6_1HDMI0_D2_P
J6_2Net-(J6-CKS)
J6_3HDMI0_D2_N
J6_4HDMI0_D1_P
J6_5Net-(J6-CKS)
J6_6HDMI0_D1_N
J6_7HDMI0_D0_P
J6_8Net-(J6-CKS)
J6_9HDMI0_D0_N
J6_10HDMI0_CK_P
J6_11Net-(J6-CKS)
J6_12HDMI0_CK_N
J6_13HDMI0_CEC
J6_15HDMI0_SCL
J6_16HDMI0_SDA
J6_19HDMI0_HOTPLUG
J6_SHNet-(J6-CKS)
J3_1RELAY1_NO
J3_2RELAY1_NO
J3_3RELAY1_COM
J3_4RELAY1_COM
J3_5RELAY1_NC
J3_6RELAY1_NC
K1_5RELAY1_NO
K1_6RELAY1_COM
K1_7RELAY1_NC
K1_8Net-(D4-A)

14.10.3 Per-Solder-Joint Testability Matrix

● = Detected ◐ = Partially detected - = Not tested | E = Electrical (ICT/flying probe) O = Optical (AOI) X = X-ray (AXI)

Pin ⇅Net ⇅E Opens ⇅E Shorts ⇅O Opens ⇅O Shorts ⇅X Opens ⇅X Shorts ⇅
H1_1GND●●----
H4_1GND●●----
H2_1GND●●----
H3_1GND●●----
D35_1GND-●●◐--
D35_2SD_CLK--●◐--
D11_1SD_PWR●●●◐--
D11_2GND●●●◐--
D10_1GND-●●◐--
D10_2SD_DAT1--●◐--
C41_1SD_PWR-●●◐--
C41_2GND-●●◐--
U13_1SD_PWR●●●◐--
U13_2GND-●●◐--
U13_4SD_VDD-●●◐--
U13_5Net-(U13-VIN)-●●◐--
D32_1GND-●●◐--
D32_2SD_DAT2--●◐--
R28_1Net-(U13-VIN)-●●◐--
R28_2SD_VDD-●●◐--
J5_1SD_DAT2------
J5_2SD_DAT3------
J5_3SD_CMD------
J5_4SD_PWR-●----
J5_5SD_CLK------
J5_6GND-●----
J5_7SD_DAT0------
J5_8SD_DAT1------
J5_S1GND-●----
J5_S2GND-●----
J5_S3GND-●----
J5_S4GND-●----
D34_1GND-●●◐--
D34_2SD_CMD--●◐--
D9_1GND-●●◐--
D9_2SD_DAT0--●◐--
C46_1Net-(U13-VIN)-●●◐--
C46_2GND-●●◐--
D33_1GND-●●◐--
D33_2SD_DAT3--●◐--
R27_1Net-(U13-VIN)●●●◐--
R27_2+3V3●●●◐--
D1_1Net-(D1-K)--●◐--
D1_2+3V3-●●◐--
R59_1+BATT-●●◐--
R59_2+3V3-●●◐--
J1_1USB_BOOT_VBUS-●●◐--
J1_2Net-(J1-Pin_2)-●●◐--
J1_3GND-●●◐--
R9_1Net-(C1-Pad1)-●●◐--
R9_2Net-(R9-Pad2)--●◐--
H8_1GND●●----
S1_1GND-●----
S1_2GND-●----
S1_3RUN------
S1_4RUN------
R52_1CM4_SDA0●●●◐--
R52_2Net-(U2-GPIO0)●◐●◐--
R6_1+3V3-●●◐--
R6_2Net-(C1-Pad1)-●●◐--
R4_1+3V3-●●◐--
R4_2RUN--●◐--
R51_1USB_OTGID--●◐--
R51_2GND-●●◐--
H6_1GND●●----
Q4_1HDMI0_HOTPLUG--●◐--
Q4_2GND-●●◐--
Q4_3Net-(Q4-D)--●◐--
D2_1GND-●●◐--
D2_2RUN--●◐--
D3_1Net-(D3-K)--●◐--
D3_2Net-(D3-A)--●◐--
C1_1Net-(C1-Pad1)-●●◐--
C1_2GND-●●◐--
Q2_1EMMC_EN_N_1V8--●◐--
Q2_2GND-●●◐--
Q2_3Net-(Q1-S)--●◐--
C3_1Net-(C3-Pad1)-●●◐--
C3_2GND-●●◐--
R8_1+3V3-●●◐--
R8_2Net-(C2-Pad1)-●●◐--
Q3_1RUN--●◐--
Q3_2+3V3-●●◐--
Q3_3Net-(D3-A)--●◐--
R2_1Net-(D1-K)--●◐--
R2_2Net-(Q1-S)--●◐--
R7_1Net-(D3-K)--●◐--
R7_2GND-●●◐--
U2_1GND-●----
U2_2EMMC_DISABLE_N------
U2_3Net-(U2-GPIO0)●◐----
U2_4SD_VDD-●----
U2_5Net-(U2-GPIO1)●◐----
U2_6SD_VDD-●----
U2_7GND-●----
U2_8GND-●----
U2_9GPIO2------
U2_10SD_CLK------
U2_11GPIO3------
U2_12SD_CMD------
U2_13GND-●----
U2_14GND-●----
U2_15GPIO4------
U2_16SD_DAT0------
U2_17GPIO5------
U2_18SD_DAT1------
U2_19GND-●----
U2_20GND-●----
U2_21GPIO6------
U2_22SD_DAT2------
U2_23GPIO7------
U2_24SD_DAT3------
U2_25GND-●----
U2_26GND-●----
U2_27GPIO8------
U2_28RELAY1●●----
U2_29GPIO9------
U2_30LAN1_EN------
U2_31GND-●----
U2_32GND-●----
U2_33GPIO10------
U2_34Net-(U2-GPIO30)●●----
U2_35GPIO11------
U2_36Net-(U2-GPIO31)●●----
U2_37GND-●----
U2_39Net-(C2-Pad1)-●----
U2_40Net-(C2-Pad1)-●----
U2_41Net-(C3-Pad1)-●----
U2_42Net-(C3-Pad1)-●----
U2_43GND-●----
U2_44GND-●----
U2_45GPIO12------
U2_46Net-(U2-GPIO32)●●----
U2_47GPIO13------
U2_48Net-(U2-GPIO33)●●----
U2_49GND-●----
U2_50GND-●----
U2_51GPIO14------
U2_52Net-(U2-GPIO34)●●----
U2_53GPIO15------
U2_54Net-(U2-GPIO35)●●----
U2_55GND-●----
U2_56GND-●----
U2_57GPIO16------
U2_58Net-(U2-GPIO36)●●----
U2_59GPIO17------
U2_60Net-(U2-GPIO37)●●----
U2_61GND-●----
U2_62GND-●----
U2_63GPIO18------
U2_64Net-(U2-GPIO38)●●----
U2_65GPIO19------
U2_66Net-(U2-GPIO39)●●----
U2_67GND-●----
U2_68GND-●----
U2_69GPIO20------
U2_70Net-(U2-GPIO40)●●----
U2_71GPIO21------
U2_72Net-(U2-GPIO41)●●----
U2_73GND-●----
U2_74GND-●----
U2_75GPIO22------
U2_76Net-(U2-GPIO42)●●----
U2_77GPIO23------
U2_78Net-(U2-GPIO43)●●----
U2_79GND-●----
U2_80GND-●----
U2_81GPIO24------
U2_82Net-(U2-GPIO44)●●----
U2_83GPIO25------
U2_84Net-(U2-GPIO45)●●----
U2_85GND-●----
U2_86GND-●----
U2_87GPIO26------
U2_88Net-(Q4-D)------
U2_89GPIO27------
U2_90EMMC_EN_N_1V8------
U2_91GND-●----
U2_92GND-●----
U2_97GND-●----
U2_98GND-●----
U2_103GND-●----
U2_104GND-●----
U2_109GND-●----
U2_110GND-●----
U2_111HDMI0_CK_N------
U2_113HDMI0_CK_P------
U2_115GND-●----
U2_116GND-●----
U2_117HDMI0_D0_N------
U2_119HDMI0_D0_P------
U2_121GND-●----
U2_122GND-●----
U2_123HDMI0_D1_N------
U2_125HDMI0_D1_P------
U2_127GND-●----
U2_128GND-●----
U2_129HDMI0_D2_N------
U2_131HDMI0_D2_P------
U2_133GND-●----
U2_134GND-●----
U2_139GND-●----
U2_140GND-●----
U2_145GND-●----
U2_146GND-●----
U2_151GND-●----
U2_152GND-●----
U2_157GND-●----
U2_158GND-●----
U2_163GND-●----
U2_164GND-●----
U2_165USB_P------
U2_167USB_N------
U2_168USB_OTGID------
U2_169GND-●----
U2_170GND-●----
U2_171HDMI0_CEC------
U2_173HDMI0_SDA------
U2_175HDMI0_SCL------
U2_177RUN------
U2_181GND-●----
U2_182GND-●----
U2_187GND-●----
U2_188GND-●----
U2_189Net-(R9-Pad2)------
U2_190Net-(R9-Pad2)------
U2_191Net-(C1-Pad1)-●----
U2_192Net-(C1-Pad1)-●----
U2_193Net-(C1-Pad1)-●----
U2_194Net-(C1-Pad1)-●----
U2_195GND-●----
U2_196GND-●----
U2_197+BATT-●----
U2_198+BATT-●----
U2_199+BATT-●----
U2_200+BATT-●----
R1_1Net-(J1-Pin_2)●●●◐--
R1_2GND●●●◐--
R53_1CM4_SCL0●●●◐--
R53_2Net-(U2-GPIO1)●◐●◐--
C2_1Net-(C2-Pad1)-●●◐--
C2_2GND-●●◐--
R10_1Net-(C3-Pad1)-●●◐--
R10_2+3V3-●●◐--
H5_1GND●●----
Q1_1Net-(J1-Pin_2)-●●◐--
Q1_2Net-(Q1-S)--●◐--
Q1_3EMMC_DISABLE_N--●◐--
C5_1+3V3-●●◐--
C5_2GND-●●◐--
J2_1+3V3-●●◐--
J2_2+5V-●●◐--
J2_3GPIO2_EXT-●●◐--
J2_4+5V-●●◐--
J2_5GPIO3_EXT-●●◐--
J2_6GND-●●◐--
J2_7GPIO4_EXT-●●◐--
J2_8GPIO14_EXT-●●◐--
J2_9GND-●●◐--
J2_10GPIO15_EXT-●●◐--
J2_11GPIO17_EXT-●●◐--
J2_12GPIO18_EXT-●●◐--
J2_13GPIO27_EXT-●●◐--
J2_14GND-●●◐--
J2_15GPIO22_EXT-●●◐--
J2_16GPIO23_EXT-●●◐--
J2_17+3V3-●●◐--
J2_18GPIO24_EXT-●●◐--
J2_19GPIO10_EXT-●●◐--
J2_20GND-●●◐--
J2_21GPIO9_EXT-●●◐--
J2_22GPIO25_EXT-●●◐--
J2_23GPIO11_EXT-●●◐--
J2_24GPIO8_EXT-●●◐--
J2_25GND-●●◐--
J2_26GPIO7_EXT-●●◐--
J2_29GPIO5_EXT-●●◐--
J2_30GND-●●◐--
J2_31GPIO6_EXT-●●◐--
J2_32GPIO12_EXT-●●◐--
J2_33GPIO13_EXT-●●◐--
J2_34GND-●●◐--
J2_35GPIO19_EXT-●●◐--
J2_36GPIO16_EXT-●●◐--
J2_37GPIO26_EXT-●●◐--
J2_38GPIO20_EXT-●●◐--
J2_39GND-●●◐--
J2_40GPIO21_EXT-●●◐--
C10_1+3V3-●●◐--
C10_2GND-●●◐--
C12_1+5V-●●◐--
C12_2GND-●●◐--
U3_1GPIO2--●◐--
U3_2+3V3-●●◐--
U3_3GPIO3--●◐--
U3_4GPIO4--●◐--
U3_5GPIO14--●◐--
U3_6GPIO15--●◐--
U3_7GPIO17--●◐--
U3_8GPIO18--●◐--
U3_9GPIO27--●◐--
U3_10OUTPUT_EN--●◐--
U3_11GND-●●◐--
U3_12GPIO27_EXT●●●◐--
U3_13GPIO18_EXT●●●◐--
U3_14GPIO17_EXT●●●◐--
U3_15GPIO15_EXT●●●◐--
U3_16GPIO14_EXT●●●◐--
U3_17GPIO4_EXT●●●◐--
U3_18GPIO3_EXT●●●◐--
U3_19+5V-●●◐--
U3_20GPIO2_EXT●●●◐--
C11_1+3V3-●●◐--
C11_2GND-●●◐--
C9_1+5V-●●◐--
C9_2GND-●●◐--
C4_1+3V3-●●◐--
C4_2GND-●●◐--
U5_1GPIO7--●◐--
U5_2+3V3-●●◐--
U5_3GPIO5--●◐--
U5_4GPIO6--●◐--
U5_5GPIO12--●◐--
U5_6GPIO13--●◐--
U5_7GPIO19--●◐--
U5_8GPIO16--●◐--
U5_9GPIO26--●◐--
U5_10OUTPUT_EN--●◐--
U5_11GND-●●◐--
U5_12GPIO26_EXT●●●◐--
U5_13GPIO16_EXT●●●◐--
U5_14GPIO19_EXT●●●◐--
U5_15GPIO13_EXT●●●◐--
U5_16GPIO12_EXT●●●◐--
U5_17GPIO6_EXT●●●◐--
U5_18GPIO5_EXT●●●◐--
U5_19+5V-●●◐--
U5_20GPIO7_EXT●●●◐--
U7_2RUN--●◐--
U7_3GND-●●◐--
U7_4OUTPUT_EN--●◐--
U7_5+3V3-●●◐--
U6_1GPIO20--●◐--
U6_2+3V3-●●◐--
U6_3GPIO21--●◐--
U6_10OUTPUT_EN--●◐--
U6_11GND-●●◐--
U6_18GPIO21_EXT●●●◐--
U6_19+5V-●●◐--
U6_20GPIO20_EXT●●●◐--
U4_1GPIO22--●◐--
U4_2+3V3-●●◐--
U4_3GPIO23--●◐--
U4_4GPIO24--●◐--
U4_5GPIO10--●◐--
U4_6GPIO9--●◐--
U4_7GPIO25--●◐--
U4_8GPIO11--●◐--
U4_9GPIO8--●◐--
U4_10OUTPUT_EN--●◐--
U4_11GND-●●◐--
U4_12GPIO8_EXT●●●◐--
U4_13GPIO11_EXT●●●◐--
U4_14GPIO25_EXT●●●◐--
U4_15GPIO9_EXT●●●◐--
U4_16GPIO10_EXT●●●◐--
U4_17GPIO24_EXT●●●◐--
U4_18GPIO23_EXT●●●◐--
U4_19+5V-●●◐--
U4_20GPIO22_EXT●●●◐--
C6_1+3V3-●●◐--
C6_2GND-●●◐--
C8_1+5V-●●◐--
C8_2GND-●●◐--
C7_1+5V-●●◐--
C7_2GND-●●◐--
D17_1GND-●●◐--
D17_2Net-(D17-A2)--●◐--
C54_1Net-(C52-Pad1)-●●◐--
C54_2GND-●●◐--
R37_1Net-(Q7-S1)--●◐--
R37_2Net-(U19-VIN)--●◐--
C49_1+5V-●●◐--
C49_2GND-●●◐--
R46_1Net-(D21-K)●◐●◐--
R46_2GND●●●◐--
R48_13V3FB●●●◐--
R48_2GND●●●◐--
D20_1GND-●●◐--
D20_2USB_D---●◐--
C51_1Net-(U20-BOOT)--●◐--
C51_2Net-(D22-K)--●◐--
R41_1Net-(U20-RT/SYNC)--●◐--
R41_2GND-●●◐--
C53_1Net-(C52-Pad1)-●●◐--
C53_2GND-●●◐--
U20_1Net-(U20-BOOT)--●◐--
U20_2+5V-●●◐--
U20_3+5V-●●◐--
U20_4Net-(U20-RT/SYNC)--●◐--
U20_53V3FB●●●◐--
U20_6Net-(U20-SS)--●◐--
U20_7GND-●●◐--
U20_8Net-(D22-K)●●●◐--
U20_9GND-●●◐--
C50_1+5V-●●◐--
C50_2GND-●●◐--
C48_1Net-(U20-SS)--●◐--
C48_2GND-●●◐--
D16_1GND-●●◐--
D16_2Net-(D16-A2)--●◐--
R42_1Net-(U19-VSET)--●◐--
R42_2GND-●●◐--
D22_1Net-(D22-K)--●◐--
D22_2GND-●●◐--
D22_3GND-●●◐--
R49_1Net-(C52-Pad1)●●●◐--
R49_2Net-(D23-A)●◐●◐--
L1_1Net-(D22-K)●●----
L1_2Net-(C52-Pad1)●●----
D18_1GND-●●◐--
D18_2Net-(D18-A2)--●◐--
D19_1GND-●●◐--
D19_2USB_D+--●◐--
C47_1Net-(U19-VIN)--●◐--
C47_2GND-●●◐--
J9_A1GND-●----
J9_A4Net-(D18-A2)------
J9_A5Net-(D16-A2)------
J9_A6USB_D+------
J9_A7USB_D-------
J9_A9Net-(D18-A2)------
J9_A12GND-●----
J9_B1GND-●----
J9_B4Net-(D18-A2)------
J9_B5Net-(D17-A2)------
J9_B6USB_D+------
J9_B7USB_D-------
J9_B9Net-(D18-A2)------
J9_B12GND-●----
J9_S1GND-●----
R47_1Net-(C52-Pad1)●●●◐--
R47_23V3FB●●●◐--
R45_1Net-(Q7-D)●●●◐--
R45_2+5V●●●◐--
R43_1+3V3●●●◐--
R43_2CM4_SCL0●●●◐--
U19_1Net-(U19-VIN)----●◐
U19_2USB_D+----●◐
U19_3USB_D-----●◐
U19_4Net-(D16-A2)----●◐
U19_5Net-(D17-A2)----●◐
U19_6CM4_SDA0●●--●◐
U19_7CM4_SCL0●●--●◐
U19_8Net-(U19-VSET)----●◐
U19_10Net-(U19-GATE)----●◐
U19_11GND-●--●◐
R39_1Net-(Q7-G)--●◐--
R39_2Net-(U19-GATE)--●◐--
C52_1Net-(C52-Pad1)-●●◐--
C52_2GND-●●◐--
R38_1Net-(Q7-S1)--●◐--
R38_2Net-(Q7-G)--●◐--
R44_1+3V3●●●◐--
R44_2CM4_SDA0●●●◐--
D23_1GND●●●◐--
D23_2Net-(D23-A)●◐●◐--
F1_1Net-(D18-A2)--●◐--
F1_2Net-(Q7-S1)--●◐--
Q7_1Net-(Q7-S1)----●◐
Q7_2Net-(Q7-S1)----●◐
Q7_3Net-(Q7-S1)----●◐
Q7_4Net-(Q7-G)----●◐
Q7_5Net-(Q7-D)-●--●◐
D21_1Net-(D21-K)●◐●◐--
D21_2+5V●●●◐--
R50_1Net-(C52-Pad1)●●●◐--
R50_2+3V3●●●◐--
C55_1Net-(C52-Pad1)-●●◐--
C55_2GND-●●◐--
J7_A1GND-●----
J7_A4USB_BOOT_VBUS-●----
J7_A5Net-(J7-CC1)------
J7_A6USB_BOOT_P------
J7_A7USB_BOOT_N------
J7_A9USB_BOOT_VBUS-●----
J7_A12GND-●----
J7_B1GND-●----
J7_B4USB_BOOT_VBUS-●----
J7_B5Net-(J7-CC2)------
J7_B6USB_BOOT_P------
J7_B7USB_BOOT_N------
J7_B9USB_BOOT_VBUS-●----
J7_B12GND-●----
J7_SHNet-(J7-SHIELD)-●----
D25_1GND●●●◐--
D25_2USB_BOOT_VBUS●●●◐--
R33_1Net-(J7-CC1)--●◐--
R33_2GND-●●◐--
D24_1GND-●●◐--
D24_2USB_BOOT_P--●◐--
D26_1GND●●●◐--
D26_2USB_OTG_1_P●●●◐--
R54_1Net-(J7-SHIELD)●●●◐--
R54_2GND●●●◐--
D27_1GND●●●◐--
D27_2USB_OTG_2_P●●●◐--
R31_1+3V3-●●◐--
R31_2Net-(Q6-D)--●◐--
C45_1+3V3-●●◐--
C45_2GND-●●◐--
R35_1USB_BOOT_VBUS●●●◐--
R35_2GND●●●◐--
R32_1Net-(Q6-G)--●◐--
R32_2USB_BOOT_VBUS-●●◐--
D28_1GND●●●◐--
D28_2USB_OTG_1_N●●●◐--
U16_1+3V3-●●◐--
U16_2Net-(Q6-D)--●◐--
U16_3USB_P--●◐--
U16_4USB_N--●◐--
U16_5GND-●●◐--
U16_6USB_BOOT_N--●◐--
U16_7USB_BOOT_P--●◐--
U16_8USB_LAN_N--●◐--
U16_9USB_LAN_P--●◐--
U16_10GND-●●◐--
D29_1GND●●●◐--
D29_2USB_OTG_2_N●●●◐--
D30_1GND●●●◐--
D30_25V_OTG_1●●●◐--
C56_1Net-(J7-SHIELD)-●●◐--
C56_2GND-●●◐--
Q6_1Net-(Q6-G)--●◐--
Q6_2GND-●●◐--
Q6_3Net-(Q6-D)--●◐--
J8_15V_OTG_1-●●◐--
J8_2USB_OTG_1_N-●●◐--
J8_3USB_OTG_1_P-●●◐--
J8_4GND-●●◐--
J8_55V_OTG_2-●●◐--
J8_6USB_OTG_2_N-●●◐--
J8_7USB_OTG_2_P-●●◐--
J8_8GND-●●◐--
J8_S1Net-(J7-SHIELD)-●●◐--
J8_S2Net-(J7-SHIELD)-●●◐--
J8_S3Net-(J7-SHIELD)-●●◐--
J8_S4Net-(J7-SHIELD)-●●◐--
D31_1GND●●●◐--
D31_25V_OTG_2●●●◐--
R34_1Net-(J7-CC2)--●◐--
R34_2GND-●●◐--
D14_1GND-●●◐--
D14_2USB_BOOT_N--●◐--
C40_1Earth-●●◐--
C40_2GND-●●◐--
C17_1Net-(U9A-XI)--●◐--
C17_2GND-●●◐--
U9_5VDD33A_LAN1-●--●◐
U9_10VDD33A_LAN1-●--●◐
U9_12nRESET_LAN1----●◐
U9_15VDD18CORE_LAN1-●--●◐
U9_193V3_LAN1-●--●◐
U9_20nFDX_LAN1----●◐
U9_21nLNKA_LAN1●●--●◐
U9_22nSPD_LAN1●●--●◐
U9_23EECLK_LAN1----●◐
U9_24EECS_LAN1----●◐
U9_25EEDO_LAN1----●◐
U9_26EEDI_LAN1----●◐
U9_273V3_LAN1-●--●◐
U9_283V3_LAN1-●--●◐
U9_293V3_LAN1-●--●◐
U9_303V3_LAN1-●--●◐
U9_323V3_LAN1-●--●◐
U9_333V3_LAN1-●--●◐
U9_34GND-●--●◐
U9_38VDD18CORE_LAN1-●--●◐
U9_393V3_LAN1-●--●◐
U9_403V3_LAN1-●--●◐
U9_44GND-●--●◐
U9_463V3_LAN1-●--●◐
U9_48Net-(U9A-VDD18ETHPLL)----●◐
U9_49VDD33A_LAN1-●--●◐
U9_51VDD33A_LAN1-●--●◐
U9_54VDD33A_LAN1-●--●◐
U9_57VDD33A_LAN1-●--●◐
U9_60Net-(U9A-XO)----●◐
U9_61Net-(U9A-XI)----●◐
U9_62Net-(U9A-VDD18USBPLL)----●◐
U9_64VDD33A_LAN1-●--●◐
U9_65GND-●--●◐
C27_1Net-(U9A-VDD18USBPLL)--●◐--
C27_2GND-●●◐--
C15_1Net-(U9A-VDD18ETHPLL)--●◐--
C15_2GND-●●◐--
R22_1VDD33A_LAN1-●●◐--
R22_2Net-(J4-LEDY_A)-●●◐--
J4_1LAN1_TXP-●●◐--
J4_2LAN1_TXN-●●◐--
J4_3LAN1_RXP-●●◐--
J4_4Net-(C39-Pad1)-●●◐--
J4_5Net-(C39-Pad1)-●●◐--
J4_6LAN1_RXN-●●◐--
J4_8GND-●●◐--
J4_9Net-(J4-LEDG_A)-●●◐--
J4_10nLNKA_LAN1-●●◐--
J4_11Net-(J4-LEDY_A)-●●◐--
J4_12nSPD_LAN1-●●◐--
J4_13Earth-●●◐--
R13_1Net-(U9A-XO)--●◐--
R13_2Net-(U9A-XI)--●◐--
R36_1VDD33A_LAN1-●●◐--
R36_2LAN1_RXN-●●◐--
D6_1nFDX_LAN1--●◐--
D6_2Net-(D6-A)--●◐--
R12_13V3_LAN1-●●◐--
R12_2nRESET_LAN1--●◐--
R24_1Net-(D7-K)●◐●◐--
R24_2GND●●●◐--
R25_1Net-(D8-K)●◐●◐--
R25_2GND●●●◐--
R56_1VDD33A_LAN1-●●◐--
R56_2LAN1_TXN-●●◐--
U9_1USB_OTG_1_N●●--●◐
U9_2USB_OTG_1_P●●--●◐
U9_3USB_OTG_2_N●●--●◐
U9_4USB_OTG_2_P●●--●◐
U9_11Net-(U9B-VBUS_DET)----●◐
U9_14PRTCTL2_OTG_1----●◐
U9_16PRTCTL3_OTG_2----●◐
U9_41Net-(U9B-AUTOMDIX_EN)----●◐
U9_50Net-(U9B-EXRES)----●◐
U9_52LAN1_RXP●●--●◐
U9_53LAN1_RXN●●--●◐
U9_55LAN1_TXP●●--●◐
U9_56LAN1_TXN●●--●◐
U9_58USB_LAN_N----●◐
U9_59USB_LAN_P----●◐
U9_63Net-(U9B-USBRBIAS)----●◐
R21_1VDD33A_LAN1-●●◐--
R21_2Net-(J4-LEDG_A)-●●◐--
Y1_1Net-(U9A-XO)------
Y1_2GND-●----
Y1_3Net-(U9A-XI)------
Y1_4GND-●----
R20_1VDD33A_LAN1-●●◐--
R20_2Net-(C39-Pad1)-●●◐--
R57_1VDD33A_LAN1-●●◐--
R57_2LAN1_RXP-●●◐--
C35_13V3_LAN1-●●◐--
C35_2GND-●●◐--
C23_1VDD18CORE_LAN1-●●◐--
C23_2GND-●●◐--
D7_1Net-(D7-K)●◐●◐--
D7_25V_OTG_1●●●◐--
C25_13V3_LAN1-●●◐--
C25_2GND-●●◐--
C36_1VDD33A_LAN1-●●◐--
C36_2GND-●●◐--
C20_1+3V3-●●◐--
C20_2GND-●●◐--
R17_1GND-●●◐--
R17_2Net-(U9B-USBRBIAS)--●◐--
C33_1VDD33A_LAN1-●●◐--
C33_2GND-●●◐--
C26_1VDD18CORE_LAN1-●●◐--
C26_2GND-●●◐--
C29_1VDD33A_LAN1-●●◐--
C29_2GND-●●◐--
C37_1+5V-●●◐--
C37_2GND-●●◐--
R19_1GND-●●◐--
R19_2Net-(U9B-EXRES)--●◐--
C31_1VDD33A_LAN1-●●◐--
C31_2GND-●●◐--
C16_1Net-(U9A-XO)--●◐--
C16_2GND-●●◐--
FB1_1Net-(U9A-VDD18ETHPLL)--●◐--
FB1_2Net-(U9A-VDD18USBPLL)--●◐--
C19_13V3_LAN1-●●◐--
C19_2GND-●●◐--
R14_1Net-(D5-K)--●◐--
R14_2GND-●●◐--
C24_1Net-(U9A-VDD18USBPLL)--●◐--
C24_2GND-●●◐--
U11_15V_OTG_1-●●◐--
U11_2GND-●●◐--
U11_4PRTCTL2_OTG_1--●◐--
U11_5+5V-●●◐--
C28_13V3_LAN1-●●◐--
C28_2GND-●●◐--
C38_1+5V-●●◐--
C38_2GND-●●◐--
R15_1EECS_LAN1--●◐--
R15_2GND-●●◐--
U12_15V_OTG_2-●●◐--
U12_2GND-●●◐--
U12_4PRTCTL3_OTG_2--●◐--
U12_5+5V-●●◐--
FB2_1VDD33A_LAN1-●●◐--
FB2_23V3_LAN1-●●◐--
C30_1VDD33A_LAN1-●●◐--
C30_2GND-●●◐--
U8_13V3_LAN1-●●◐--
U8_2GND-●●◐--
U8_4LAN1_EN--●◐--
U8_5+3V3-●●◐--
R18_13V3_LAN1-●●◐--
R18_2Net-(U9B-AUTOMDIX_EN)--●◐--
D8_1Net-(D8-K)●◐●◐--
D8_25V_OTG_2●●●◐--
R16_13V3_LAN1-●●◐--
R16_2Net-(U9B-VBUS_DET)--●◐--
R23_1VDD33A_LAN1-●●◐--
R23_2Net-(D6-A)--●◐--
D5_1Net-(D5-K)--●◐--
D5_23V3_LAN1-●●◐--
C34_1VDD33A_LAN1-●●◐--
C34_2GND-●●◐--
C21_1Net-(U9A-VDD18ETHPLL)--●◐--
C21_2GND-●●◐--
U10_1EEDI_LAN1--●◐--
U10_2GND-●●◐--
U10_3EEDO_LAN1--●◐--
U10_4EECLK_LAN1--●◐--
U10_5EECS_LAN1--●◐--
U10_63V3_LAN1-●●◐--
C32_1VDD33A_LAN1-●●◐--
C32_2GND-●●◐--
C18_1VDD18CORE_LAN1-●●◐--
C18_2GND-●●◐--
C39_1Net-(C39-Pad1)-●●◐--
C39_2GND-●●◐--
R26_1Earth●●●◐--
R26_2GND●●●◐--
C22_13V3_LAN1-●●◐--
C22_2GND-●●◐--
C13_13V3_LAN1-●●◐--
C13_2GND-●●◐--
R55_1VDD33A_LAN1-●●◐--
R55_2LAN1_TXP-●●◐--
U14_1HDMI_5V●●●◐--
U14_2GND-●●◐--
U14_4Net-(U14-EN)-●●◐--
U14_5Net-(U14-EN)-●●◐--
R58_1HDMI_5V-●●◐--
R58_2HDMI0_SCL--●◐--
C44_1Net-(J6-CKS)--●◐--
C44_2GND-●●◐--
R29_1+5V●●●◐--
R29_2Net-(U14-EN)●●●◐--
C43_1HDMI_5V-●●◐--
C43_2GND-●●◐--
D12_1HDMI0_D2_P----●◐
D12_2HDMI0_D2_N----●◐
D12_3GND-●--●◐
D12_4HDMI0_D1_P----●◐
D12_5HDMI0_D1_N----●◐
D12_6HDMI0_D1_N----●◐
D12_7HDMI0_D1_P----●◐
D12_8GND-●--●◐
D12_9HDMI0_D2_N----●◐
D12_10HDMI0_D2_P----●◐
D15_1HDMI0_HOTPLUG----●◐
D15_2HDMI0_SDA----●◐
D15_3GND-●--●◐
D15_4HDMI0_SCL----●◐
D15_5HDMI0_CEC----●◐
D15_6HDMI0_CEC----●◐
D15_7HDMI0_SCL----●◐
D15_8GND-●--●◐
D15_9HDMI0_SDA----●◐
D15_10HDMI0_HOTPLUG----●◐
R5_1HDMI_5V-●●◐--
R5_2HDMI0_SDA--●◐--
R30_1Net-(J6-CKS)--●◐--
R30_2GND-●●◐--
C42_1Net-(U14-EN)-●●◐--
C42_2GND-●●◐--
D13_1HDMI0_D0_P----●◐
D13_2HDMI0_D0_N----●◐
D13_3GND-●--●◐
D13_4HDMI0_CK_P----●◐
D13_5HDMI0_CK_N----●◐
D13_6HDMI0_CK_N----●◐
D13_7HDMI0_CK_P----●◐
D13_8GND-●--●◐
D13_9HDMI0_D0_N----●◐
D13_10HDMI0_D0_P----●◐
J6_1HDMI0_D2_P------
J6_2Net-(J6-CKS)------
J6_3HDMI0_D2_N------
J6_4HDMI0_D1_P------
J6_5Net-(J6-CKS)------
J6_6HDMI0_D1_N------
J6_7HDMI0_D0_P------
J6_8Net-(J6-CKS)------
J6_9HDMI0_D0_N------
J6_10HDMI0_CK_P------
J6_11Net-(J6-CKS)------
J6_12HDMI0_CK_N------
J6_13HDMI0_CEC------
J6_15HDMI0_SCL------
J6_16HDMI0_SDA------
J6_17GND-●----
J6_18HDMI_5V-●----
J6_19HDMI0_HOTPLUG------
J6_SHNet-(J6-CKS)------
D4_1+5V-●●◐--
D4_2Net-(D4-A)--●◐--
Q5_1RELAY1-●●◐--
Q5_2GND-●●◐--
Q5_3Net-(D4-A)--●◐--
J3_1RELAY1_NO------
J3_2RELAY1_NO------
J3_3RELAY1_COM------
J3_4RELAY1_COM------
J3_5RELAY1_NC------
J3_6RELAY1_NC------
R11_1RELAY1●●●◐--
R11_2GND●●●◐--
K1_1+5V-●----
K1_5RELAY1_NO------
K1_6RELAY1_COM------
K1_7RELAY1_NC------
K1_8Net-(D4-A)------

14.11 PCOLA/SOQ Testability

PCOLA/SOQ scores how well the configured test methods cover each component and each connection. PCOLA evaluates five device-level properties: Presence, Correctness, Orientation, Live (functional), and Alignment. SOQ evaluates three connection-level properties: Shorts detection, Opens detection, and solder joint Quality. Scores are on a 0–100,000 scale where 100,000 means every property is fully covered. The Combined score is the average of PCOLA and SOQ.

14.11.1 Coverage by Test Method

P=Presence C=Correctness O=Orientation L=Live A=Alignment | S=Shorts O(pins)=Opens Q=Quality

PCOLA/SOQ coverage scores by test method. Scores: 0 (None), 0.5 (Partial), 1.0 (Full).
Test MethodPCOLASOpensSolder Quality
Electrical Test55.6%17.2%0.0%1.6%0.0%29.1%13.6%0.0%
Optical Inspection (AOI)94.6%15.6%55.1%0.0%45.7%28.0%28.0%28.0%
X-Ray Inspection (AXI)0.0%0.0%0.0%0.0%1.6%6.0%6.0%6.0%
Combined97.0%32.8%55.1%1.6%47.3%40.8%42.0%34.1%

14.11.2 PCB Device/Pin Count

Devices (PCOLA): 186
Pins (SOQ): 920

14.11.3 Board-Level Scores

Board-Level Coverage (0 – 100,000 scale)
DimensionScoreCoverage
PCOLA46779 / 100,00046.8%
SOQ38967 / 100,00039.0%
Combined42873 / 100,00042.9%
Electrical vs Inspection
SourcePCOLA ScoreSOQ Score
Electrical Test14898 / 100,00014221 / 100,000
Optical/X-ray Inspection42527 / 100,00034076 / 100,000
Combined (max)46779 / 100,00038967 / 100,000

14.11.4 PCOLA (186 devices)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0) — = N/A (excluded)
* Footprint not IPC-7351B/7251 compliant — no inspection coverage scored

Score ⇅RefDes ⇅Type / Footprint ⇅Class ⇅P ⇅C ⇅O ⇅L ⇅A ⇅Method ⇅
80%U19HUSB238 / WDFN-10-1EP_3x3mm_P0.5mm_EP1.8x2.5mmIC●●●◐◐AOI, AXI, LSSI, Powered_Off
70%U5TXS0108E / TSSOP-20_4.4x6.5mm_P0.65mmIC●●●○◐AOI, Powered_Off
70%Q3BSS84AK,215 / SOT-23Transistor●●●○◐AOI, Powered_Off
70%J4RJ45-POE_ARJM11D7-009-AB-EW2 / RJ45-POE_ARJM11D7-009Connector●●●—◐AOI, Powered_Off
70%Q12N7002W / SOT-323_SC-70Transistor●●●○◐AOI, Powered_Off
70%U13RT9742QGJ5 / TSOT-23-5IC●●●○◐AOI, Powered_Off
70%U774LVC1G17DCK3 / SOT-353_SC-70-5IC●●●○◐AOI, Powered_Off
70%U6TXB0108PW / TSSOP-20_4.4x6.5mm_P0.65mmIC●●●○◐AOI, Powered_Off
70%U9LAN9512i / QFN-64-1EP_9x9mm_P0.5mm_EP7.3x7.3mmIC●●●○◐AOI, AXI, Powered_Off
70%U4TXS0108E / TSSOP-20_4.4x6.5mm_P0.65mmIC●●●○◐AOI, Powered_Off
70%Q62N7002W / SOT-323_SC-70Transistor●●●○◐AOI, Powered_Off
70%Q7AONR21307 / DFN-8_FET_3x3mm [DFN]Transistor●●●○◐AOI, AXI, Powered_Off
70%J2S2G20C_02x20 / PinHeader_2x20_P2.54mm_VerticalConnector●●●—◐AOI, Powered_Off
70%U3TXS0108E / TSSOP-20_4.4x6.5mm_P0.65mmIC●●●○◐AOI, Powered_Off
70%U11RT9742QGJ5 / TSOT-23-5IC●●●○◐AOI, Powered_Off
70%U12RT9742QGJ5 / TSOT-23-5IC●●●○◐AOI, Powered_Off
70%J1S1G20_01x03 / PinHeader_1x03_P2.54mm_VerticalConnector●●●—◐AOI, Powered_Off
70%U8RT9742QGJ5 / TSOT-23-5IC●●●○◐AOI, Powered_Off
70%J8USB_A_2x_5787745-1 / TE_5787745-1Connector●●●—◐AOI, Powered_Off
70%U1093LC66AT-I / SOT-23-6IC●●●○◐AOI, Powered_Off
70%U14RT9742QGJ5 / TSOT-23-5IC●●●○◐AOI, Powered_Off
70%D12RClamp0524PA / SLP2510P8Diode●●●○◐AOI, AXI, Powered_Off
70%D15RClamp0524PA / SLP2510P8Diode●●●○◐AOI, AXI, Powered_Off
70%Q42N7002W / SOT-323_SC-70Transistor●●●○◐AOI, Powered_Off
70%U16FSUSB42MUX / MSOP-10_3x3mm_P0.5mmIC●●●○◐AOI, Powered_Off
70%D13RClamp0524PA / SLP2510P8Diode●●●○◐AOI, AXI, Powered_Off
70%Q52N7002W / SOT-323_SC-70Transistor●●●○◐AOI, Powered_Off
70%Q22N7002W / SOT-323_SC-70Transistor●●●○◐AOI, Powered_Off
70%U20LMR14050 / HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm_ThermalViasIC●●●○◐AOI, Powered_Off
60%C4100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C4110u_16V / C_0805_2012MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C6100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C46100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C8100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R270R / R_0603_1608MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C7100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R443k3 / R_0603_1608MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C5447u_16V / C_1210_3225MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R500R / R_1206_3216MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C492u2_50V / C_1206_3216MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C5547u_16V / C_1210_3225MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R4815k / R_0603_1608MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R4751k / R_0603_1608MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R450R / R_1206_3216MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C9100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C201u0_10V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C371u0_10V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C5247u_16V / C_1210_3225MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C381u0_10V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C451u0_10V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C502u2_50V / C_1206_3216MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C5100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C5347u_16V / C_1210_3225MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R290R / R_0603_1608MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C43100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C10100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C12100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C42100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R433k3 / R_0603_1608MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
60%C11100n_25V / C_0603_1608MetricCapacitor●●◐—◐AOI, Passive_Meas, Powered_Off
60%R11100k / R_0603_1608MetricResistor●●◐—◐AOI, Passive_Meas, Powered_Off
40%C147u_16V / C_1210_3225MetricCapacitor●○◐—◐AOI, Powered_Off
40%C310u_10V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R80R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R21k / R_0603_1608MetricResistor●○◐—◐AOI
40%R71k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R147k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R530R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%C210u_10V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R100R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D2ESD9B3.3ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%D17ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R3710R / R_0603_1608MetricResistor●○◐—◐AOI
40%R461k5 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D20ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%C51100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI
40%R4182k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%C4822n_50V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%D16ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R420R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D22PDS760Q / D_POWERDI5Diode●○◐○◐AOI, Powered_Off
40%R491k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D18ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%D19ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%C471u_50V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R395k1 / R_0603_1608MetricResistor●○◐—◐AOI
40%R3851k / R_0603_1608MetricResistor●○◐—◐AOI
40%D230805_LED_GREEN / LED_0805_2012MetricDiode●○◐○◐AOI, Powered_Off
40%F1PTC_32V_5A_1206 / R_shunt_1206_3216MetricFuse●○◐—◐AOI
40%D210805_LED_GREEN / LED_0805_2012MetricDiode●○◐○◐AOI, Powered_Off
40%D25ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R335k1 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D24ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%D26ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R541M / R_1206_3216MetricResistor●○◐—◐AOI, Powered_Off
40%D27ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R3147k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R3547k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R321k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D28ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%D29ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%D30ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%C561n0_2kV / C_1206_3216MetricCapacitor●○◐—◐AOI, Powered_Off
40%D31ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R345k1 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D14ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%C401n0_2kV / C_1206_3216MetricCapacitor●○◐—◐AOI, Powered_Off
40%C1733p_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C2710n_50V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C1510n_50V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R22330R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R131M0 / R_0603_1608MetricResistor●○◐—◐AOI
40%R3649R9 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D60603_LED_RED / LED_0603_1608MetricDiode●○◐○◐AOI
40%R1210k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R241k5 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R251k5 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R5649R9 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R21330R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R2010R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R5749R9 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%C35100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C2310n_50V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%D70805_LED_GREEN / LED_0805_2012MetricDiode●○◐○◐AOI, Powered_Off
40%C25100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C36100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%D11PTVS5V0 / D_SOD-123WDiode●○◐○◐AOI, Powered_Off
40%R1712k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%C33100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C2610n_50V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C29100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%D10ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R1912k4 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%C31100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C1633p_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%FB10603_120R_2A / R_0603_1608MetricFerrite●○◐—◐AOI
40%C19100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R141k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%C241u0_10V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%D32ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%C28100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R2810k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R1510k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D34ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%FB20603_120R_2A / R_0603_1608MetricFerrite●○◐—◐AOI, Powered_Off
40%C30100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%D9ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%R1810k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D80805_LED_GREEN / LED_0805_2012MetricDiode●○◐○◐AOI, Powered_Off
40%R16825R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R23330R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D50805_LED_GREEN / LED_0805_2012MetricDiode●○◐○◐AOI, Powered_Off
40%C34100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C211u0_10V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%D33ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%C32100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C184u7_6V3 / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C3922n_50V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R261M / R_1206_3216MetricResistor●○◐—◐AOI, Powered_Off
40%C22100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%C13100n_25V / C_0603_1608MetricCapacitor●○◐—◐AOI, Powered_Off
40%R5549R9 / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D10805_LED_RED / LED_0805_2012MetricDiode●○◐○◐AOI, Powered_Off
40%R584k7 / R_0402_1005MetricResistor●○◐—◐AOI, Powered_Off
40%C441n0_2kV / C_1206_3216MetricCapacitor●○◐—◐AOI, Powered_Off
40%R590R / R_1206_3216MetricResistor●○◐—◐AOI, Powered_Off
40%R90R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R520R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R60R / R_1206_3216MetricResistor●○◐—◐AOI, Powered_Off
40%R54k7 / R_0402_1005MetricResistor●○◐—◐AOI, Powered_Off
40%R301M / R_1206_3216MetricResistor●○◐—◐AOI, Powered_Off
40%R4100k / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%R510R / R_0603_1608MetricResistor●○◐—◐AOI, Powered_Off
40%D41N4007FL / D_SOD-123FDiode●○◐○◐AOI, Powered_Off
40%D35ESD9B5.0ST5G / D_0402_1005Metric [SOD-923]Diode●○◐○◐AOI, Powered_Off
40%D30805_LED_RED / LED_0805_2012MetricDiode●○◐○◐AOI
20%U2RPi-CM4S_RA / SO_DIMM_200p_TE_1473149-4 *IC◐○○◐○LSSI, Powered_Off
10%S1PTS810 / MIKROSPINAC_PTS810 *Switch◐○○○○Powered_Off
10%L18u2_4A / L_IHLP2525CZ *Inductor◐○○—○Powered_Off
10%J9USB_C_USB2.0_1.6mm / GCT_USB4085-GF-A_REVA4 *Connector◐○○—○Powered_Off
10%J6685119134923 / 685119134923 *Connector◐○○—○Powered_Off
10%J5microSD_MEM2052-00-195-00-A / GCT_MEM2052-00-195-00-A *Connector◐○○—○Powered_Off
10%Y1FY2500117 / Crystal_SMD_5032-4Pin_5.0x3.2mm *Other◐○○○○Powered_Off
10%J7USB_C_USB2.0_1.6mm_Flag / GCT_USB4205-GF-A_REVA *Connector◐○○—○Powered_Off
10%K1IM03GR / Relay_2P2T_10x6mm_TE_IMxxG *Other◐○○○○Powered_Off
0%J3SVORK_45DEG_01x03_3.5MM / PC_1862055 *Connector○○○—○

14.11.5 SOQ (920 solder joints)

● = Full (1.0) ◐ = Partial (0.5) ○ = None (0)

Score ⇅Pin ⇅Net ⇅S ⇅O ⇅Q ⇅
67%U3_18GPIO3_EXT◐●◐
67%U5_16GPIO12_EXT◐●◐
67%D11_1SD_PWR◐●◐
67%D11_2GND◐●◐
67%U3_20GPIO2_EXT◐●◐
67%U5_17GPIO6_EXT◐●◐
67%U5_18GPIO5_EXT◐●◐
67%U4_15GPIO9_EXT◐●◐
67%U13_1SD_PWR◐●◐
67%U5_20GPIO7_EXT◐●◐
67%U4_16GPIO10_EXT◐●◐
67%U4_17GPIO24_EXT◐●◐
67%U4_18GPIO23_EXT◐●◐
67%R46_2GND◐●◐
67%U4_20GPIO22_EXT◐●◐
67%R48_13V3FB◐●◐
67%R48_2GND◐●◐
67%R46_1Net-(D21-K)◐●◐
67%U6_18GPIO21_EXT◐●◐
67%D27_2USB_OTG_2_P◐●◐
67%U4_12GPIO8_EXT◐●◐
67%U6_20GPIO20_EXT◐●◐
67%U4_13GPIO11_EXT◐●◐
67%U4_14GPIO25_EXT◐●◐
67%U5_12GPIO26_EXT◐●◐
67%U5_13GPIO16_EXT◐●◐
67%R11_2GND◐●◐
67%R11_1RELAY1◐●◐
67%R29_2Net-(U14-EN)◐●◐
67%R29_1+5V◐●◐
67%U14_1HDMI_5V◐●◐
67%R26_2GND◐●◐
67%R26_1Earth◐●◐
67%D8_25V_OTG_2◐●◐
67%D8_1Net-(D8-K)◐●◐
67%D7_25V_OTG_1◐●◐
67%D7_1Net-(D7-K)◐●◐
67%U9_56LAN1_TXN◐●◐
67%R27_1Net-(U13-VIN)◐●◐
67%R27_2+3V3◐●◐
67%U9_55LAN1_TXP◐●◐
67%U9_53LAN1_RXN◐●◐
67%U9_52LAN1_RXP◐●◐
67%U9_4USB_OTG_2_P◐●◐
67%U9_3USB_OTG_2_N◐●◐
67%U9_2USB_OTG_1_P◐●◐
67%U9_1USB_OTG_1_N◐●◐
67%R25_2GND◐●◐
67%R25_1Net-(D8-K)◐●◐
67%R24_2GND◐●◐
67%R24_1Net-(D7-K)◐●◐
67%U9_22nSPD_LAN1◐●◐
67%U9_21nLNKA_LAN1◐●◐
67%R52_1CM4_SDA0◐●◐
67%R52_2Net-(U2-GPIO0)◐●◐
67%D31_25V_OTG_2◐●◐
67%D31_1GND◐●◐
67%D30_25V_OTG_1◐●◐
67%D30_1GND◐●◐
67%D29_2USB_OTG_2_N◐●◐
67%D29_1GND◐●◐
67%D28_2USB_OTG_1_N◐●◐
67%D28_1GND◐●◐
67%R35_2GND◐●◐
67%R35_1USB_BOOT_VBUS◐●◐
67%D27_1GND◐●◐
67%R54_2GND◐●◐
67%R54_1Net-(J7-SHIELD)◐●◐
67%D26_2USB_OTG_1_P◐●◐
67%D26_1GND◐●◐
67%D25_2USB_BOOT_VBUS◐●◐
67%D25_1GND◐●◐
67%R50_2+3V3◐●◐
67%R50_1Net-(C52-Pad1)◐●◐
67%D21_2+5V◐●◐
67%D21_1Net-(D21-K)◐●◐
67%D23_2Net-(D23-A)◐●◐
67%D23_1GND◐●◐
67%R44_2CM4_SDA0◐●◐
67%R44_1+3V3◐●◐
67%U19_7CM4_SCL0◐●◐
67%U19_6CM4_SDA0◐●◐
67%R43_2CM4_SCL0◐●◐
67%R43_1+3V3◐●◐
67%R45_2+5V◐●◐
67%R45_1Net-(Q7-D)◐●◐
67%R47_23V3FB◐●◐
67%R47_1Net-(C52-Pad1)◐●◐
67%R49_2Net-(D23-A)◐●◐
67%R49_1Net-(C52-Pad1)◐●◐
67%U20_8Net-(D22-K)◐●◐
67%U20_53V3FB◐●◐
67%R1_1Net-(J1-Pin_2)◐●◐
67%R1_2GND◐●◐
67%R53_1CM4_SCL0◐●◐
67%R53_2Net-(U2-GPIO1)◐●◐
67%U5_14GPIO19_EXT◐●◐
67%U5_15GPIO13_EXT◐●◐
67%U3_12GPIO27_EXT◐●◐
67%U3_13GPIO18_EXT◐●◐
67%U3_14GPIO17_EXT◐●◐
67%U3_15GPIO15_EXT◐●◐
67%U3_16GPIO14_EXT◐●◐
67%U3_17GPIO4_EXT◐●◐
50%D35_1GND◐◐◐
50%D35_2SD_CLK◐◐◐
50%D10_1GND◐◐◐
50%D10_2SD_DAT1◐◐◐
50%C41_1SD_PWR◐◐◐
50%C41_2GND◐◐◐
50%U13_2GND◐◐◐
50%U13_3◐◐◐
50%U13_4SD_VDD◐◐◐
50%U13_5Net-(U13-VIN)◐◐◐
50%D32_1GND◐◐◐
50%D32_2SD_DAT2◐◐◐
50%R28_1Net-(U13-VIN)◐◐◐
50%R28_2SD_VDD◐◐◐
50%C23_1VDD18CORE_LAN1◐◐◐
50%C23_2GND◐◐◐
50%C25_13V3_LAN1◐◐◐
50%C25_2GND◐◐◐
50%C36_1VDD33A_LAN1◐◐◐
50%C36_2GND◐◐◐
50%C20_1+3V3◐◐◐
50%C20_2GND◐◐◐
50%R17_1GND◐◐◐
50%R17_2Net-(U9B-USBRBIAS)◐◐◐
50%C33_1VDD33A_LAN1◐◐◐
50%C33_2GND◐◐◐
50%C26_1VDD18CORE_LAN1◐◐◐
50%D34_1GND◐◐◐
50%D34_2SD_CMD◐◐◐
50%D9_1GND◐◐◐
50%D9_2SD_DAT0◐◐◐
50%C46_1Net-(U13-VIN)◐◐◐
50%C46_2GND◐◐◐
50%D33_1GND◐◐◐
50%D33_2SD_DAT3◐◐◐
50%D1_1Net-(D1-K)◐◐◐
50%D1_2+3V3◐◐◐
50%R59_1+BATT◐◐◐
50%R59_2+3V3◐◐◐
50%J1_1USB_BOOT_VBUS◐◐◐
50%J1_2Net-(J1-Pin_2)◐◐◐
50%J1_3GND◐◐◐
50%R9_1Net-(C1-Pad1)◐◐◐
50%R9_2Net-(R9-Pad2)◐◐◐
50%C26_2GND◐◐◐
50%C29_1VDD33A_LAN1◐◐◐
50%C29_2GND◐◐◐
50%C37_1+5V◐◐◐
50%R6_1+3V3◐◐◐
50%R6_2Net-(C1-Pad1)◐◐◐
50%R4_1+3V3◐◐◐
50%R4_2RUN◐◐◐
50%R51_1USB_OTGID◐◐◐
50%R51_2GND◐◐◐
50%Q4_1HDMI0_HOTPLUG◐◐◐
50%Q4_2GND◐◐◐
50%Q4_3Net-(Q4-D)◐◐◐
50%D2_1GND◐◐◐
50%D2_2RUN◐◐◐
50%D3_1Net-(D3-K)◐◐◐
50%D3_2Net-(D3-A)◐◐◐
50%C1_1Net-(C1-Pad1)◐◐◐
50%C1_2GND◐◐◐
50%Q2_1EMMC_EN_N_1V8◐◐◐
50%Q2_2GND◐◐◐
50%Q2_3Net-(Q1-S)◐◐◐
50%C3_1Net-(C3-Pad1)◐◐◐
50%C3_2GND◐◐◐
50%R8_1+3V3◐◐◐
50%R8_2Net-(C2-Pad1)◐◐◐
50%Q3_1RUN◐◐◐
50%Q3_2+3V3◐◐◐
50%Q3_3Net-(D3-A)◐◐◐
50%R2_1Net-(D1-K)◐◐◐
50%R2_2Net-(Q1-S)◐◐◐
50%R7_1Net-(D3-K)◐◐◐
50%R7_2GND◐◐◐
50%C37_2GND◐◐◐
50%R19_1GND◐◐◐
50%U2_3Net-(U2-GPIO0)◐●○
50%R19_2Net-(U9B-EXRES)◐◐◐
50%U2_5Net-(U2-GPIO1)◐●○
50%C31_1VDD33A_LAN1◐◐◐
50%C31_2GND◐◐◐
50%C16_1Net-(U9A-XO)◐◐◐
50%C16_2GND◐◐◐
50%FB1_1Net-(U9A-VDD18ETHPLL)◐◐◐
50%FB1_2Net-(U9A-VDD18USBPLL)◐◐◐
50%C19_13V3_LAN1◐◐◐
50%C19_2GND◐◐◐
50%R14_1Net-(D5-K)◐◐◐
50%R14_2GND◐◐◐
50%C24_1Net-(U9A-VDD18USBPLL)◐◐◐
50%C24_2GND◐◐◐
50%U11_15V_OTG_1◐◐◐
50%U11_2GND◐◐◐
50%U11_3◐◐◐
50%U11_4PRTCTL2_OTG_1◐◐◐
50%U11_5+5V◐◐◐
50%C28_13V3_LAN1◐◐◐
50%C28_2GND◐◐◐
50%C38_1+5V◐◐◐
50%C38_2GND◐◐◐
50%R15_1EECS_LAN1◐◐◐
50%U2_28RELAY1◐●○
50%R15_2GND◐◐◐
50%U12_15V_OTG_2◐◐◐
50%U12_2GND◐◐◐
50%U3_3GPIO3◐◐◐
50%U12_3◐◐◐
50%U2_34Net-(U2-GPIO30)◐●○
50%U12_4PRTCTL3_OTG_2◐◐◐
50%U2_36Net-(U2-GPIO31)◐●○
50%U12_5+5V◐◐◐
50%FB2_1VDD33A_LAN1◐◐◐
50%FB2_23V3_LAN1◐◐◐
50%C30_1VDD33A_LAN1◐◐◐
50%C30_2GND◐◐◐
50%U8_13V3_LAN1◐◐◐
50%U8_2GND◐◐◐
50%U8_3◐◐◐
50%U8_4LAN1_EN◐◐◐
50%U2_46Net-(U2-GPIO32)◐●○
50%U8_5+3V3◐◐◐
50%U2_48Net-(U2-GPIO33)◐●○
50%R18_13V3_LAN1◐◐◐
50%R18_2Net-(U9B-AUTOMDIX_EN)◐◐◐
50%R16_13V3_LAN1◐◐◐
50%U2_52Net-(U2-GPIO34)◐●○
50%R16_2Net-(U9B-VBUS_DET)◐◐◐
50%U2_54Net-(U2-GPIO35)◐●○
50%R23_1VDD33A_LAN1◐◐◐
50%R23_2Net-(D6-A)◐◐◐
50%D5_23V3_LAN1◐◐◐
50%U2_58Net-(U2-GPIO36)◐●○
50%C34_1VDD33A_LAN1◐◐◐
50%U2_60Net-(U2-GPIO37)◐●○
50%C34_2GND◐◐◐
50%C21_1Net-(U9A-VDD18ETHPLL)◐◐◐
50%C21_2GND◐◐◐
50%U2_64Net-(U2-GPIO38)◐●○
50%U10_1EEDI_LAN1◐◐◐
50%U2_66Net-(U2-GPIO39)◐●○
50%U10_2GND◐◐◐
50%U10_3EEDO_LAN1◐◐◐
50%U10_4EECLK_LAN1◐◐◐
50%U2_70Net-(U2-GPIO40)◐●○
50%U10_5EECS_LAN1◐◐◐
50%U2_72Net-(U2-GPIO41)◐●○
50%U10_63V3_LAN1◐◐◐
50%C32_1VDD33A_LAN1◐◐◐
50%C32_2GND◐◐◐
50%U2_76Net-(U2-GPIO42)◐●○
50%C18_1VDD18CORE_LAN1◐◐◐
50%U2_78Net-(U2-GPIO43)◐●○
50%C18_2GND◐◐◐
50%C39_1Net-(C39-Pad1)◐◐◐
50%C39_2GND◐◐◐
50%U2_82Net-(U2-GPIO44)◐●○
50%C22_13V3_LAN1◐◐◐
50%U2_84Net-(U2-GPIO45)◐●○
50%C22_2GND◐◐◐
50%C13_13V3_LAN1◐◐◐
50%C13_2GND◐◐◐
50%R55_1VDD33A_LAN1◐◐◐
50%R55_2LAN1_TXP◐◐◐
50%U14_2GND◐◐◐
50%U14_3◐◐◐
50%U14_4Net-(U14-EN)◐◐◐
50%U14_5Net-(U14-EN)◐◐◐
50%R58_1HDMI_5V◐◐◐
50%R58_2HDMI0_SCL◐◐◐
50%C44_1Net-(J6-CKS)◐◐◐
50%C44_2GND◐◐◐
50%C43_1HDMI_5V◐◐◐
50%C43_2GND◐◐◐
50%D12_1HDMI0_D2_P◐◐◐
50%D12_2HDMI0_D2_N◐◐◐
50%D12_3GND◐◐◐
50%D12_4HDMI0_D1_P◐◐◐
50%D12_5HDMI0_D1_N◐◐◐
50%D12_6HDMI0_D1_N◐◐◐
50%D12_7HDMI0_D1_P◐◐◐
50%D12_8GND◐◐◐
50%D12_9HDMI0_D2_N◐◐◐
50%D12_10HDMI0_D2_P◐◐◐
50%D15_1HDMI0_HOTPLUG◐◐◐
50%D15_2HDMI0_SDA◐◐◐
50%D15_3GND◐◐◐
50%D15_4HDMI0_SCL◐◐◐
50%D15_5HDMI0_CEC◐◐◐
50%D15_6HDMI0_CEC◐◐◐
50%D15_7HDMI0_SCL◐◐◐
50%D15_8GND◐◐◐
50%D15_9HDMI0_SDA◐◐◐
50%D15_10HDMI0_HOTPLUG◐◐◐
50%R5_1HDMI_5V◐◐◐
50%R5_2HDMI0_SDA◐◐◐
50%R30_1Net-(J6-CKS)◐◐◐
50%R30_2GND◐◐◐
50%C42_1Net-(U14-EN)◐◐◐
50%C42_2GND◐◐◐
50%D13_1HDMI0_D0_P◐◐◐
50%D13_2HDMI0_D0_N◐◐◐
50%D13_3GND◐◐◐
50%D13_4HDMI0_CK_P◐◐◐
50%D13_5HDMI0_CK_N◐◐◐
50%D13_6HDMI0_CK_N◐◐◐
50%D13_7HDMI0_CK_P◐◐◐
50%D13_8GND◐◐◐
50%D13_9HDMI0_D0_N◐◐◐
50%D13_10HDMI0_D0_P◐◐◐
50%D4_1+5V◐◐◐
50%D4_2Net-(D4-A)◐◐◐
50%Q5_1RELAY1◐◐◐
50%Q5_2GND◐◐◐
50%Q5_3Net-(D4-A)◐◐◐
50%C2_1Net-(C2-Pad1)◐◐◐
50%C2_2GND◐◐◐
50%R10_1Net-(C3-Pad1)◐◐◐
50%R10_2+3V3◐◐◐
50%Q1_1Net-(J1-Pin_2)◐◐◐
50%Q1_2Net-(Q1-S)◐◐◐
50%Q1_3EMMC_DISABLE_N◐◐◐
50%C5_1+3V3◐◐◐
50%C5_2GND◐◐◐
50%J2_1+3V3◐◐◐
50%J2_2+5V◐◐◐
50%J2_3GPIO2_EXT◐◐◐
50%J2_4+5V◐◐◐
50%J2_5GPIO3_EXT◐◐◐
50%J2_6GND◐◐◐
50%J2_7GPIO4_EXT◐◐◐
50%J2_8GPIO14_EXT◐◐◐
50%J2_9GND◐◐◐
50%J2_10GPIO15_EXT◐◐◐
50%J2_11GPIO17_EXT◐◐◐
50%J2_12GPIO18_EXT◐◐◐
50%J2_13GPIO27_EXT◐◐◐
50%J2_14GND◐◐◐
50%J2_15GPIO22_EXT◐◐◐
50%J2_16GPIO23_EXT◐◐◐
50%J2_17+3V3◐◐◐
50%J2_18GPIO24_EXT◐◐◐
50%J2_19GPIO10_EXT◐◐◐
50%J2_20GND◐◐◐
50%J2_21GPIO9_EXT◐◐◐
50%J2_22GPIO25_EXT◐◐◐
50%J2_23GPIO11_EXT◐◐◐
50%J2_24GPIO8_EXT◐◐◐
50%J2_25GND◐◐◐
50%J2_26GPIO7_EXT◐◐◐
50%J2_27ID_SD◐◐◐
50%J2_28ID_SC◐◐◐
50%J2_29GPIO5_EXT◐◐◐
50%J2_30GND◐◐◐
50%J2_31GPIO6_EXT◐◐◐
50%J2_32GPIO12_EXT◐◐◐
50%J2_33GPIO13_EXT◐◐◐
50%J2_34GND◐◐◐
50%J2_35GPIO19_EXT◐◐◐
50%J2_36GPIO16_EXT◐◐◐
50%J2_37GPIO26_EXT◐◐◐
50%J2_38GPIO20_EXT◐◐◐
50%J2_39GND◐◐◐
50%J2_40GPIO21_EXT◐◐◐
50%C10_1+3V3◐◐◐
50%C10_2GND◐◐◐
50%C12_1+5V◐◐◐
50%C12_2GND◐◐◐
50%U3_1GPIO2◐◐◐
50%U3_2+3V3◐◐◐
50%U3_4GPIO4◐◐◐
50%U3_5GPIO14◐◐◐
50%U3_6GPIO15◐◐◐
50%U3_7GPIO17◐◐◐
50%U3_8GPIO18◐◐◐
50%U3_9GPIO27◐◐◐
50%U3_10OUTPUT_EN◐◐◐
50%U3_11GND◐◐◐
50%U3_19+5V◐◐◐
50%C11_1+3V3◐◐◐
50%C11_2GND◐◐◐
50%C9_1+5V◐◐◐
50%C9_2GND◐◐◐
50%C4_1+3V3◐◐◐
50%C4_2GND◐◐◐
50%U5_1GPIO7◐◐◐
50%U5_2+3V3◐◐◐
50%U5_3GPIO5◐◐◐
50%U5_4GPIO6◐◐◐
50%U5_5GPIO12◐◐◐
50%U5_6GPIO13◐◐◐
50%U5_7GPIO19◐◐◐
50%U5_8GPIO16◐◐◐
50%U5_9GPIO26◐◐◐
50%U5_10OUTPUT_EN◐◐◐
50%U5_11GND◐◐◐
50%U5_19+5V◐◐◐
50%U7_1◐◐◐
50%U7_2RUN◐◐◐
50%U7_3GND◐◐◐
50%U7_4OUTPUT_EN◐◐◐
50%U7_5+3V3◐◐◐
50%U6_1GPIO20◐◐◐
50%U6_2+3V3◐◐◐
50%U6_3GPIO21◐◐◐
50%U6_4Net-(U6-A3)◐◐◐
50%U6_5Net-(U6-A4)◐◐◐
50%U6_6Net-(U6-A5)◐◐◐
50%U6_7Net-(U6-A6)◐◐◐
50%U6_8Net-(U6-A7)◐◐◐
50%U6_9Net-(U6-A8)◐◐◐
50%U6_10OUTPUT_EN◐◐◐
50%U6_11GND◐◐◐
50%U6_12Net-(U6-B8)◐◐◐
50%U6_13Net-(U6-B7)◐◐◐
50%U6_14Net-(U6-B6)◐◐◐
50%U6_15Net-(U6-B5)◐◐◐
50%U6_16Net-(U6-B4)◐◐◐
50%U6_17Net-(U6-B3)◐◐◐
50%U6_19+5V◐◐◐
50%U4_1GPIO22◐◐◐
50%U4_2+3V3◐◐◐
50%U4_3GPIO23◐◐◐
50%U4_4GPIO24◐◐◐
50%U4_5GPIO10◐◐◐
50%U4_6GPIO9◐◐◐
50%U4_7GPIO25◐◐◐
50%U4_8GPIO11◐◐◐
50%U4_9GPIO8◐◐◐
50%U4_10OUTPUT_EN◐◐◐
50%U4_11GND◐◐◐
50%U4_19+5V◐◐◐
50%C6_1+3V3◐◐◐
50%C6_2GND◐◐◐
50%C8_1+5V◐◐◐
50%C8_2GND◐◐◐
50%C7_1+5V◐◐◐
50%C7_2GND◐◐◐
50%D17_1GND◐◐◐
50%D17_2Net-(D17-A2)◐◐◐
50%C54_1Net-(C52-Pad1)◐◐◐
50%C54_2GND◐◐◐
50%R37_1Net-(Q7-S1)◐◐◐
50%R37_2Net-(U19-VIN)◐◐◐
50%C49_1+5V◐◐◐
50%C49_2GND◐◐◐
50%D20_1GND◐◐◐
50%D20_2USB_D-◐◐◐
50%C51_1Net-(U20-BOOT)◐◐◐
50%C51_2Net-(D22-K)◐◐◐
50%R41_1Net-(U20-RT/SYNC)◐◐◐
50%R41_2GND◐◐◐
50%C53_1Net-(C52-Pad1)◐◐◐
50%C53_2GND◐◐◐
50%D5_1Net-(D5-K)◐◐◐
50%U20_2+5V◐◐◐
50%U20_3+5V◐◐◐
50%U20_4Net-(U20-RT/SYNC)◐◐◐
50%U20_6Net-(U20-SS)◐◐◐
50%U20_7GND◐◐◐
50%U20_9GND◐◐◐
50%C50_1+5V◐◐◐
50%C50_2GND◐◐◐
50%C48_1Net-(U20-SS)◐◐◐
50%C48_2GND◐◐◐
50%D16_1GND◐◐◐
50%D16_2Net-(D16-A2)◐◐◐
50%R42_1Net-(U19-VSET)◐◐◐
50%R42_2GND◐◐◐
50%D22_1Net-(D22-K)◐◐◐
50%D22_2GND◐◐◐
50%D22_3GND◐◐◐
50%L1_1Net-(D22-K)◐●○
50%L1_2Net-(C52-Pad1)◐●○
50%D18_1GND◐◐◐
50%D18_2Net-(D18-A2)◐◐◐
50%D19_1GND◐◐◐
50%D19_2USB_D+◐◐◐
50%C47_1Net-(U19-VIN)◐◐◐
50%C47_2GND◐◐◐
50%U19_1Net-(U19-VIN)◐◐◐
50%U19_2USB_D+◐◐◐
50%U19_3USB_D-◐◐◐
50%U19_4Net-(D16-A2)◐◐◐
50%U19_5Net-(D17-A2)◐◐◐
50%U19_8Net-(U19-VSET)◐◐◐
50%U19_9Net-(U19-ISET)◐◐◐
50%U19_10Net-(U19-GATE)◐◐◐
50%U19_11GND◐◐◐
50%R39_1Net-(Q7-G)◐◐◐
50%R39_2Net-(U19-GATE)◐◐◐
50%C52_1Net-(C52-Pad1)◐◐◐
50%C52_2GND◐◐◐
50%R38_1Net-(Q7-S1)◐◐◐
50%R38_2Net-(Q7-G)◐◐◐
50%F1_1Net-(D18-A2)◐◐◐
50%F1_2Net-(Q7-S1)◐◐◐
50%Q7_1Net-(Q7-S1)◐◐◐
50%Q7_2Net-(Q7-S1)◐◐◐
50%Q7_3Net-(Q7-S1)◐◐◐
50%Q7_4Net-(Q7-G)◐◐◐
50%Q7_5Net-(Q7-D)◐◐◐
50%C55_1Net-(C52-Pad1)◐◐◐
50%C55_2GND◐◐◐
50%R33_1Net-(J7-CC1)◐◐◐
50%R33_2GND◐◐◐
50%D24_1GND◐◐◐
50%D24_2USB_BOOT_P◐◐◐
50%U20_1Net-(U20-BOOT)◐◐◐
50%R31_1+3V3◐◐◐
50%R31_2Net-(Q6-D)◐◐◐
50%C45_1+3V3◐◐◐
50%C45_2GND◐◐◐
50%R32_1Net-(Q6-G)◐◐◐
50%R32_2USB_BOOT_VBUS◐◐◐
50%U16_1+3V3◐◐◐
50%U16_2Net-(Q6-D)◐◐◐
50%U16_3USB_P◐◐◐
50%U16_4USB_N◐◐◐
50%U16_5GND◐◐◐
50%U16_6USB_BOOT_N◐◐◐
50%U16_7USB_BOOT_P◐◐◐
50%U16_8USB_LAN_N◐◐◐
50%U16_9USB_LAN_P◐◐◐
50%U16_10GND◐◐◐
50%C56_1Net-(J7-SHIELD)◐◐◐
50%C56_2GND◐◐◐
50%Q6_1Net-(Q6-G)◐◐◐
50%Q6_2GND◐◐◐
50%Q6_3Net-(Q6-D)◐◐◐
50%J8_15V_OTG_1◐◐◐
50%J8_2USB_OTG_1_N◐◐◐
50%J8_3USB_OTG_1_P◐◐◐
50%J8_4GND◐◐◐
50%J8_55V_OTG_2◐◐◐
50%J8_6USB_OTG_2_N◐◐◐
50%J8_7USB_OTG_2_P◐◐◐
50%J8_8GND◐◐◐
50%J8_S1Net-(J7-SHIELD)◐◐◐
50%J8_S2Net-(J7-SHIELD)◐◐◐
50%J8_S3Net-(J7-SHIELD)◐◐◐
50%J8_S4Net-(J7-SHIELD)◐◐◐
50%R34_1Net-(J7-CC2)◐◐◐
50%R34_2GND◐◐◐
50%D14_1GND◐◐◐
50%D14_2USB_BOOT_N◐◐◐
50%C40_1Earth◐◐◐
50%C40_2GND◐◐◐
50%C17_1Net-(U9A-XI)◐◐◐
50%C17_2GND◐◐◐
50%U9_5VDD33A_LAN1◐◐◐
50%U9_10VDD33A_LAN1◐◐◐
50%U9_12nRESET_LAN1◐◐◐
50%U9_13◐◐◐
50%U9_15VDD18CORE_LAN1◐◐◐
50%U9_193V3_LAN1◐◐◐
50%U9_20nFDX_LAN1◐◐◐
50%U9_23EECLK_LAN1◐◐◐
50%U9_24EECS_LAN1◐◐◐
50%U9_25EEDO_LAN1◐◐◐
50%U9_26EEDI_LAN1◐◐◐
50%U9_273V3_LAN1◐◐◐
50%U9_283V3_LAN1◐◐◐
50%U9_293V3_LAN1◐◐◐
50%U9_303V3_LAN1◐◐◐
50%U9_31◐◐◐
50%U9_323V3_LAN1◐◐◐
50%U9_333V3_LAN1◐◐◐
50%U9_34GND◐◐◐
50%U9_35◐◐◐
50%U9_36◐◐◐
50%U9_37◐◐◐
50%U9_38VDD18CORE_LAN1◐◐◐
50%U9_393V3_LAN1◐◐◐
50%U9_403V3_LAN1◐◐◐
50%U9_42◐◐◐
50%U9_43◐◐◐
50%U9_44GND◐◐◐
50%U9_45◐◐◐
50%U9_463V3_LAN1◐◐◐
50%U9_47◐◐◐
50%U9_48Net-(U9A-VDD18ETHPLL)◐◐◐
50%U9_49VDD33A_LAN1◐◐◐
50%U9_51VDD33A_LAN1◐◐◐
50%U9_54VDD33A_LAN1◐◐◐
50%U9_57VDD33A_LAN1◐◐◐
50%U9_60Net-(U9A-XO)◐◐◐
50%U9_61Net-(U9A-XI)◐◐◐
50%U9_62Net-(U9A-VDD18USBPLL)◐◐◐
50%U9_64VDD33A_LAN1◐◐◐
50%U9_65GND◐◐◐
50%C27_1Net-(U9A-VDD18USBPLL)◐◐◐
50%C27_2GND◐◐◐
50%C15_1Net-(U9A-VDD18ETHPLL)◐◐◐
50%C15_2GND◐◐◐
50%R22_1VDD33A_LAN1◐◐◐
50%R22_2Net-(J4-LEDY_A)◐◐◐
50%J4_1LAN1_TXP◐◐◐
50%J4_2LAN1_TXN◐◐◐
50%J4_3LAN1_RXP◐◐◐
50%J4_4Net-(C39-Pad1)◐◐◐
50%J4_5Net-(C39-Pad1)◐◐◐
50%J4_6LAN1_RXN◐◐◐
50%J4_7◐◐◐
50%J4_8GND◐◐◐
50%J4_9Net-(J4-LEDG_A)◐◐◐
50%J4_10nLNKA_LAN1◐◐◐
50%J4_11Net-(J4-LEDY_A)◐◐◐
50%J4_12nSPD_LAN1◐◐◐
50%J4_13Earth◐◐◐
50%R13_1Net-(U9A-XO)◐◐◐
50%R13_2Net-(U9A-XI)◐◐◐
50%R36_1VDD33A_LAN1◐◐◐
50%R36_2LAN1_RXN◐◐◐
50%D6_1nFDX_LAN1◐◐◐
50%D6_2Net-(D6-A)◐◐◐
50%R12_13V3_LAN1◐◐◐
50%R12_2nRESET_LAN1◐◐◐
50%R56_1VDD33A_LAN1◐◐◐
50%R56_2LAN1_TXN◐◐◐
50%U9_6◐◐◐
50%U9_7◐◐◐
50%U9_8◐◐◐
50%U9_9◐◐◐
50%U9_11Net-(U9B-VBUS_DET)◐◐◐
50%U9_14PRTCTL2_OTG_1◐◐◐
50%U9_16PRTCTL3_OTG_2◐◐◐
50%U9_17◐◐◐
50%U9_18◐◐◐
50%U9_41Net-(U9B-AUTOMDIX_EN)◐◐◐
50%U9_50Net-(U9B-EXRES)◐◐◐
50%U9_58USB_LAN_N◐◐◐
50%U9_59USB_LAN_P◐◐◐
50%U9_63Net-(U9B-USBRBIAS)◐◐◐
50%R21_1VDD33A_LAN1◐◐◐
50%R21_2Net-(J4-LEDG_A)◐◐◐
50%R20_1VDD33A_LAN1◐◐◐
50%R20_2Net-(C39-Pad1)◐◐◐
50%R57_1VDD33A_LAN1◐◐◐
50%R57_2LAN1_RXP◐◐◐
50%C35_13V3_LAN1◐◐◐
50%C35_2GND◐◐◐
17%U2_20GND◐○○
17%U2_110GND◐○○
17%U2_55GND◐○○
17%J5_4SD_PWR◐○○
17%U2_56GND◐○○
17%J5_6GND◐○○
17%U2_127GND◐○○
17%U2_121GND◐○○
17%U2_61GND◐○○
17%J5_S1GND◐○○
17%J5_S2GND◐○○
17%J5_S3GND◐○○
17%J5_S4GND◐○○
17%S1_1GND◐○○
17%S1_2GND◐○○
17%U2_62GND◐○○
17%U2_97GND◐○○
17%U2_1GND◐○○
17%U2_98GND◐○○
17%U2_4SD_VDD◐○○
17%U2_6SD_VDD◐○○
17%U2_7GND◐○○
17%U2_8GND◐○○
17%U2_67GND◐○○
17%U2_68GND◐○○
17%U2_122GND◐○○
17%U2_128GND◐○○
17%U2_13GND◐○○
17%U2_14GND◐○○
17%U2_73GND◐○○
17%U2_74GND◐○○
17%U2_115GND◐○○
17%U2_116GND◐○○
17%U2_19GND◐○○
17%U2_195GND◐○○
17%U2_79GND◐○○
17%U2_80GND◐○○
17%U2_103GND◐○○
17%U2_104GND◐○○
17%U2_25GND◐○○
17%U2_26GND◐○○
17%U2_85GND◐○○
17%U2_86GND◐○○
17%U2_139GND◐○○
17%U2_31GND◐○○
17%U2_140GND◐○○
17%U2_133GND◐○○
17%U2_37GND◐○○
17%U2_134GND◐○○
17%U2_39Net-(C2-Pad1)◐○○
17%U2_40Net-(C2-Pad1)◐○○
17%U2_41Net-(C3-Pad1)◐○○
17%U2_42Net-(C3-Pad1)◐○○
17%U2_43GND◐○○
17%U2_44GND◐○○
17%U2_91GND◐○○
17%U2_92GND◐○○
17%U2_49GND◐○○
17%U2_50GND◐○○
17%U2_109GND◐○○
17%U2_163GND◐○○
17%J7_A9USB_BOOT_VBUS◐○○
17%J7_A12GND◐○○
17%U2_158GND◐○○
17%U2_157GND◐○○
17%J7_B1GND◐○○
17%J7_B4USB_BOOT_VBUS◐○○
17%U2_32GND◐○○
17%J7_B9USB_BOOT_VBUS◐○○
17%J7_B12GND◐○○
17%U2_164GND◐○○
17%J7_SHNet-(J7-SHIELD)◐○○
17%U2_152GND◐○○
17%U2_182GND◐○○
17%U2_181GND◐○○
17%U2_194Net-(C1-Pad1)◐○○
17%U2_193Net-(C1-Pad1)◐○○
17%U2_146GND◐○○
17%Y1_2GND◐○○
17%Y1_4GND◐○○
17%U2_145GND◐○○
17%U2_200+BATT◐○○
17%U2_151GND◐○○
17%U2_199+BATT◐○○
17%J9_A1GND◐○○
17%U2_192Net-(C1-Pad1)◐○○
17%U2_191Net-(C1-Pad1)◐○○
17%J9_A12GND◐○○
17%J9_B1GND◐○○
17%U2_170GND◐○○
17%U2_169GND◐○○
17%U2_188GND◐○○
17%U2_187GND◐○○
17%J9_B12GND◐○○
17%J9_S1GND◐○○
17%U2_198+BATT◐○○
17%U2_197+BATT◐○○
17%U2_196GND◐○○
17%J6_17GND◐○○
17%J6_18HDMI_5V◐○○
17%J7_A1GND◐○○
17%J7_A4USB_BOOT_VBUS◐○○
17%K1_1+5V◐○○
0%U2_89GPIO27○○○
0%U2_90EMMC_EN_N_1V8○○○
0%U2_93○○○
0%U2_94○○○
0%U2_95○○○
0%U2_96○○○
0%U2_99○○○
0%U2_100○○○
0%U2_101○○○
0%U2_102○○○
0%U2_105○○○
0%U2_107○○○
0%U2_108○○○
0%U2_111HDMI0_CK_N○○○
0%U2_112○○○
0%U2_113HDMI0_CK_P○○○
0%U2_114○○○
0%U2_117HDMI0_D0_N○○○
0%U2_118○○○
0%U2_119HDMI0_D0_P○○○
0%U2_120○○○
0%U2_123HDMI0_D1_N○○○
0%U2_124○○○
0%U2_125HDMI0_D1_P○○○
0%U2_126○○○
0%U2_129HDMI0_D2_N○○○
0%U2_130○○○
0%U2_131HDMI0_D2_P○○○
0%U2_132○○○
0%U2_135○○○
0%U2_136○○○
0%U2_137○○○
0%U2_138○○○
0%J5_1SD_DAT2○○○
0%J7_A6USB_BOOT_P○○○
0%J7_A7USB_BOOT_N○○○
0%J7_A8○○○
0%J5_2SD_DAT3○○○
0%U2_162○○○
0%U2_161○○○
0%U2_160○○○
0%J5_3SD_CMD○○○
0%J5_5SD_CLK○○○
0%U2_159○○○
0%J5_7SD_DAT0○○○
0%J5_8SD_DAT1○○○
0%U2_156○○○
0%U2_149○○○
0%U2_148○○○
0%J5_9○○○
0%S1_3RUN○○○
0%J7_B5Net-(J7-CC2)○○○
0%J7_B6USB_BOOT_P○○○
0%S1_4RUN○○○
0%J7_B7USB_BOOT_N○○○
0%J7_B8○○○
0%U2_2EMMC_DISABLE_N○○○
0%U2_9GPIO2○○○
0%U2_165USB_P○○○
0%U2_10SD_CLK○○○
0%U2_11GPIO3○○○
0%U2_155○○○
0%U2_154○○○
0%U2_153○○○
0%U2_12SD_CMD○○○
0%U2_15GPIO4○○○
0%U2_16SD_DAT0○○○
0%U2_106○○○
0%U2_17GPIO5○○○
0%U2_18SD_DAT1○○○
0%Y1_1Net-(U9A-XO)○○○
0%U2_147○○○
0%U2_21GPIO6○○○
0%U2_22SD_DAT2○○○
0%Y1_3Net-(U9A-XI)○○○
0%U2_23GPIO7○○○
0%U2_S2○○○
0%U2_180○○○
0%U2_179○○○
0%U2_24SD_DAT3○○○
0%U2_178○○○
0%U2_177RUN○○○
0%U2_176○○○
0%U2_S1○○○
0%U2_27GPIO8○○○
0%U2_29GPIO9○○○
0%U2_150○○○
0%U2_30LAN1_EN○○○
0%U2_144○○○
0%U2_143○○○
0%U2_33GPIO10○○○
0%U2_35GPIO11○○○
0%U2_175HDMI0_SCL○○○
0%U2_174○○○
0%U2_38○○○
0%J9_A4Net-(D18-A2)○○○
0%U2_173HDMI0_SDA○○○
0%U2_172○○○
0%J9_A5Net-(D16-A2)○○○
0%J9_A6USB_D+○○○
0%J9_A7USB_D-○○○
0%J9_A8○○○
0%J9_A9Net-(D18-A2)○○○
0%U2_45GPIO12○○○
0%U2_47GPIO13○○○
0%J9_B4Net-(D18-A2)○○○
0%J9_B5Net-(D17-A2)○○○
0%U2_190Net-(R9-Pad2)○○○
0%U2_171HDMI0_CEC○○○
0%U2_51GPIO14○○○
0%U2_53GPIO15○○○
0%U2_168USB_OTGID○○○
0%U2_189Net-(R9-Pad2)○○○
0%U2_57GPIO16○○○
0%U2_59GPIO17○○○
0%J9_B6USB_D+○○○
0%J9_B7USB_D-○○○
0%J9_B8○○○
0%J9_B9Net-(D18-A2)○○○
0%U2_63GPIO18○○○
0%U2_65GPIO19○○○
0%U2_69GPIO20○○○
0%U2_186○○○
0%U2_185○○○
0%U2_184○○○
0%U2_183○○○
0%U2_71GPIO21○○○
0%U2_75GPIO22○○○
0%J6_1HDMI0_D2_P○○○
0%J6_2Net-(J6-CKS)○○○
0%J6_3HDMI0_D2_N○○○
0%J6_4HDMI0_D1_P○○○
0%J6_5Net-(J6-CKS)○○○
0%J6_6HDMI0_D1_N○○○
0%J6_7HDMI0_D0_P○○○
0%J6_8Net-(J6-CKS)○○○
0%J6_9HDMI0_D0_N○○○
0%J6_10HDMI0_CK_P○○○
0%J6_11Net-(J6-CKS)○○○
0%J6_12HDMI0_CK_N○○○
0%J6_13HDMI0_CEC○○○
0%J6_14○○○
0%J6_15HDMI0_SCL○○○
0%J6_16HDMI0_SDA○○○
0%U2_77GPIO23○○○
0%U2_81GPIO24○○○
0%J6_19HDMI0_HOTPLUG○○○
0%J6_SHNet-(J6-CKS)○○○
0%U2_83GPIO25○○○
0%U2_167USB_N○○○
0%U2_166○○○
0%U2_87GPIO26○○○
0%J7_A5Net-(J7-CC1)○○○
0%J3_1RELAY1_NO○○○
0%J3_2RELAY1_NO○○○
0%J3_3RELAY1_COM○○○
0%J3_4RELAY1_COM○○○
0%J3_5RELAY1_NC○○○
0%J3_6RELAY1_NC○○○
0%U2_142○○○
0%U2_141○○○
0%U2_88Net-(Q4-D)○○○
0%K1_2○○○
0%K1_3○○○
0%K1_4○○○
0%K1_5RELAY1_NO○○○
0%K1_6RELAY1_COM○○○
0%K1_7RELAY1_NC○○○
0%K1_8Net-(D4-A)○○○

14.11.6 Scoring Matrix

PCOLA/SOQ scoring premises used for this analysis. Each cell shows the score assigned when a test method applies to a component or pin.

MethodPCOLASOpensQ
AOIFullFullFull—PartialPartialPartialPartial
AXI————PartialPartialPartialPartial
JTAG/BSCANFullFullFullPartial—FullFull—
BSCAN_PassivesFullFullFullFull—FullFull—
I2CPartialPartial—Partial—PartialPartial—
SPIPartialPartial—Partial—PartialPartial—
UART———Partial————
Passive_MeasFullFullFullFull—FullFull—
Powered_OffPartial————PartialFull—

15 Component Properties

Schematic library symbol quality analysis.

The datasheet link stored in the schematic was followed, and the document it returned was compared against the part number. The rows below are links that resolved to a document covering a different part - most often a sibling variant of the same family, where the specifications read as plausible but describe the wrong device.

15.2 Library Symbol Grades

Grading schematic library symbol quality based on pin electrical type definitions:

Grade Definitions
GradeRatingDescription
AExcellentHas Power pins AND properly typed I/O pins (>=90% typed)
BGood>=70% typed OR (>=50% typed AND has Power)
CFairMix of typed and Passive pins (>=40% typed)
DPoorMostly Passive with few typed pins (>=10% typed)
FFailAll pins Passive/Unknown (<10% typed, no ERC)
IC Library Symbol Grades (sorted worst to best)
RefDesGrdPinsPwrInOutIOOCOEHiZPasPart NumberCreator
U1-000000000LOGO_BENY_DEVICES
U10C61300001193LC66AT-I
U11C521001001RT9742QGJ5
U12C521001001RT9742QGJ5
U13C521001001RT9742QGJ5
U14C521001001RT9742QGJ5
U2C202736295400076RPi-CM4S_RA
U20C913300002LMR14050
U7C51110000274LVC1G17DCK3
U8C521001001RT9742QGJ5
U9C6552571600012LAN9512i
U19B1113051001HUSB238
U6B20210160001TXB0108PW
U16A1022060000FSUSB42MUX
U3A20310160000TXS0108E
U4A20310160000TXS0108E
U5A20310160000TXS0108E

15.2.1 Library Quality Summary

Total ICs evaluated17
Grade A (excellent)4 (23.5%)
Grade B (good)2 (11.8%)
Grade C (fair)10 (58.8%)
Grade D (poor)0 (0.0%)
Grade F (fail)0 (0.0%)
OVERALL LIBRARY QUALITYB (3.11/4.00)

15.3 Component Library Validation

Checking for generic/incomplete library symbols using statistical patterns.

Library Symbol Issues (8 symbols)
Library NameIndustry NamePart NumberRefDesPinsDistributionIssues
74LVC1G17DCK3SN74LVC1G17DCKR-U75P:2 Pwr:1 I:1 O:1 Power-named pins not typed as Power - library pin types incomplete [GND=Passive]
93LC66AT-I93LC66AT-I/OT-U106P:1 Pwr:1 I:3 HiZ:1 Power-named pins not typed as Power - library pin types incomplete [GND=Passive]
HUSB238HUSB238-U1911P:1 Pwr:1 Bi:5 I:3 OC:1 Power-named pins not typed as Power - library pin types incomplete [GND=Passive]
LAN9512iLAN9512I-JZX-U965P:12 Pwr:5 Bi:16 I:19 O:7 ?:6 Power-named pins not typed as Power - library pin types incomplete [VDD33A=Passive, VDD33IO=Passive, VDD33IO=Passive, VDD18CORE=Passive, VDD33IO=Passive, +8 more]
LMR14050LMR14050SDDA-U209P:2 Pwr:1 I:3 O:3 Power-named pins not typed as Power - library pin types incomplete [GND=Passive, SW=Output]
RPi-CM4S_RARPi-CM4S_RA-U2202P:76 Pwr:7 Bi:54 I:23 O:29 ?:13 Pin 1 (GND) at same location as pin 7 (GND); Pin 1 (GND) at same location as pin 8 (GND); Pin 1 (GND) at same location as pin 13 (GND); Pin 1 (GND) at same location as pin 14 (GND); Pin 1 (GND) at same location as pin 19 (GND); Pin 1 (GND) at same location as pin 20 (GND); Pin 1 (GND) at same location as pin 25 (GND); Pin 1 (GND) at same location as pin 26 (GND); Pin 1 (GND) at same location as pin 31 (GND); Pin 1 (GND) at same location as pin 32 (GND); Pin 1 (GND) at same location as pin 37 (GND); Pin 1 (GND) at same location as pin 43 (GND); Pin 1 (GND) at same location as pin 44 (GND); Pin 1 (GND) at same location as pin 49 (GND); Pin 1 (GND) at same location as pin 50 (GND); Pin 1 (GND) at same location as pin 55 (GND); Pin 1 (GND) at same location as pin 56 (GND); Pin 1 (GND) at same location as pin 61 (GND); Pin 1 (GND) at same location as pin 62 (GND); Pin 1 (GND) at same location as pin 67 (GND); Pin 1 (GND) at same location as pin 68 (GND); Pin 1 (GND) at same location as pin 73 (GND); Pin 1 (GND) at same location as pin 74 (GND); Pin 1 (GND) at same location as pin 79 (GND); Pin 1 (GND) at same location as pin 80 (GND); Pin 1 (GND) at same location as pin 85 (GND); Pin 1 (GND) at same location as pin 86 (GND); Pin 1 (GND) at same location as pin 91 (GND); Pin 1 (GND) at same location as pin 92 (GND); Pin 1 (GND) at same location as pin 97 (GND); Pin 1 (GND) at same location as pin 98 (GND); Pin 1 (GND) at same location as pin 103 (GND); Pin 1 (GND) at same location as pin 104 (GND); Pin 1 (GND) at same location as pin 109 (GND); Pin 1 (GND) at same location as pin 110 (GND); Pin 1 (GND) at same location as pin 115 (GND); Pin 1 (GND) at same location as pin 116 (GND); Pin 1 (GND) at same location as pin 121 (GND); Pin 1 (GND) at same location as pin 122 (GND); Pin 1 (GND) at same location as pin 127 (GND); Pin 1 (GND) at same location as pin 128 (GND); Pin 1 (GND) at same location as pin 133 (GND); Pin 1 (GND) at same location as pin 134 (GND); Pin 1 (GND) at same location as pin 139 (GND); Pin 1 (GND) at same location as pin 140 (GND); Pin 1 (GND) at same location as pin 145 (GND); Pin 1 (GND) at same location as pin 146 (GND); Pin 1 (GND) at same location as pin 151 (GND); Pin 1 (GND) at same location as pin 152 (GND); Pin 1 (GND) at same location as pin 157 (GND); Pin 1 (GND) at same location as pin 158 (GND); Pin 1 (GND) at same location as pin 163 (GND); Pin 1 (GND) at same location as pin 164 (GND); Pin 1 (GND) at same location as pin 169 (GND); Pin 1 (GND) at same location as pin 170 (GND); Pin 1 (GND) at same location as pin 181 (GND); Pin 1 (GND) at same location as pin 182 (GND); Pin 1 (GND) at same location as pin 187 (GND); Pin 1 (GND) at same location as pin 188 (GND); Pin 1 (GND) at same location as pin 195 (GND); Pin 1 (GND) at same location as pin 196 (GND); Pin 4 (SDX_VDD) at same location as pin 6 (SDX_VDD); Pin 7 (GND) at same location as pin 8 (GND); Pin 7 (GND) at same location as pin 13 (GND); Pin 7 (GND) at same location as pin 14 (GND); Pin 7 (GND) at same location as pin 19 (GND); Pin 7 (GND) at same location as pin 20 (GND); Pin 7 (GND) at same location as pin 25 (GND); Pin 7 (GND) at same location as pin 26 (GND); Pin 7 (GND) at same location as pin 31 (GND); Pin 7 (GND) at same location as pin 32 (GND); Pin 7 (GND) at same location as pin 37 (GND); Pin 7 (GND) at same location as pin 43 (GND); Pin 7 (GND) at same location as pin 44 (GND); Pin 7 (GND) at same location as pin 49 (GND); Pin 7 (GND) at same location as pin 50 (GND); Pin 7 (GND) at same location as pin 55 (GND); Pin 7 (GND) at same location as pin 56 (GND); Pin 7 (GND) at same location as pin 61 (GND); Pin 7 (GND) at same location as pin 62 (GND); Pin 7 (GND) at same location as pin 67 (GND); Pin 7 (GND) at same location as pin 68 (GND); Pin 7 (GND) at same location as pin 73 (GND); Pin 7 (GND) at same location as pin 74 (GND); Pin 7 (GND) at same location as pin 79 (GND); Pin 7 (GND) at same location as pin 80 (GND); Pin 7 (GND) at same location as pin 85 (GND); Pin 7 (GND) at same location as pin 86 (GND); Pin 7 (GND) at same location as pin 91 (GND); Pin 7 (GND) at same location as pin 92 (GND); Pin 7 (GND) at same location as pin 97 (GND); Pin 7 (GND) at same location as pin 98 (GND); Pin 7 (GND) at same location as pin 103 (GND); Pin 7 (GND) at same location as pin 104 (GND); Pin 7 (GND) at same location as pin 109 (GND); Pin 7 (GND) at same location as pin 110 (GND); Pin 7 (GND) at same location as pin 115 (GND); Pin 7 (GND) at same location as pin 116 (GND); Pin 7 (GND) at same location as pin 121 (GND); Pin 7 (GND) at same location as pin 122 (GND); Pin 7 (GND) at same location as pin 127 (GND); Pin 7 (GND) at same location as pin 128 (GND); Pin 7 (GND) at same location as pin 133 (GND); Pin 7 (GND) at same location as pin 134 (GND); Pin 7 (GND) at same location as pin 139 (GND); Pin 7 (GND) at same location as pin 140 (GND); Pin 7 (GND) at same location as pin 145 (GND); Pin 7 (GND) at same location as pin 146 (GND); Pin 7 (GND) at same location as pin 151 (GND); Pin 7 (GND) at same location as pin 152 (GND); Pin 7 (GND) at same location as pin 157 (GND); Pin 7 (GND) at same location as pin 158 (GND); Pin 7 (GND) at same location as pin 163 (GND); Pin 7 (GND) at same location as pin 164 (GND); Pin 7 (GND) at same location as pin 169 (GND); Pin 7 (GND) at same location as pin 170 (GND); Pin 7 (GND) at same location as pin 181 (GND); Pin 7 (GND) at same location as pin 182 (GND); Pin 7 (GND) at same location as pin 187 (GND); Pin 7 (GND) at same location as pin 188 (GND); Pin 7 (GND) at same location as pin 195 (GND); Pin 7 (GND) at same location as pin 196 (GND); Pin 8 (GND) at same location as pin 13 (GND); Pin 8 (GND) at same location as pin 14 (GND); Pin 8 (GND) at same location as pin 19 (GND); Pin 8 (GND) at same location as pin 20 (GND); Pin 8 (GND) at same location as pin 25 (GND); Pin 8 (GND) at same location as pin 26 (GND); Pin 8 (GND) at same location as pin 31 (GND); Pin 8 (GND) at same location as pin 32 (GND); Pin 8 (GND) at same location as pin 37 (GND); Pin 8 (GND) at same location as pin 43 (GND); Pin 8 (GND) at same location as pin 44 (GND); Pin 8 (GND) at same location as pin 49 (GND); Pin 8 (GND) at same location as pin 50 (GND); Pin 8 (GND) at same location as pin 55 (GND); Pin 8 (GND) at same location as pin 56 (GND); Pin 8 (GND) at same location as pin 61 (GND); Pin 8 (GND) at same location as pin 62 (GND); Pin 8 (GND) at same location as pin 67 (GND); Pin 8 (GND) at same location as pin 68 (GND); Pin 8 (GND) at same location as pin 73 (GND); Pin 8 (GND) at same location as pin 74 (GND); Pin 8 (GND) at same location as pin 79 (GND); Pin 8 (GND) at same location as pin 80 (GND); Pin 8 (GND) at same location as pin 85 (GND); Pin 8 (GND) at same location as pin 86 (GND); Pin 8 (GND) at same location as pin 91 (GND); Pin 8 (GND) at same location as pin 92 (GND); Pin 8 (GND) at same location as pin 97 (GND); Pin 8 (GND) at same location as pin 98 (GND); Pin 8 (GND) at same location as pin 103 (GND); Pin 8 (GND) at same location as pin 104 (GND); Pin 8 (GND) at same location as pin 109 (GND); Pin 8 (GND) at same location as pin 110 (GND); Pin 8 (GND) at same location as pin 115 (GND); Pin 8 (GND) at same location as pin 116 (GND); Pin 8 (GND) at same location as pin 121 (GND); Pin 8 (GND) at same location as pin 122 (GND); Pin 8 (GND) at same location as pin 127 (GND); Pin 8 (GND) at same location as pin 128 (GND); Pin 8 (GND) at same location as pin 133 (GND); Pin 8 (GND) at same location as pin 134 (GND); Pin 8 (GND) at same location as pin 139 (GND); Pin 8 (GND) at same location as pin 140 (GND); Pin 8 (GND) at same location as pin 145 (GND); Pin 8 (GND) at same location as pin 146 (GND); Pin 8 (GND) at same location as pin 151 (GND); Pin 8 (GND) at same location as pin 152 (GND); Pin 8 (GND) at same location as pin 157 (GND); Pin 8 (GND) at same location as pin 158 (GND); Pin 8 (GND) at same location as pin 163 (GND); Pin 8 (GND) at same location as pin 164 (GND); Pin 8 (GND) at same location as pin 169 (GND); Pin 8 (GND) at same location as pin 170 (GND); Pin 8 (GND) at same location as pin 181 (GND); Pin 8 (GND) at same location as pin 182 (GND); Pin 8 (GND) at same location as pin 187 (GND); Pin 8 (GND) at same location as pin 188 (GND); Pin 8 (GND) at same location as pin 195 (GND); Pin 8 (GND) at same location as pin 196 (GND); Pin 13 (GND) at same location as pin 14 (GND); Pin 13 (GND) at same location as pin 19 (GND); Pin 13 (GND) at same location as pin 20 (GND); Pin 13 (GND) at same location as pin 25 (GND); Pin 13 (GND) at same location as pin 26 (GND); Pin 13 (GND) at same location as pin 31 (GND); Pin 13 (GND) at same location as pin 32 (GND); Pin 13 (GND) at same location as pin 37 (GND); Pin 13 (GND) at same location as pin 43 (GND); Pin 13 (GND) at same location as pin 44 (GND); Pin 13 (GND) at same location as pin 49 (GND); Pin 13 (GND) at same location as pin 50 (GND); Pin 13 (GND) at same location as pin 55 (GND); Pin 13 (GND) at same location as pin 56 (GND); Pin 13 (GND) at same location as pin 61 (GND); Pin 13 (GND) at same location as pin 62 (GND); Pin 13 (GND) at same location as pin 67 (GND); Pin 13 (GND) at same location as pin 68 (GND); Pin 13 (GND) at same location as pin 73 (GND); Pin 13 (GND) at same location as pin 74 (GND); Pin 13 (GND) at same location as pin 79 (GND); Pin 13 (GND) at same location as pin 80 (GND); Pin 13 (GND) at same location as pin 85 (GND); Pin 13 (GND) at same location as pin 86 (GND); Pin 13 (GND) at same location as pin 91 (GND); Pin 13 (GND) at same location as pin 92 (GND); Pin 13 (GND) at same location as pin 97 (GND); Pin 13 (GND) at same location as pin 98 (GND); Pin 13 (GND) at same location as pin 103 (GND); Pin 13 (GND) at same location as pin 104 (GND); Pin 13 (GND) at same location as pin 109 (GND); Pin 13 (GND) at same location as pin 110 (GND); Pin 13 (GND) at same location as pin 115 (GND); Pin 13 (GND) at same location as pin 116 (GND); Pin 13 (GND) at same location as pin 121 (GND); Pin 13 (GND) at same location as pin 122 (GND); Pin 13 (GND) at same location as pin 127 (GND); Pin 13 (GND) at same location as pin 128 (GND); Pin 13 (GND) at same location as pin 133 (GND); Pin 13 (GND) at same location as pin 134 (GND); Pin 13 (GND) at same location as pin 139 (GND); Pin 13 (GND) at same location as pin 140 (GND); Pin 13 (GND) at same location as pin 145 (GND); Pin 13 (GND) at same location as pin 146 (GND); Pin 13 (GND) at same location as pin 151 (GND); Pin 13 (GND) at same location as pin 152 (GND); Pin 13 (GND) at same location as pin 157 (GND); Pin 13 (GND) at same location as pin 158 (GND); Pin 13 (GND) at same location as pin 163 (GND); Pin 13 (GND) at same location as pin 164 (GND); Pin 13 (GND) at same location as pin 169 (GND); Pin 13 (GND) at same location as pin 170 (GND); Pin 13 (GND) at same location as pin 181 (GND); Pin 13 (GND) at same location as pin 182 (GND); Pin 13 (GND) at same location as pin 187 (GND); Pin 13 (GND) at same location as pin 188 (GND); Pin 13 (GND) at same location as pin 195 (GND); Pin 13 (GND) at same location as pin 196 (GND); Pin 14 (GND) at same location as pin 19 (GND); Pin 14 (GND) at same location as pin 20 (GND); Pin 14 (GND) at same location as pin 25 (GND); Pin 14 (GND) at same location as pin 26 (GND); Pin 14 (GND) at same location as pin 31 (GND); Pin 14 (GND) at same location as pin 32 (GND); Pin 14 (GND) at same location as pin 37 (GND); Pin 14 (GND) at same location as pin 43 (GND); Pin 14 (GND) at same location as pin 44 (GND); Pin 14 (GND) at same location as pin 49 (GND); Pin 14 (GND) at same location as pin 50 (GND); Pin 14 (GND) at same location as pin 55 (GND); Pin 14 (GND) at same location as pin 56 (GND); Pin 14 (GND) at same location as pin 61 (GND); Pin 14 (GND) at same location as pin 62 (GND); Pin 14 (GND) at same location as pin 67 (GND); Pin 14 (GND) at same location as pin 68 (GND); Pin 14 (GND) at same location as pin 73 (GND); Pin 14 (GND) at same location as pin 74 (GND); Pin 14 (GND) at same location as pin 79 (GND); Pin 14 (GND) at same location as pin 80 (GND); Pin 14 (GND) at same location as pin 85 (GND); Pin 14 (GND) at same location as pin 86 (GND); Pin 14 (GND) at same location as pin 91 (GND); Pin 14 (GND) at same location as pin 92 (GND); Pin 14 (GND) at same location as pin 97 (GND); Pin 14 (GND) at same location as pin 98 (GND); Pin 14 (GND) at same location as pin 103 (GND); Pin 14 (GND) at same location as pin 104 (GND); Pin 14 (GND) at same location as pin 109 (GND); Pin 14 (GND) at same location as pin 110 (GND); Pin 14 (GND) at same location as pin 115 (GND); Pin 14 (GND) at same location as pin 116 (GND); Pin 14 (GND) at same location as pin 121 (GND); Pin 14 (GND) at same location as pin 122 (GND); Pin 14 (GND) at same location as pin 127 (GND); Pin 14 (GND) at same location as pin 128 (GND); Pin 14 (GND) at same location as pin 133 (GND); Pin 14 (GND) at same location as pin 134 (GND); Pin 14 (GND) at same location as pin 139 (GND); Pin 14 (GND) at same location as pin 140 (GND); Pin 14 (GND) at same location as pin 145 (GND); Pin 14 (GND) at same location as pin 146 (GND); Pin 14 (GND) at same location as pin 151 (GND); Pin 14 (GND) at same location as pin 152 (GND); Pin 14 (GND) at same location as pin 157 (GND); Pin 14 (GND) at same location as pin 158 (GND); Pin 14 (GND) at same location as pin 163 (GND); Pin 14 (GND) at same location as pin 164 (GND); Pin 14 (GND) at same location as pin 169 (GND); Pin 14 (GND) at same location as pin 170 (GND); Pin 14 (GND) at same location as pin 181 (GND); Pin 14 (GND) at same location as pin 182 (GND); Pin 14 (GND) at same location as pin 187 (GND); Pin 14 (GND) at same location as pin 188 (GND); Pin 14 (GND) at same location as pin 195 (GND); Pin 14 (GND) at same location as pin 196 (GND); Pin 19 (GND) at same location as pin 20 (GND); Pin 19 (GND) at same location as pin 25 (GND); Pin 19 (GND) at same location as pin 26 (GND); Pin 19 (GND) at same location as pin 31 (GND); Pin 19 (GND) at same location as pin 32 (GND); Pin 19 (GND) at same location as pin 37 (GND); Pin 19 (GND) at same location as pin 43 (GND); Pin 19 (GND) at same location as pin 44 (GND); Pin 19 (GND) at same location as pin 49 (GND); Pin 19 (GND) at same location as pin 50 (GND); Pin 19 (GND) at same location as pin 55 (GND); Pin 19 (GND) at same location as pin 56 (GND); Pin 19 (GND) at same location as pin 61 (GND); Pin 19 (GND) at same location as pin 62 (GND); Pin 19 (GND) at same location as pin 67 (GND); Pin 19 (GND) at same location as pin 68 (GND); Pin 19 (GND) at same location as pin 73 (GND); Pin 19 (GND) at same location as pin 74 (GND); Pin 19 (GND) at same location as pin 79 (GND); Pin 19 (GND) at same location as pin 80 (GND); Pin 19 (GND) at same location as pin 85 (GND); Pin 19 (GND) at same location as pin 86 (GND); Pin 19 (GND) at same location as pin 91 (GND); Pin 19 (GND) at same location as pin 92 (GND); Pin 19 (GND) at same location as pin 97 (GND); Pin 19 (GND) at same location as pin 98 (GND); Pin 19 (GND) at same location as pin 103 (GND); Pin 19 (GND) at same location as pin 104 (GND); Pin 19 (GND) at same location as pin 109 (GND); Pin 19 (GND) at same location as pin 110 (GND); Pin 19 (GND) at same location as pin 115 (GND); Pin 19 (GND) at same location as pin 116 (GND); Pin 19 (GND) at same location as pin 121 (GND); Pin 19 (GND) at same location as pin 122 (GND); Pin 19 (GND) at same location as pin 127 (GND); Pin 19 (GND) at same location as pin 128 (GND); Pin 19 (GND) at same location as pin 133 (GND); Pin 19 (GND) at same location as pin 134 (GND); Pin 19 (GND) at same location as pin 139 (GND); Pin 19 (GND) at same location as pin 140 (GND); Pin 19 (GND) at same location as pin 145 (GND); Pin 19 (GND) at same location as pin 146 (GND); Pin 19 (GND) at same location as pin 151 (GND); Pin 19 (GND) at same location as pin 152 (GND); Pin 19 (GND) at same location as pin 157 (GND); Pin 19 (GND) at same location as pin 158 (GND); Pin 19 (GND) at same location as pin 163 (GND); Pin 19 (GND) at same location as pin 164 (GND); Pin 19 (GND) at same location as pin 169 (GND); Pin 19 (GND) at same location as pin 170 (GND); Pin 19 (GND) at same location as pin 181 (GND); Pin 19 (GND) at same location as pin 182 (GND); Pin 19 (GND) at same location as pin 187 (GND); Pin 19 (GND) at same location as pin 188 (GND); Pin 19 (GND) at same location as pin 195 (GND); Pin 19 (GND) at same location as pin 196 (GND); Pin 20 (GND) at same location as pin 25 (GND); Pin 20 (GND) at same location as pin 26 (GND); Pin 20 (GND) at same location as pin 31 (GND); Pin 20 (GND) at same location as pin 32 (GND); Pin 20 (GND) at same location as pin 37 (GND); Pin 20 (GND) at same location as pin 43 (GND); Pin 20 (GND) at same location as pin 44 (GND); Pin 20 (GND) at same location as pin 49 (GND); Pin 20 (GND) at same location as pin 50 (GND); Pin 20 (GND) at same location as pin 55 (GND); Pin 20 (GND) at same location as pin 56 (GND); Pin 20 (GND) at same location as pin 61 (GND); Pin 20 (GND) at same location as pin 62 (GND); Pin 20 (GND) at same location as pin 67 (GND); Pin 20 (GND) at same location as pin 68 (GND); Pin 20 (GND) at same location as pin 73 (GND); Pin 20 (GND) at same location as pin 74 (GND); Pin 20 (GND) at same location as pin 79 (GND); Pin 20 (GND) at same location as pin 80 (GND); Pin 20 (GND) at same location as pin 85 (GND); Pin 20 (GND) at same location as pin 86 (GND); Pin 20 (GND) at same location as pin 91 (GND); Pin 20 (GND) at same location as pin 92 (GND); Pin 20 (GND) at same location as pin 97 (GND); Pin 20 (GND) at same location as pin 98 (GND); Pin 20 (GND) at same location as pin 103 (GND); Pin 20 (GND) at same location as pin 104 (GND); Pin 20 (GND) at same location as pin 109 (GND); Pin 20 (GND) at same location as pin 110 (GND); Pin 20 (GND) at same location as pin 115 (GND); Pin 20 (GND) at same location as pin 116 (GND); Pin 20 (GND) at same location as pin 121 (GND); Pin 20 (GND) at same location as pin 122 (GND); Pin 20 (GND) at same location as pin 127 (GND); Pin 20 (GND) at same location as pin 128 (GND); Pin 20 (GND) at same location as pin 133 (GND); Pin 20 (GND) at same location as pin 134 (GND); Pin 20 (GND) at same location as pin 139 (GND); Pin 20 (GND) at same location as pin 140 (GND); Pin 20 (GND) at same location as pin 145 (GND); Pin 20 (GND) at same location as pin 146 (GND); Pin 20 (GND) at same location as pin 151 (GND); Pin 20 (GND) at same location as pin 152 (GND); Pin 20 (GND) at same location as pin 157 (GND); Pin 20 (GND) at same location as pin 158 (GND); Pin 20 (GND) at same location as pin 163 (GND); Pin 20 (GND) at same location as pin 164 (GND); Pin 20 (GND) at same location as pin 169 (GND); Pin 20 (GND) at same location as pin 170 (GND); Pin 20 (GND) at same location as pin 181 (GND); Pin 20 (GND) at same location as pin 182 (GND); Pin 20 (GND) at same location as pin 187 (GND); Pin 20 (GND) at same location as pin 188 (GND); Pin 20 (GND) at same location as pin 195 (GND); Pin 20 (GND) at same location as pin 196 (GND); Pin 25 (GND) at same location as pin 26 (GND); Pin 25 (GND) at same location as pin 31 (GND); Pin 25 (GND) at same location as pin 32 (GND); Pin 25 (GND) at same location as pin 37 (GND); Pin 25 (GND) at same location as pin 43 (GND); Pin 25 (GND) at same location as pin 44 (GND); Pin 25 (GND) at same location as pin 49 (GND); Pin 25 (GND) at same location as pin 50 (GND); Pin 25 (GND) at same location as pin 55 (GND); Pin 25 (GND) at same location as pin 56 (GND); Pin 25 (GND) at same location as pin 61 (GND); Pin 25 (GND) at same location as pin 62 (GND); Pin 25 (GND) at same location as pin 67 (GND); Pin 25 (GND) at same location as pin 68 (GND); Pin 25 (GND) at same location as pin 73 (GND); Pin 25 (GND) at same location as pin 74 (GND); Pin 25 (GND) at same location as pin 79 (GND); Pin 25 (GND) at same location as pin 80 (GND); Pin 25 (GND) at same location as pin 85 (GND); Pin 25 (GND) at same location as pin 86 (GND); Pin 25 (GND) at same location as pin 91 (GND); Pin 25 (GND) at same location as pin 92 (GND); Pin 25 (GND) at same location as pin 97 (GND); Pin 25 (GND) at same location as pin 98 (GND); Pin 25 (GND) at same location as pin 103 (GND); Pin 25 (GND) at same location as pin 104 (GND); Pin 25 (GND) at same location as pin 109 (GND); Pin 25 (GND) at same location as pin 110 (GND); Pin 25 (GND) at same location as pin 115 (GND); Pin 25 (GND) at same location as pin 116 (GND); Pin 25 (GND) at same location as pin 121 (GND); Pin 25 (GND) at same location as pin 122 (GND); Pin 25 (GND) at same location as pin 127 (GND); Pin 25 (GND) at same location as pin 128 (GND); Pin 25 (GND) at same location as pin 133 (GND); Pin 25 (GND) at same location as pin 134 (GND); Pin 25 (GND) at same location as pin 139 (GND); Pin 25 (GND) at same location as pin 140 (GND); Pin 25 (GND) at same location as pin 145 (GND); Pin 25 (GND) at same location as pin 146 (GND); Pin 25 (GND) at same location as pin 151 (GND); Pin 25 (GND) at same location as pin 152 (GND); Pin 25 (GND) at same location as pin 157 (GND); Pin 25 (GND) at same location as pin 158 (GND); Pin 25 (GND) at same location as pin 163 (GND); Pin 25 (GND) at same location as pin 164 (GND); Pin 25 (GND) at same location as pin 169 (GND); Pin 25 (GND) at same location as pin 170 (GND); Pin 25 (GND) at same location as pin 181 (GND); Pin 25 (GND) at same location as pin 182 (GND); Pin 25 (GND) at same location as pin 187 (GND); Pin 25 (GND) at same location as pin 188 (GND); Pin 25 (GND) at same location as pin 195 (GND); Pin 25 (GND) at same location as pin 196 (GND); Pin 26 (GND) at same location as pin 31 (GND); Pin 26 (GND) at same location as pin 32 (GND); Pin 26 (GND) at same location as pin 37 (GND); Pin 26 (GND) at same location as pin 43 (GND); Pin 26 (GND) at same location as pin 44 (GND); Pin 26 (GND) at same location as pin 49 (GND); Pin 26 (GND) at same location as pin 50 (GND); Pin 26 (GND) at same location as pin 55 (GND); Pin 26 (GND) at same location as pin 56 (GND); Pin 26 (GND) at same location as pin 61 (GND); Pin 26 (GND) at same location as pin 62 (GND); Pin 26 (GND) at same location as pin 67 (GND); Pin 26 (GND) at same location as pin 68 (GND); Pin 26 (GND) at same location as pin 73 (GND); Pin 26 (GND) at same location as pin 74 (GND); Pin 26 (GND) at same location as pin 79 (GND); Pin 26 (GND) at same location as pin 80 (GND); Pin 26 (GND) at same location as pin 85 (GND); Pin 26 (GND) at same location as pin 86 (GND); Pin 26 (GND) at same location as pin 91 (GND); Pin 26 (GND) at same location as pin 92 (GND); Pin 26 (GND) at same location as pin 97 (GND); Pin 26 (GND) at same location as pin 98 (GND); Pin 26 (GND) at same location as pin 103 (GND); Pin 26 (GND) at same location as pin 104 (GND); Pin 26 (GND) at same location as pin 109 (GND); Pin 26 (GND) at same location as pin 110 (GND); Pin 26 (GND) at same location as pin 115 (GND); Pin 26 (GND) at same location as pin 116 (GND); Pin 26 (GND) at same location as pin 121 (GND); Pin 26 (GND) at same location as pin 122 (GND); Pin 26 (GND) at same location as pin 127 (GND); Pin 26 (GND) at same location as pin 128 (GND); Pin 26 (GND) at same location as pin 133 (GND); Pin 26 (GND) at same location as pin 134 (GND); Pin 26 (GND) at same location as pin 139 (GND); Pin 26 (GND) at same location as pin 140 (GND); Pin 26 (GND) at same location as pin 145 (GND); Pin 26 (GND) at same location as pin 146 (GND); Pin 26 (GND) at same location as pin 151 (GND); Pin 26 (GND) at same location as pin 152 (GND); Pin 26 (GND) at same location as pin 157 (GND); Pin 26 (GND) at same location as pin 158 (GND); Pin 26 (GND) at same location as pin 163 (GND); Pin 26 (GND) at same location as pin 164 (GND); Pin 26 (GND) at same location as pin 169 (GND); Pin 26 (GND) at same location as pin 170 (GND); Pin 26 (GND) at same location as pin 181 (GND); Pin 26 (GND) at same location as pin 182 (GND); Pin 26 (GND) at same location as pin 187 (GND); Pin 26 (GND) at same location as pin 188 (GND); Pin 26 (GND) at same location as pin 195 (GND); Pin 26 (GND) at same location as pin 196 (GND); Pin 31 (GND) at same location as pin 32 (GND); Pin 31 (GND) at same location as pin 37 (GND); Pin 31 (GND) at same location as pin 43 (GND); Pin 31 (GND) at same location as pin 44 (GND); Pin 31 (GND) at same location as pin 49 (GND); Pin 31 (GND) at same location as pin 50 (GND); Pin 31 (GND) at same location as pin 55 (GND); Pin 31 (GND) at same location as pin 56 (GND); Pin 31 (GND) at same location as pin 61 (GND); Pin 31 (GND) at same location as pin 62 (GND); Pin 31 (GND) at same location as pin 67 (GND); Pin 31 (GND) at same location as pin 68 (GND); Pin 31 (GND) at same location as pin 73 (GND); Pin 31 (GND) at same location as pin 74 (GND); Pin 31 (GND) at same location as pin 79 (GND); Pin 31 (GND) at same location as pin 80 (GND); Pin 31 (GND) at same location as pin 85 (GND); Pin 31 (GND) at same location as pin 86 (GND); Pin 31 (GND) at same location as pin 91 (GND); Pin 31 (GND) at same location as pin 92 (GND); Pin 31 (GND) at same location as pin 97 (GND); Pin 31 (GND) at same location as pin 98 (GND); Pin 31 (GND) at same location as pin 103 (GND); Pin 31 (GND) at same location as pin 104 (GND); Pin 31 (GND) at same location as pin 109 (GND); Pin 31 (GND) at same location as pin 110 (GND); Pin 31 (GND) at same location as pin 115 (GND); Pin 31 (GND) at same location as pin 116 (GND); Pin 31 (GND) at same location as pin 121 (GND); Pin 31 (GND) at same location as pin 122 (GND); Pin 31 (GND) at same location as pin 127 (GND); Pin 31 (GND) at same location as pin 128 (GND); Pin 31 (GND) at same location as pin 133 (GND); Pin 31 (GND) at same location as pin 134 (GND); Pin 31 (GND) at same location as pin 139 (GND); Pin 31 (GND) at same location as pin 140 (GND); Pin 31 (GND) at same location as pin 145 (GND); Pin 31 (GND) at same location as pin 146 (GND); Pin 31 (GND) at same location as pin 151 (GND); Pin 31 (GND) at same location as pin 152 (GND); Pin 31 (GND) at same location as pin 157 (GND); Pin 31 (GND) at same location as pin 158 (GND); Pin 31 (GND) at same location as pin 163 (GND); Pin 31 (GND) at same location as pin 164 (GND); Pin 31 (GND) at same location as pin 169 (GND); Pin 31 (GND) at same location as pin 170 (GND); Pin 31 (GND) at same location as pin 181 (GND); Pin 31 (GND) at same location as pin 182 (GND); Pin 31 (GND) at same location as pin 187 (GND); Pin 31 (GND) at same location as pin 188 (GND); Pin 31 (GND) at same location as pin 195 (GND); Pin 31 (GND) at same location as pin 196 (GND); Pin 32 (GND) at same location as pin 37 (GND); Pin 32 (GND) at same location as pin 43 (GND); Pin 32 (GND) at same location as pin 44 (GND); Pin 32 (GND) at same location as pin 49 (GND); Pin 32 (GND) at same location as pin 50 (GND); Pin 32 (GND) at same location as pin 55 (GND); Pin 32 (GND) at same location as pin 56 (GND); Pin 32 (GND) at same location as pin 61 (GND); Pin 32 (GND) at same location as pin 62 (GND); Pin 32 (GND) at same location as pin 67 (GND); Pin 32 (GND) at same location as pin 68 (GND); Pin 32 (GND) at same location as pin 73 (GND); Pin 32 (GND) at same location as pin 74 (GND); Pin 32 (GND) at same location as pin 79 (GND); Pin 32 (GND) at same location as pin 80 (GND); Pin 32 (GND) at same location as pin 85 (GND); Pin 32 (GND) at same location as pin 86 (GND); Pin 32 (GND) at same location as pin 91 (GND); Pin 32 (GND) at same location as pin 92 (GND); Pin 32 (GND) at same location as pin 97 (GND); Pin 32 (GND) at same location as pin 98 (GND); Pin 32 (GND) at same location as pin 103 (GND); Pin 32 (GND) at same location as pin 104 (GND); Pin 32 (GND) at same location as pin 109 (GND); Pin 32 (GND) at same location as pin 110 (GND); Pin 32 (GND) at same location as pin 115 (GND); Pin 32 (GND) at same location as pin 116 (GND); Pin 32 (GND) at same location as pin 121 (GND); Pin 32 (GND) at same location as pin 122 (GND); Pin 32 (GND) at same location as pin 127 (GND); Pin 32 (GND) at same location as pin 128 (GND); Pin 32 (GND) at same location as pin 133 (GND); Pin 32 (GND) at same location as pin 134 (GND); Pin 32 (GND) at same location as pin 139 (GND); Pin 32 (GND) at same location as pin 140 (GND); Pin 32 (GND) at same location as pin 145 (GND); Pin 32 (GND) at same location as pin 146 (GND); Pin 32 (GND) at same location as pin 151 (GND); Pin 32 (GND) at same location as pin 152 (GND); Pin 32 (GND) at same location as pin 157 (GND); Pin 32 (GND) at same location as pin 158 (GND); Pin 32 (GND) at same location as pin 163 (GND); Pin 32 (GND) at same location as pin 164 (GND); Pin 32 (GND) at same location as pin 169 (GND); Pin 32 (GND) at same location as pin 170 (GND); Pin 32 (GND) at same location as pin 181 (GND); Pin 32 (GND) at same location as pin 182 (GND); Pin 32 (GND) at same location as pin 187 (GND); Pin 32 (GND) at same location as pin 188 (GND); Pin 32 (GND) at same location as pin 195 (GND); Pin 32 (GND) at same location as pin 196 (GND); Pin 37 (GND) at same location as pin 43 (GND); Pin 37 (GND) at same location as pin 44 (GND); Pin 37 (GND) at same location as pin 49 (GND); Pin 37 (GND) at same location as pin 50 (GND); Pin 37 (GND) at same location as pin 55 (GND); Pin 37 (GND) at same location as pin 56 (GND); Pin 37 (GND) at same location as pin 61 (GND); Pin 37 (GND) at same location as pin 62 (GND); Pin 37 (GND) at same location as pin 67 (GND); Pin 37 (GND) at same location as pin 68 (GND); Pin 37 (GND) at same location as pin 73 (GND); Pin 37 (GND) at same location as pin 74 (GND); Pin 37 (GND) at same location as pin 79 (GND); Pin 37 (GND) at same location as pin 80 (GND); Pin 37 (GND) at same location as pin 85 (GND); Pin 37 (GND) at same location as pin 86 (GND); Pin 37 (GND) at same location as pin 91 (GND); Pin 37 (GND) at same location as pin 92 (GND); Pin 37 (GND) at same location as pin 97 (GND); Pin 37 (GND) at same location as pin 98 (GND); Pin 37 (GND) at same location as pin 103 (GND); Pin 37 (GND) at same location as pin 104 (GND); Pin 37 (GND) at same location as pin 109 (GND); Pin 37 (GND) at same location as pin 110 (GND); Pin 37 (GND) at same location as pin 115 (GND); Pin 37 (GND) at same location as pin 116 (GND); Pin 37 (GND) at same location as pin 121 (GND); Pin 37 (GND) at same location as pin 122 (GND); Pin 37 (GND) at same location as pin 127 (GND); Pin 37 (GND) at same location as pin 128 (GND); Pin 37 (GND) at same location as pin 133 (GND); Pin 37 (GND) at same location as pin 134 (GND); Pin 37 (GND) at same location as pin 139 (GND); Pin 37 (GND) at same location as pin 140 (GND); Pin 37 (GND) at same location as pin 145 (GND); Pin 37 (GND) at same location as pin 146 (GND); Pin 37 (GND) at same location as pin 151 (GND); Pin 37 (GND) at same location as pin 152 (GND); Pin 37 (GND) at same location as pin 157 (GND); Pin 37 (GND) at same location as pin 158 (GND); Pin 37 (GND) at same location as pin 163 (GND); Pin 37 (GND) at same location as pin 164 (GND); Pin 37 (GND) at same location as pin 169 (GND); Pin 37 (GND) at same location as pin 170 (GND); Pin 37 (GND) at same location as pin 181 (GND); Pin 37 (GND) at same location as pin 182 (GND); Pin 37 (GND) at same location as pin 187 (GND); Pin 37 (GND) at same location as pin 188 (GND); Pin 37 (GND) at same location as pin 195 (GND); Pin 37 (GND) at same location as pin 196 (GND); Pin 39 (GPIO0-27_VDD) at same location as pin 40 (GPIO0-27_VDD); Pin 41 (GPIO28-45_VDD) at same location as pin 42 (GPIO28-45_VDD); Pin 43 (GND) at same location as pin 44 (GND); Pin 43 (GND) at same location as pin 49 (GND); Pin 43 (GND) at same location as pin 50 (GND); Pin 43 (GND) at same location as pin 55 (GND); Pin 43 (GND) at same location as pin 56 (GND); Pin 43 (GND) at same location as pin 61 (GND); Pin 43 (GND) at same location as pin 62 (GND); Pin 43 (GND) at same location as pin 67 (GND); Pin 43 (GND) at same location as pin 68 (GND); Pin 43 (GND) at same location as pin 73 (GND); Pin 43 (GND) at same location as pin 74 (GND); Pin 43 (GND) at same location as pin 79 (GND); Pin 43 (GND) at same location as pin 80 (GND); Pin 43 (GND) at same location as pin 85 (GND); Pin 43 (GND) at same location as pin 86 (GND); Pin 43 (GND) at same location as pin 91 (GND); Pin 43 (GND) at same location as pin 92 (GND); Pin 43 (GND) at same location as pin 97 (GND); Pin 43 (GND) at same location as pin 98 (GND); Pin 43 (GND) at same location as pin 103 (GND); Pin 43 (GND) at same location as pin 104 (GND); Pin 43 (GND) at same location as pin 109 (GND); Pin 43 (GND) at same location as pin 110 (GND); Pin 43 (GND) at same location as pin 115 (GND); Pin 43 (GND) at same location as pin 116 (GND); Pin 43 (GND) at same location as pin 121 (GND); Pin 43 (GND) at same location as pin 122 (GND); Pin 43 (GND) at same location as pin 127 (GND); Pin 43 (GND) at same location as pin 128 (GND); Pin 43 (GND) at same location as pin 133 (GND); Pin 43 (GND) at same location as pin 134 (GND); Pin 43 (GND) at same location as pin 139 (GND); Pin 43 (GND) at same location as pin 140 (GND); Pin 43 (GND) at same location as pin 145 (GND); Pin 43 (GND) at same location as pin 146 (GND); Pin 43 (GND) at same location as pin 151 (GND); Pin 43 (GND) at same location as pin 152 (GND); Pin 43 (GND) at same location as pin 157 (GND); Pin 43 (GND) at same location as pin 158 (GND); Pin 43 (GND) at same location as pin 163 (GND); Pin 43 (GND) at same location as pin 164 (GND); Pin 43 (GND) at same location as pin 169 (GND); Pin 43 (GND) at same location as pin 170 (GND); Pin 43 (GND) at same location as pin 181 (GND); Pin 43 (GND) at same location as pin 182 (GND); Pin 43 (GND) at same location as pin 187 (GND); Pin 43 (GND) at same location as pin 188 (GND); Pin 43 (GND) at same location as pin 195 (GND); Pin 43 (GND) at same location as pin 196 (GND); Pin 44 (GND) at same location as pin 49 (GND); Pin 44 (GND) at same location as pin 50 (GND); Pin 44 (GND) at same location as pin 55 (GND); Pin 44 (GND) at same location as pin 56 (GND); Pin 44 (GND) at same location as pin 61 (GND); Pin 44 (GND) at same location as pin 62 (GND); Pin 44 (GND) at same location as pin 67 (GND); Pin 44 (GND) at same location as pin 68 (GND); Pin 44 (GND) at same location as pin 73 (GND); Pin 44 (GND) at same location as pin 74 (GND); Pin 44 (GND) at same location as pin 79 (GND); Pin 44 (GND) at same location as pin 80 (GND); Pin 44 (GND) at same location as pin 85 (GND); Pin 44 (GND) at same location as pin 86 (GND); Pin 44 (GND) at same location as pin 91 (GND); Pin 44 (GND) at same location as pin 92 (GND); Pin 44 (GND) at same location as pin 97 (GND); Pin 44 (GND) at same location as pin 98 (GND); Pin 44 (GND) at same location as pin 103 (GND); Pin 44 (GND) at same location as pin 104 (GND); Pin 44 (GND) at same location as pin 109 (GND); Pin 44 (GND) at same location as pin 110 (GND); Pin 44 (GND) at same location as pin 115 (GND); Pin 44 (GND) at same location as pin 116 (GND); Pin 44 (GND) at same location as pin 121 (GND); Pin 44 (GND) at same location as pin 122 (GND); Pin 44 (GND) at same location as pin 127 (GND); Pin 44 (GND) at same location as pin 128 (GND); Pin 44 (GND) at same location as pin 133 (GND); Pin 44 (GND) at same location as pin 134 (GND); Pin 44 (GND) at same location as pin 139 (GND); Pin 44 (GND) at same location as pin 140 (GND); Pin 44 (GND) at same location as pin 145 (GND); Pin 44 (GND) at same location as pin 146 (GND); Pin 44 (GND) at same location as pin 151 (GND); Pin 44 (GND) at same location as pin 152 (GND); Pin 44 (GND) at same location as pin 157 (GND); Pin 44 (GND) at same location as pin 158 (GND); Pin 44 (GND) at same location as pin 163 (GND); Pin 44 (GND) at same location as pin 164 (GND); Pin 44 (GND) at same location as pin 169 (GND); Pin 44 (GND) at same location as pin 170 (GND); Pin 44 (GND) at same location as pin 181 (GND); Pin 44 (GND) at same location as pin 182 (GND); Pin 44 (GND) at same location as pin 187 (GND); Pin 44 (GND) at same location as pin 188 (GND); Pin 44 (GND) at same location as pin 195 (GND); Pin 44 (GND) at same location as pin 196 (GND); Pin 49 (GND) at same location as pin 50 (GND); Pin 49 (GND) at same location as pin 55 (GND); Pin 49 (GND) at same location as pin 56 (GND); Pin 49 (GND) at same location as pin 61 (GND); Pin 49 (GND) at same location as pin 62 (GND); Pin 49 (GND) at same location as pin 67 (GND); Pin 49 (GND) at same location as pin 68 (GND); Pin 49 (GND) at same location as pin 73 (GND); Pin 49 (GND) at same location as pin 74 (GND); Pin 49 (GND) at same location as pin 79 (GND); Pin 49 (GND) at same location as pin 80 (GND); Pin 49 (GND) at same location as pin 85 (GND); Pin 49 (GND) at same location as pin 86 (GND); Pin 49 (GND) at same location as pin 91 (GND); Pin 49 (GND) at same location as pin 92 (GND); Pin 49 (GND) at same location as pin 97 (GND); Pin 49 (GND) at same location as pin 98 (GND); Pin 49 (GND) at same location as pin 103 (GND); Pin 49 (GND) at same location as pin 104 (GND); Pin 49 (GND) at same location as pin 109 (GND); Pin 49 (GND) at same location as pin 110 (GND); Pin 49 (GND) at same location as pin 115 (GND); Pin 49 (GND) at same location as pin 116 (GND); Pin 49 (GND) at same location as pin 121 (GND); Pin 49 (GND) at same location as pin 122 (GND); Pin 49 (GND) at same location as pin 127 (GND); Pin 49 (GND) at same location as pin 128 (GND); Pin 49 (GND) at same location as pin 133 (GND); Pin 49 (GND) at same location as pin 134 (GND); Pin 49 (GND) at same location as pin 139 (GND); Pin 49 (GND) at same location as pin 140 (GND); Pin 49 (GND) at same location as pin 145 (GND); Pin 49 (GND) at same location as pin 146 (GND); Pin 49 (GND) at same location as pin 151 (GND); Pin 49 (GND) at same location as pin 152 (GND); Pin 49 (GND) at same location as pin 157 (GND); Pin 49 (GND) at same location as pin 158 (GND); Pin 49 (GND) at same location as pin 163 (GND); Pin 49 (GND) at same location as pin 164 (GND); Pin 49 (GND) at same location as pin 169 (GND); Pin 49 (GND) at same location as pin 170 (GND); Pin 49 (GND) at same location as pin 181 (GND); Pin 49 (GND) at same location as pin 182 (GND); Pin 49 (GND) at same location as pin 187 (GND); Pin 49 (GND) at same location as pin 188 (GND); Pin 49 (GND) at same location as pin 195 (GND); Pin 49 (GND) at same location as pin 196 (GND); Pin 50 (GND) at same location as pin 55 (GND); Pin 50 (GND) at same location as pin 56 (GND); Pin 50 (GND) at same location as pin 61 (GND); Pin 50 (GND) at same location as pin 62 (GND); Pin 50 (GND) at same location as pin 67 (GND); Pin 50 (GND) at same location as pin 68 (GND); Pin 50 (GND) at same location as pin 73 (GND); Pin 50 (GND) at same location as pin 74 (GND); Pin 50 (GND) at same location as pin 79 (GND); Pin 50 (GND) at same location as pin 80 (GND); Pin 50 (GND) at same location as pin 85 (GND); Pin 50 (GND) at same location as pin 86 (GND); Pin 50 (GND) at same location as pin 91 (GND); Pin 50 (GND) at same location as pin 92 (GND); Pin 50 (GND) at same location as pin 97 (GND); Pin 50 (GND) at same location as pin 98 (GND); Pin 50 (GND) at same location as pin 103 (GND); Pin 50 (GND) at same location as pin 104 (GND); Pin 50 (GND) at same location as pin 109 (GND); Pin 50 (GND) at same location as pin 110 (GND); Pin 50 (GND) at same location as pin 115 (GND); Pin 50 (GND) at same location as pin 116 (GND); Pin 50 (GND) at same location as pin 121 (GND); Pin 50 (GND) at same location as pin 122 (GND); Pin 50 (GND) at same location as pin 127 (GND); Pin 50 (GND) at same location as pin 128 (GND); Pin 50 (GND) at same location as pin 133 (GND); Pin 50 (GND) at same location as pin 134 (GND); Pin 50 (GND) at same location as pin 139 (GND); Pin 50 (GND) at same location as pin 140 (GND); Pin 50 (GND) at same location as pin 145 (GND); Pin 50 (GND) at same location as pin 146 (GND); Pin 50 (GND) at same location as pin 151 (GND); Pin 50 (GND) at same location as pin 152 (GND); Pin 50 (GND) at same location as pin 157 (GND); Pin 50 (GND) at same location as pin 158 (GND); Pin 50 (GND) at same location as pin 163 (GND); Pin 50 (GND) at same location as pin 164 (GND); Pin 50 (GND) at same location as pin 169 (GND); Pin 50 (GND) at same location as pin 170 (GND); Pin 50 (GND) at same location as pin 181 (GND); Pin 50 (GND) at same location as pin 182 (GND); Pin 50 (GND) at same location as pin 187 (GND); Pin 50 (GND) at same location as pin 188 (GND); Pin 50 (GND) at same location as pin 195 (GND); Pin 50 (GND) at same location as pin 196 (GND); Pin 55 (GND) at same location as pin 56 (GND); Pin 55 (GND) at same location as pin 61 (GND); Pin 55 (GND) at same location as pin 62 (GND); Pin 55 (GND) at same location as pin 67 (GND); Pin 55 (GND) at same location as pin 68 (GND); Pin 55 (GND) at same location as pin 73 (GND); Pin 55 (GND) at same location as pin 74 (GND); Pin 55 (GND) at same location as pin 79 (GND); Pin 55 (GND) at same location as pin 80 (GND); Pin 55 (GND) at same location as pin 85 (GND); Pin 55 (GND) at same location as pin 86 (GND); Pin 55 (GND) at same location as pin 91 (GND); Pin 55 (GND) at same location as pin 92 (GND); Pin 55 (GND) at same location as pin 97 (GND); Pin 55 (GND) at same location as pin 98 (GND); Pin 55 (GND) at same location as pin 103 (GND); Pin 55 (GND) at same location as pin 104 (GND); Pin 55 (GND) at same location as pin 109 (GND); Pin 55 (GND) at same location as pin 110 (GND); Pin 55 (GND) at same location as pin 115 (GND); Pin 55 (GND) at same location as pin 116 (GND); Pin 55 (GND) at same location as pin 121 (GND); Pin 55 (GND) at same location as pin 122 (GND); Pin 55 (GND) at same location as pin 127 (GND); Pin 55 (GND) at same location as pin 128 (GND); Pin 55 (GND) at same location as pin 133 (GND); Pin 55 (GND) at same location as pin 134 (GND); Pin 55 (GND) at same location as pin 139 (GND); Pin 55 (GND) at same location as pin 140 (GND); Pin 55 (GND) at same location as pin 145 (GND); Pin 55 (GND) at same location as pin 146 (GND); Pin 55 (GND) at same location as pin 151 (GND); Pin 55 (GND) at same location as pin 152 (GND); Pin 55 (GND) at same location as pin 157 (GND); Pin 55 (GND) at same location as pin 158 (GND); Pin 55 (GND) at same location as pin 163 (GND); Pin 55 (GND) at same location as pin 164 (GND); Pin 55 (GND) at same location as pin 169 (GND); Pin 55 (GND) at same location as pin 170 (GND); Pin 55 (GND) at same location as pin 181 (GND); Pin 55 (GND) at same location as pin 182 (GND); Pin 55 (GND) at same location as pin 187 (GND); Pin 55 (GND) at same location as pin 188 (GND); Pin 55 (GND) at same location as pin 195 (GND); Pin 55 (GND) at same location as pin 196 (GND); Pin 56 (GND) at same location as pin 61 (GND); Pin 56 (GND) at same location as pin 62 (GND); Pin 56 (GND) at same location as pin 67 (GND); Pin 56 (GND) at same location as pin 68 (GND); Pin 56 (GND) at same location as pin 73 (GND); Pin 56 (GND) at same location as pin 74 (GND); Pin 56 (GND) at same location as pin 79 (GND); Pin 56 (GND) at same location as pin 80 (GND); Pin 56 (GND) at same location as pin 85 (GND); Pin 56 (GND) at same location as pin 86 (GND); Pin 56 (GND) at same location as pin 91 (GND); Pin 56 (GND) at same location as pin 92 (GND); Pin 56 (GND) at same location as pin 97 (GND); Pin 56 (GND) at same location as pin 98 (GND); Pin 56 (GND) at same location as pin 103 (GND); Pin 56 (GND) at same location as pin 104 (GND); Pin 56 (GND) at same location as pin 109 (GND); Pin 56 (GND) at same location as pin 110 (GND); Pin 56 (GND) at same location as pin 115 (GND); Pin 56 (GND) at same location as pin 116 (GND); Pin 56 (GND) at same location as pin 121 (GND); Pin 56 (GND) at same location as pin 122 (GND); Pin 56 (GND) at same location as pin 127 (GND); Pin 56 (GND) at same location as pin 128 (GND); Pin 56 (GND) at same location as pin 133 (GND); Pin 56 (GND) at same location as pin 134 (GND); Pin 56 (GND) at same location as pin 139 (GND); Pin 56 (GND) at same location as pin 140 (GND); Pin 56 (GND) at same location as pin 145 (GND); Pin 56 (GND) at same location as pin 146 (GND); Pin 56 (GND) at same location as pin 151 (GND); Pin 56 (GND) at same location as pin 152 (GND); Pin 56 (GND) at same location as pin 157 (GND); Pin 56 (GND) at same location as pin 158 (GND); Pin 56 (GND) at same location as pin 163 (GND); Pin 56 (GND) at same location as pin 164 (GND); Pin 56 (GND) at same location as pin 169 (GND); Pin 56 (GND) at same location as pin 170 (GND); Pin 56 (GND) at same location as pin 181 (GND); Pin 56 (GND) at same location as pin 182 (GND); Pin 56 (GND) at same location as pin 187 (GND); Pin 56 (GND) at same location as pin 188 (GND); Pin 56 (GND) at same location as pin 195 (GND); Pin 56 (GND) at same location as pin 196 (GND); Pin 61 (GND) at same location as pin 62 (GND); Pin 61 (GND) at same location as pin 67 (GND); Pin 61 (GND) at same location as pin 68 (GND); Pin 61 (GND) at same location as pin 73 (GND); Pin 61 (GND) at same location as pin 74 (GND); Pin 61 (GND) at same location as pin 79 (GND); Pin 61 (GND) at same location as pin 80 (GND); Pin 61 (GND) at same location as pin 85 (GND); Pin 61 (GND) at same location as pin 86 (GND); Pin 61 (GND) at same location as pin 91 (GND); Pin 61 (GND) at same location as pin 92 (GND); Pin 61 (GND) at same location as pin 97 (GND); Pin 61 (GND) at same location as pin 98 (GND); Pin 61 (GND) at same location as pin 103 (GND); Pin 61 (GND) at same location as pin 104 (GND); Pin 61 (GND) at same location as pin 109 (GND); Pin 61 (GND) at same location as pin 110 (GND); Pin 61 (GND) at same location as pin 115 (GND); Pin 61 (GND) at same location as pin 116 (GND); Pin 61 (GND) at same location as pin 121 (GND); Pin 61 (GND) at same location as pin 122 (GND); Pin 61 (GND) at same location as pin 127 (GND); Pin 61 (GND) at same location as pin 128 (GND); Pin 61 (GND) at same location as pin 133 (GND); Pin 61 (GND) at same location as pin 134 (GND); Pin 61 (GND) at same location as pin 139 (GND); Pin 61 (GND) at same location as pin 140 (GND); Pin 61 (GND) at same location as pin 145 (GND); Pin 61 (GND) at same location as pin 146 (GND); Pin 61 (GND) at same location as pin 151 (GND); Pin 61 (GND) at same location as pin 152 (GND); Pin 61 (GND) at same location as pin 157 (GND); Pin 61 (GND) at same location as pin 158 (GND); Pin 61 (GND) at same location as pin 163 (GND); Pin 61 (GND) at same location as pin 164 (GND); Pin 61 (GND) at same location as pin 169 (GND); Pin 61 (GND) at same location as pin 170 (GND); Pin 61 (GND) at same location as pin 181 (GND); Pin 61 (GND) at same location as pin 182 (GND); Pin 61 (GND) at same location as pin 187 (GND); Pin 61 (GND) at same location as pin 188 (GND); Pin 61 (GND) at same location as pin 195 (GND); Pin 61 (GND) at same location as pin 196 (GND); Pin 62 (GND) at same location as pin 67 (GND); Pin 62 (GND) at same location as pin 68 (GND); Pin 62 (GND) at same location as pin 73 (GND); Pin 62 (GND) at same location as pin 74 (GND); Pin 62 (GND) at same location as pin 79 (GND); Pin 62 (GND) at same location as pin 80 (GND); Pin 62 (GND) at same location as pin 85 (GND); Pin 62 (GND) at same location as pin 86 (GND); Pin 62 (GND) at same location as pin 91 (GND); Pin 62 (GND) at same location as pin 92 (GND); Pin 62 (GND) at same location as pin 97 (GND); Pin 62 (GND) at same location as pin 98 (GND); Pin 62 (GND) at same location as pin 103 (GND); Pin 62 (GND) at same location as pin 104 (GND); Pin 62 (GND) at same location as pin 109 (GND); Pin 62 (GND) at same location as pin 110 (GND); Pin 62 (GND) at same location as pin 115 (GND); Pin 62 (GND) at same location as pin 116 (GND); Pin 62 (GND) at same location as pin 121 (GND); Pin 62 (GND) at same location as pin 122 (GND); Pin 62 (GND) at same location as pin 127 (GND); Pin 62 (GND) at same location as pin 128 (GND); Pin 62 (GND) at same location as pin 133 (GND); Pin 62 (GND) at same location as pin 134 (GND); Pin 62 (GND) at same location as pin 139 (GND); Pin 62 (GND) at same location as pin 140 (GND); Pin 62 (GND) at same location as pin 145 (GND); Pin 62 (GND) at same location as pin 146 (GND); Pin 62 (GND) at same location as pin 151 (GND); Pin 62 (GND) at same location as pin 152 (GND); Pin 62 (GND) at same location as pin 157 (GND); Pin 62 (GND) at same location as pin 158 (GND); Pin 62 (GND) at same location as pin 163 (GND); Pin 62 (GND) at same location as pin 164 (GND); Pin 62 (GND) at same location as pin 169 (GND); Pin 62 (GND) at same location as pin 170 (GND); Pin 62 (GND) at same location as pin 181 (GND); Pin 62 (GND) at same location as pin 182 (GND); Pin 62 (GND) at same location as pin 187 (GND); Pin 62 (GND) at same location as pin 188 (GND); Pin 62 (GND) at same location as pin 195 (GND); Pin 62 (GND) at same location as pin 196 (GND); Pin 67 (GND) at same location as pin 68 (GND); Pin 67 (GND) at same location as pin 73 (GND); Pin 67 (GND) at same location as pin 74 (GND); Pin 67 (GND) at same location as pin 79 (GND); Pin 67 (GND) at same location as pin 80 (GND); Pin 67 (GND) at same location as pin 85 (GND); Pin 67 (GND) at same location as pin 86 (GND); Pin 67 (GND) at same location as pin 91 (GND); Pin 67 (GND) at same location as pin 92 (GND); Pin 67 (GND) at same location as pin 97 (GND); Pin 67 (GND) at same location as pin 98 (GND); Pin 67 (GND) at same location as pin 103 (GND); Pin 67 (GND) at same location as pin 104 (GND); Pin 67 (GND) at same location as pin 109 (GND); Pin 67 (GND) at same location as pin 110 (GND); Pin 67 (GND) at same location as pin 115 (GND); Pin 67 (GND) at same location as pin 116 (GND); Pin 67 (GND) at same location as pin 121 (GND); Pin 67 (GND) at same location as pin 122 (GND); Pin 67 (GND) at same location as pin 127 (GND); Pin 67 (GND) at same location as pin 128 (GND); Pin 67 (GND) at same location as pin 133 (GND); Pin 67 (GND) at same location as pin 134 (GND); Pin 67 (GND) at same location as pin 139 (GND); Pin 67 (GND) at same location as pin 140 (GND); Pin 67 (GND) at same location as pin 145 (GND); Pin 67 (GND) at same location as pin 146 (GND); Pin 67 (GND) at same location as pin 151 (GND); Pin 67 (GND) at same location as pin 152 (GND); Pin 67 (GND) at same location as pin 157 (GND); Pin 67 (GND) at same location as pin 158 (GND); Pin 67 (GND) at same location as pin 163 (GND); Pin 67 (GND) at same location as pin 164 (GND); Pin 67 (GND) at same location as pin 169 (GND); Pin 67 (GND) at same location as pin 170 (GND); Pin 67 (GND) at same location as pin 181 (GND); Pin 67 (GND) at same location as pin 182 (GND); Pin 67 (GND) at same location as pin 187 (GND); Pin 67 (GND) at same location as pin 188 (GND); Pin 67 (GND) at same location as pin 195 (GND); Pin 67 (GND) at same location as pin 196 (GND); Pin 68 (GND) at same location as pin 73 (GND); Pin 68 (GND) at same location as pin 74 (GND); Pin 68 (GND) at same location as pin 79 (GND); Pin 68 (GND) at same location as pin 80 (GND); Pin 68 (GND) at same location as pin 85 (GND); Pin 68 (GND) at same location as pin 86 (GND); Pin 68 (GND) at same location as pin 91 (GND); Pin 68 (GND) at same location as pin 92 (GND); Pin 68 (GND) at same location as pin 97 (GND); Pin 68 (GND) at same location as pin 98 (GND); Pin 68 (GND) at same location as pin 103 (GND); Pin 68 (GND) at same location as pin 104 (GND); Pin 68 (GND) at same location as pin 109 (GND); Pin 68 (GND) at same location as pin 110 (GND); Pin 68 (GND) at same location as pin 115 (GND); Pin 68 (GND) at same location as pin 116 (GND); Pin 68 (GND) at same location as pin 121 (GND); Pin 68 (GND) at same location as pin 122 (GND); Pin 68 (GND) at same location as pin 127 (GND); Pin 68 (GND) at same location as pin 128 (GND); Pin 68 (GND) at same location as pin 133 (GND); Pin 68 (GND) at same location as pin 134 (GND); Pin 68 (GND) at same location as pin 139 (GND); Pin 68 (GND) at same location as pin 140 (GND); Pin 68 (GND) at same location as pin 145 (GND); Pin 68 (GND) at same location as pin 146 (GND); Pin 68 (GND) at same location as pin 151 (GND); Pin 68 (GND) at same location as pin 152 (GND); Pin 68 (GND) at same location as pin 157 (GND); Pin 68 (GND) at same location as pin 158 (GND); Pin 68 (GND) at same location as pin 163 (GND); Pin 68 (GND) at same location as pin 164 (GND); Pin 68 (GND) at same location as pin 169 (GND); Pin 68 (GND) at same location as pin 170 (GND); Pin 68 (GND) at same location as pin 181 (GND); Pin 68 (GND) at same location as pin 182 (GND); Pin 68 (GND) at same location as pin 187 (GND); Pin 68 (GND) at same location as pin 188 (GND); Pin 68 (GND) at same location as pin 195 (GND); Pin 68 (GND) at same location as pin 196 (GND); Pin 73 (GND) at same location as pin 74 (GND); Pin 73 (GND) at same location as pin 79 (GND); Pin 73 (GND) at same location as pin 80 (GND); Pin 73 (GND) at same location as pin 85 (GND); Pin 73 (GND) at same location as pin 86 (GND); Pin 73 (GND) at same location as pin 91 (GND); Pin 73 (GND) at same location as pin 92 (GND); Pin 73 (GND) at same location as pin 97 (GND); Pin 73 (GND) at same location as pin 98 (GND); Pin 73 (GND) at same location as pin 103 (GND); Pin 73 (GND) at same location as pin 104 (GND); Pin 73 (GND) at same location as pin 109 (GND); Pin 73 (GND) at same location as pin 110 (GND); Pin 73 (GND) at same location as pin 115 (GND); Pin 73 (GND) at same location as pin 116 (GND); Pin 73 (GND) at same location as pin 121 (GND); Pin 73 (GND) at same location as pin 122 (GND); Pin 73 (GND) at same location as pin 127 (GND); Pin 73 (GND) at same location as pin 128 (GND); Pin 73 (GND) at same location as pin 133 (GND); Pin 73 (GND) at same location as pin 134 (GND); Pin 73 (GND) at same location as pin 139 (GND); Pin 73 (GND) at same location as pin 140 (GND); Pin 73 (GND) at same location as pin 145 (GND); Pin 73 (GND) at same location as pin 146 (GND); Pin 73 (GND) at same location as pin 151 (GND); Pin 73 (GND) at same location as pin 152 (GND); Pin 73 (GND) at same location as pin 157 (GND); Pin 73 (GND) at same location as pin 158 (GND); Pin 73 (GND) at same location as pin 163 (GND); Pin 73 (GND) at same location as pin 164 (GND); Pin 73 (GND) at same location as pin 169 (GND); Pin 73 (GND) at same location as pin 170 (GND); Pin 73 (GND) at same location as pin 181 (GND); Pin 73 (GND) at same location as pin 182 (GND); Pin 73 (GND) at same location as pin 187 (GND); Pin 73 (GND) at same location as pin 188 (GND); Pin 73 (GND) at same location as pin 195 (GND); Pin 73 (GND) at same location as pin 196 (GND); Pin 74 (GND) at same location as pin 79 (GND); Pin 74 (GND) at same location as pin 80 (GND); Pin 74 (GND) at same location as pin 85 (GND); Pin 74 (GND) at same location as pin 86 (GND); Pin 74 (GND) at same location as pin 91 (GND); Pin 74 (GND) at same location as pin 92 (GND); Pin 74 (GND) at same location as pin 97 (GND); Pin 74 (GND) at same location as pin 98 (GND); Pin 74 (GND) at same location as pin 103 (GND); Pin 74 (GND) at same location as pin 104 (GND); Pin 74 (GND) at same location as pin 109 (GND); Pin 74 (GND) at same location as pin 110 (GND); Pin 74 (GND) at same location as pin 115 (GND); Pin 74 (GND) at same location as pin 116 (GND); Pin 74 (GND) at same location as pin 121 (GND); Pin 74 (GND) at same location as pin 122 (GND); Pin 74 (GND) at same location as pin 127 (GND); Pin 74 (GND) at same location as pin 128 (GND); Pin 74 (GND) at same location as pin 133 (GND); Pin 74 (GND) at same location as pin 134 (GND); Pin 74 (GND) at same location as pin 139 (GND); Pin 74 (GND) at same location as pin 140 (GND); Pin 74 (GND) at same location as pin 145 (GND); Pin 74 (GND) at same location as pin 146 (GND); Pin 74 (GND) at same location as pin 151 (GND); Pin 74 (GND) at same location as pin 152 (GND); Pin 74 (GND) at same location as pin 157 (GND); Pin 74 (GND) at same location as pin 158 (GND); Pin 74 (GND) at same location as pin 163 (GND); Pin 74 (GND) at same location as pin 164 (GND); Pin 74 (GND) at same location as pin 169 (GND); Pin 74 (GND) at same location as pin 170 (GND); Pin 74 (GND) at same location as pin 181 (GND); Pin 74 (GND) at same location as pin 182 (GND); Pin 74 (GND) at same location as pin 187 (GND); Pin 74 (GND) at same location as pin 188 (GND); Pin 74 (GND) at same location as pin 195 (GND); Pin 74 (GND) at same location as pin 196 (GND); Pin 79 (GND) at same location as pin 80 (GND); Pin 79 (GND) at same location as pin 85 (GND); Pin 79 (GND) at same location as pin 86 (GND); Pin 79 (GND) at same location as pin 91 (GND); Pin 79 (GND) at same location as pin 92 (GND); Pin 79 (GND) at same location as pin 97 (GND); Pin 79 (GND) at same location as pin 98 (GND); Pin 79 (GND) at same location as pin 103 (GND); Pin 79 (GND) at same location as pin 104 (GND); Pin 79 (GND) at same location as pin 109 (GND); Pin 79 (GND) at same location as pin 110 (GND); Pin 79 (GND) at same location as pin 115 (GND); Pin 79 (GND) at same location as pin 116 (GND); Pin 79 (GND) at same location as pin 121 (GND); Pin 79 (GND) at same location as pin 122 (GND); Pin 79 (GND) at same location as pin 127 (GND); Pin 79 (GND) at same location as pin 128 (GND); Pin 79 (GND) at same location as pin 133 (GND); Pin 79 (GND) at same location as pin 134 (GND); Pin 79 (GND) at same location as pin 139 (GND); Pin 79 (GND) at same location as pin 140 (GND); Pin 79 (GND) at same location as pin 145 (GND); Pin 79 (GND) at same location as pin 146 (GND); Pin 79 (GND) at same location as pin 151 (GND); Pin 79 (GND) at same location as pin 152 (GND); Pin 79 (GND) at same location as pin 157 (GND); Pin 79 (GND) at same location as pin 158 (GND); Pin 79 (GND) at same location as pin 163 (GND); Pin 79 (GND) at same location as pin 164 (GND); Pin 79 (GND) at same location as pin 169 (GND); Pin 79 (GND) at same location as pin 170 (GND); Pin 79 (GND) at same location as pin 181 (GND); Pin 79 (GND) at same location as pin 182 (GND); Pin 79 (GND) at same location as pin 187 (GND); Pin 79 (GND) at same location as pin 188 (GND); Pin 79 (GND) at same location as pin 195 (GND); Pin 79 (GND) at same location as pin 196 (GND); Pin 80 (GND) at same location as pin 85 (GND); Pin 80 (GND) at same location as pin 86 (GND); Pin 80 (GND) at same location as pin 91 (GND); Pin 80 (GND) at same location as pin 92 (GND); Pin 80 (GND) at same location as pin 97 (GND); Pin 80 (GND) at same location as pin 98 (GND); Pin 80 (GND) at same location as pin 103 (GND); Pin 80 (GND) at same location as pin 104 (GND); Pin 80 (GND) at same location as pin 109 (GND); Pin 80 (GND) at same location as pin 110 (GND); Pin 80 (GND) at same location as pin 115 (GND); Pin 80 (GND) at same location as pin 116 (GND); Pin 80 (GND) at same location as pin 121 (GND); Pin 80 (GND) at same location as pin 122 (GND); Pin 80 (GND) at same location as pin 127 (GND); Pin 80 (GND) at same location as pin 128 (GND); Pin 80 (GND) at same location as pin 133 (GND); Pin 80 (GND) at same location as pin 134 (GND); Pin 80 (GND) at same location as pin 139 (GND); Pin 80 (GND) at same location as pin 140 (GND); Pin 80 (GND) at same location as pin 145 (GND); Pin 80 (GND) at same location as pin 146 (GND); Pin 80 (GND) at same location as pin 151 (GND); Pin 80 (GND) at same location as pin 152 (GND); Pin 80 (GND) at same location as pin 157 (GND); Pin 80 (GND) at same location as pin 158 (GND); Pin 80 (GND) at same location as pin 163 (GND); Pin 80 (GND) at same location as pin 164 (GND); Pin 80 (GND) at same location as pin 169 (GND); Pin 80 (GND) at same location as pin 170 (GND); Pin 80 (GND) at same location as pin 181 (GND); Pin 80 (GND) at same location as pin 182 (GND); Pin 80 (GND) at same location as pin 187 (GND); Pin 80 (GND) at same location as pin 188 (GND); Pin 80 (GND) at same location as pin 195 (GND); Pin 80 (GND) at same location as pin 196 (GND); Pin 85 (GND) at same location as pin 86 (GND); Pin 85 (GND) at same location as pin 91 (GND); Pin 85 (GND) at same location as pin 92 (GND); Pin 85 (GND) at same location as pin 97 (GND); Pin 85 (GND) at same location as pin 98 (GND); Pin 85 (GND) at same location as pin 103 (GND); Pin 85 (GND) at same location as pin 104 (GND); Pin 85 (GND) at same location as pin 109 (GND); Pin 85 (GND) at same location as pin 110 (GND); Pin 85 (GND) at same location as pin 115 (GND); Pin 85 (GND) at same location as pin 116 (GND); Pin 85 (GND) at same location as pin 121 (GND); Pin 85 (GND) at same location as pin 122 (GND); Pin 85 (GND) at same location as pin 127 (GND); Pin 85 (GND) at same location as pin 128 (GND); Pin 85 (GND) at same location as pin 133 (GND); Pin 85 (GND) at same location as pin 134 (GND); Pin 85 (GND) at same location as pin 139 (GND); Pin 85 (GND) at same location as pin 140 (GND); Pin 85 (GND) at same location as pin 145 (GND); Pin 85 (GND) at same location as pin 146 (GND); Pin 85 (GND) at same location as pin 151 (GND); Pin 85 (GND) at same location as pin 152 (GND); Pin 85 (GND) at same location as pin 157 (GND); Pin 85 (GND) at same location as pin 158 (GND); Pin 85 (GND) at same location as pin 163 (GND); Pin 85 (GND) at same location as pin 164 (GND); Pin 85 (GND) at same location as pin 169 (GND); Pin 85 (GND) at same location as pin 170 (GND); Pin 85 (GND) at same location as pin 181 (GND); Pin 85 (GND) at same location as pin 182 (GND); Pin 85 (GND) at same location as pin 187 (GND); Pin 85 (GND) at same location as pin 188 (GND); Pin 85 (GND) at same location as pin 195 (GND); Pin 85 (GND) at same location as pin 196 (GND); Pin 86 (GND) at same location as pin 91 (GND); Pin 86 (GND) at same location as pin 92 (GND); Pin 86 (GND) at same location as pin 97 (GND); Pin 86 (GND) at same location as pin 98 (GND); Pin 86 (GND) at same location as pin 103 (GND); Pin 86 (GND) at same location as pin 104 (GND); Pin 86 (GND) at same location as pin 109 (GND); Pin 86 (GND) at same location as pin 110 (GND); Pin 86 (GND) at same location as pin 115 (GND); Pin 86 (GND) at same location as pin 116 (GND); Pin 86 (GND) at same location as pin 121 (GND); Pin 86 (GND) at same location as pin 122 (GND); Pin 86 (GND) at same location as pin 127 (GND); Pin 86 (GND) at same location as pin 128 (GND); Pin 86 (GND) at same location as pin 133 (GND); Pin 86 (GND) at same location as pin 134 (GND); Pin 86 (GND) at same location as pin 139 (GND); Pin 86 (GND) at same location as pin 140 (GND); Pin 86 (GND) at same location as pin 145 (GND); Pin 86 (GND) at same location as pin 146 (GND); Pin 86 (GND) at same location as pin 151 (GND); Pin 86 (GND) at same location as pin 152 (GND); Pin 86 (GND) at same location as pin 157 (GND); Pin 86 (GND) at same location as pin 158 (GND); Pin 86 (GND) at same location as pin 163 (GND); Pin 86 (GND) at same location as pin 164 (GND); Pin 86 (GND) at same location as pin 169 (GND); Pin 86 (GND) at same location as pin 170 (GND); Pin 86 (GND) at same location as pin 181 (GND); Pin 86 (GND) at same location as pin 182 (GND); Pin 86 (GND) at same location as pin 187 (GND); Pin 86 (GND) at same location as pin 188 (GND); Pin 86 (GND) at same location as pin 195 (GND); Pin 86 (GND) at same location as pin 196 (GND); Pin 91 (GND) at same location as pin 92 (GND); Pin 91 (GND) at same location as pin 97 (GND); Pin 91 (GND) at same location as pin 98 (GND); Pin 91 (GND) at same location as pin 103 (GND); Pin 91 (GND) at same location as pin 104 (GND); Pin 91 (GND) at same location as pin 109 (GND); Pin 91 (GND) at same location as pin 110 (GND); Pin 91 (GND) at same location as pin 115 (GND); Pin 91 (GND) at same location as pin 116 (GND); Pin 91 (GND) at same location as pin 121 (GND); Pin 91 (GND) at same location as pin 122 (GND); Pin 91 (GND) at same location as pin 127 (GND); Pin 91 (GND) at same location as pin 128 (GND); Pin 91 (GND) at same location as pin 133 (GND); Pin 91 (GND) at same location as pin 134 (GND); Pin 91 (GND) at same location as pin 139 (GND); Pin 91 (GND) at same location as pin 140 (GND); Pin 91 (GND) at same location as pin 145 (GND); Pin 91 (GND) at same location as pin 146 (GND); Pin 91 (GND) at same location as pin 151 (GND); Pin 91 (GND) at same location as pin 152 (GND); Pin 91 (GND) at same location as pin 157 (GND); Pin 91 (GND) at same location as pin 158 (GND); Pin 91 (GND) at same location as pin 163 (GND); Pin 91 (GND) at same location as pin 164 (GND); Pin 91 (GND) at same location as pin 169 (GND); Pin 91 (GND) at same location as pin 170 (GND); Pin 91 (GND) at same location as pin 181 (GND); Pin 91 (GND) at same location as pin 182 (GND); Pin 91 (GND) at same location as pin 187 (GND); Pin 91 (GND) at same location as pin 188 (GND); Pin 91 (GND) at same location as pin 195 (GND); Pin 91 (GND) at same location as pin 196 (GND); Pin 92 (GND) at same location as pin 97 (GND); Pin 92 (GND) at same location as pin 98 (GND); Pin 92 (GND) at same location as pin 103 (GND); Pin 92 (GND) at same location as pin 104 (GND); Pin 92 (GND) at same location as pin 109 (GND); Pin 92 (GND) at same location as pin 110 (GND); Pin 92 (GND) at same location as pin 115 (GND); Pin 92 (GND) at same location as pin 116 (GND); Pin 92 (GND) at same location as pin 121 (GND); Pin 92 (GND) at same location as pin 122 (GND); Pin 92 (GND) at same location as pin 127 (GND); Pin 92 (GND) at same location as pin 128 (GND); Pin 92 (GND) at same location as pin 133 (GND); Pin 92 (GND) at same location as pin 134 (GND); Pin 92 (GND) at same location as pin 139 (GND); Pin 92 (GND) at same location as pin 140 (GND); Pin 92 (GND) at same location as pin 145 (GND); Pin 92 (GND) at same location as pin 146 (GND); Pin 92 (GND) at same location as pin 151 (GND); Pin 92 (GND) at same location as pin 152 (GND); Pin 92 (GND) at same location as pin 157 (GND); Pin 92 (GND) at same location as pin 158 (GND); Pin 92 (GND) at same location as pin 163 (GND); Pin 92 (GND) at same location as pin 164 (GND); Pin 92 (GND) at same location as pin 169 (GND); Pin 92 (GND) at same location as pin 170 (GND); Pin 92 (GND) at same location as pin 181 (GND); Pin 92 (GND) at same location as pin 182 (GND); Pin 92 (GND) at same location as pin 187 (GND); Pin 92 (GND) at same location as pin 188 (GND); Pin 92 (GND) at same location as pin 195 (GND); Pin 92 (GND) at same location as pin 196 (GND); Pin 97 (GND) at same location as pin 98 (GND); Pin 97 (GND) at same location as pin 103 (GND); Pin 97 (GND) at same location as pin 104 (GND); Pin 97 (GND) at same location as pin 109 (GND); Pin 97 (GND) at same location as pin 110 (GND); Pin 97 (GND) at same location as pin 115 (GND); Pin 97 (GND) at same location as pin 116 (GND); Pin 97 (GND) at same location as pin 121 (GND); Pin 97 (GND) at same location as pin 122 (GND); Pin 97 (GND) at same location as pin 127 (GND); Pin 97 (GND) at same location as pin 128 (GND); Pin 97 (GND) at same location as pin 133 (GND); Pin 97 (GND) at same location as pin 134 (GND); Pin 97 (GND) at same location as pin 139 (GND); Pin 97 (GND) at same location as pin 140 (GND); Pin 97 (GND) at same location as pin 145 (GND); Pin 97 (GND) at same location as pin 146 (GND); Pin 97 (GND) at same location as pin 151 (GND); Pin 97 (GND) at same location as pin 152 (GND); Pin 97 (GND) at same location as pin 157 (GND); Pin 97 (GND) at same location as pin 158 (GND); Pin 97 (GND) at same location as pin 163 (GND); Pin 97 (GND) at same location as pin 164 (GND); Pin 97 (GND) at same location as pin 169 (GND); Pin 97 (GND) at same location as pin 170 (GND); Pin 97 (GND) at same location as pin 181 (GND); Pin 97 (GND) at same location as pin 182 (GND); Pin 97 (GND) at same location as pin 187 (GND); Pin 97 (GND) at same location as pin 188 (GND); Pin 97 (GND) at same location as pin 195 (GND); Pin 97 (GND) at same location as pin 196 (GND); Pin 98 (GND) at same location as pin 103 (GND); Pin 98 (GND) at same location as pin 104 (GND); Pin 98 (GND) at same location as pin 109 (GND); Pin 98 (GND) at same location as pin 110 (GND); Pin 98 (GND) at same location as pin 115 (GND); Pin 98 (GND) at same location as pin 116 (GND); Pin 98 (GND) at same location as pin 121 (GND); Pin 98 (GND) at same location as pin 122 (GND); Pin 98 (GND) at same location as pin 127 (GND); Pin 98 (GND) at same location as pin 128 (GND); Pin 98 (GND) at same location as pin 133 (GND); Pin 98 (GND) at same location as pin 134 (GND); Pin 98 (GND) at same location as pin 139 (GND); Pin 98 (GND) at same location as pin 140 (GND); Pin 98 (GND) at same location as pin 145 (GND); Pin 98 (GND) at same location as pin 146 (GND); Pin 98 (GND) at same location as pin 151 (GND); Pin 98 (GND) at same location as pin 152 (GND); Pin 98 (GND) at same location as pin 157 (GND); Pin 98 (GND) at same location as pin 158 (GND); Pin 98 (GND) at same location as pin 163 (GND); Pin 98 (GND) at same location as pin 164 (GND); Pin 98 (GND) at same location as pin 169 (GND); Pin 98 (GND) at same location as pin 170 (GND); Pin 98 (GND) at same location as pin 181 (GND); Pin 98 (GND) at same location as pin 182 (GND); Pin 98 (GND) at same location as pin 187 (GND); Pin 98 (GND) at same location as pin 188 (GND); Pin 98 (GND) at same location as pin 195 (GND); Pin 98 (GND) at same location as pin 196 (GND); Pin 103 (GND) at same location as pin 104 (GND); Pin 103 (GND) at same location as pin 109 (GND); Pin 103 (GND) at same location as pin 110 (GND); Pin 103 (GND) at same location as pin 115 (GND); Pin 103 (GND) at same location as pin 116 (GND); Pin 103 (GND) at same location as pin 121 (GND); Pin 103 (GND) at same location as pin 122 (GND); Pin 103 (GND) at same location as pin 127 (GND); Pin 103 (GND) at same location as pin 128 (GND); Pin 103 (GND) at same location as pin 133 (GND); Pin 103 (GND) at same location as pin 134 (GND); Pin 103 (GND) at same location as pin 139 (GND); Pin 103 (GND) at same location as pin 140 (GND); Pin 103 (GND) at same location as pin 145 (GND); Pin 103 (GND) at same location as pin 146 (GND); Pin 103 (GND) at same location as pin 151 (GND); Pin 103 (GND) at same location as pin 152 (GND); Pin 103 (GND) at same location as pin 157 (GND); Pin 103 (GND) at same location as pin 158 (GND); Pin 103 (GND) at same location as pin 163 (GND); Pin 103 (GND) at same location as pin 164 (GND); Pin 103 (GND) at same location as pin 169 (GND); Pin 103 (GND) at same location as pin 170 (GND); Pin 103 (GND) at same location as pin 181 (GND); Pin 103 (GND) at same location as pin 182 (GND); Pin 103 (GND) at same location as pin 187 (GND); Pin 103 (GND) at same location as pin 188 (GND); Pin 103 (GND) at same location as pin 195 (GND); Pin 103 (GND) at same location as pin 196 (GND); Pin 104 (GND) at same location as pin 109 (GND); Pin 104 (GND) at same location as pin 110 (GND); Pin 104 (GND) at same location as pin 115 (GND); Pin 104 (GND) at same location as pin 116 (GND); Pin 104 (GND) at same location as pin 121 (GND); Pin 104 (GND) at same location as pin 122 (GND); Pin 104 (GND) at same location as pin 127 (GND); Pin 104 (GND) at same location as pin 128 (GND); Pin 104 (GND) at same location as pin 133 (GND); Pin 104 (GND) at same location as pin 134 (GND); Pin 104 (GND) at same location as pin 139 (GND); Pin 104 (GND) at same location as pin 140 (GND); Pin 104 (GND) at same location as pin 145 (GND); Pin 104 (GND) at same location as pin 146 (GND); Pin 104 (GND) at same location as pin 151 (GND); Pin 104 (GND) at same location as pin 152 (GND); Pin 104 (GND) at same location as pin 157 (GND); Pin 104 (GND) at same location as pin 158 (GND); Pin 104 (GND) at same location as pin 163 (GND); Pin 104 (GND) at same location as pin 164 (GND); Pin 104 (GND) at same location as pin 169 (GND); Pin 104 (GND) at same location as pin 170 (GND); Pin 104 (GND) at same location as pin 181 (GND); Pin 104 (GND) at same location as pin 182 (GND); Pin 104 (GND) at same location as pin 187 (GND); Pin 104 (GND) at same location as pin 188 (GND); Pin 104 (GND) at same location as pin 195 (GND); Pin 104 (GND) at same location as pin 196 (GND); Pin 109 (GND) at same location as pin 110 (GND); Pin 109 (GND) at same location as pin 115 (GND); Pin 109 (GND) at same location as pin 116 (GND); Pin 109 (GND) at same location as pin 121 (GND); Pin 109 (GND) at same location as pin 122 (GND); Pin 109 (GND) at same location as pin 127 (GND); Pin 109 (GND) at same location as pin 128 (GND); Pin 109 (GND) at same location as pin 133 (GND); Pin 109 (GND) at same location as pin 134 (GND); Pin 109 (GND) at same location as pin 139 (GND); Pin 109 (GND) at same location as pin 140 (GND); Pin 109 (GND) at same location as pin 145 (GND); Pin 109 (GND) at same location as pin 146 (GND); Pin 109 (GND) at same location as pin 151 (GND); Pin 109 (GND) at same location as pin 152 (GND); Pin 109 (GND) at same location as pin 157 (GND); Pin 109 (GND) at same location as pin 158 (GND); Pin 109 (GND) at same location as pin 163 (GND); Pin 109 (GND) at same location as pin 164 (GND); Pin 109 (GND) at same location as pin 169 (GND); Pin 109 (GND) at same location as pin 170 (GND); Pin 109 (GND) at same location as pin 181 (GND); Pin 109 (GND) at same location as pin 182 (GND); Pin 109 (GND) at same location as pin 187 (GND); Pin 109 (GND) at same location as pin 188 (GND); Pin 109 (GND) at same location as pin 195 (GND); Pin 109 (GND) at same location as pin 196 (GND); Pin 110 (GND) at same location as pin 115 (GND); Pin 110 (GND) at same location as pin 116 (GND); Pin 110 (GND) at same location as pin 121 (GND); Pin 110 (GND) at same location as pin 122 (GND); Pin 110 (GND) at same location as pin 127 (GND); Pin 110 (GND) at same location as pin 128 (GND); Pin 110 (GND) at same location as pin 133 (GND); Pin 110 (GND) at same location as pin 134 (GND); Pin 110 (GND) at same location as pin 139 (GND); Pin 110 (GND) at same location as pin 140 (GND); Pin 110 (GND) at same location as pin 145 (GND); Pin 110 (GND) at same location as pin 146 (GND); Pin 110 (GND) at same location as pin 151 (GND); Pin 110 (GND) at same location as pin 152 (GND); Pin 110 (GND) at same location as pin 157 (GND); Pin 110 (GND) at same location as pin 158 (GND); Pin 110 (GND) at same location as pin 163 (GND); Pin 110 (GND) at same location as pin 164 (GND); Pin 110 (GND) at same location as pin 169 (GND); Pin 110 (GND) at same location as pin 170 (GND); Pin 110 (GND) at same location as pin 181 (GND); Pin 110 (GND) at same location as pin 182 (GND); Pin 110 (GND) at same location as pin 187 (GND); Pin 110 (GND) at same location as pin 188 (GND); Pin 110 (GND) at same location as pin 195 (GND); Pin 110 (GND) at same location as pin 196 (GND); Pin 115 (GND) at same location as pin 116 (GND); Pin 115 (GND) at same location as pin 121 (GND); Pin 115 (GND) at same location as pin 122 (GND); Pin 115 (GND) at same location as pin 127 (GND); Pin 115 (GND) at same location as pin 128 (GND); Pin 115 (GND) at same location as pin 133 (GND); Pin 115 (GND) at same location as pin 134 (GND); Pin 115 (GND) at same location as pin 139 (GND); Pin 115 (GND) at same location as pin 140 (GND); Pin 115 (GND) at same location as pin 145 (GND); Pin 115 (GND) at same location as pin 146 (GND); Pin 115 (GND) at same location as pin 151 (GND); Pin 115 (GND) at same location as pin 152 (GND); Pin 115 (GND) at same location as pin 157 (GND); Pin 115 (GND) at same location as pin 158 (GND); Pin 115 (GND) at same location as pin 163 (GND); Pin 115 (GND) at same location as pin 164 (GND); Pin 115 (GND) at same location as pin 169 (GND); Pin 115 (GND) at same location as pin 170 (GND); Pin 115 (GND) at same location as pin 181 (GND); Pin 115 (GND) at same location as pin 182 (GND); Pin 115 (GND) at same location as pin 187 (GND); Pin 115 (GND) at same location as pin 188 (GND); Pin 115 (GND) at same location as pin 195 (GND); Pin 115 (GND) at same location as pin 196 (GND); Pin 116 (GND) at same location as pin 121 (GND); Pin 116 (GND) at same location as pin 122 (GND); Pin 116 (GND) at same location as pin 127 (GND); Pin 116 (GND) at same location as pin 128 (GND); Pin 116 (GND) at same location as pin 133 (GND); Pin 116 (GND) at same location as pin 134 (GND); Pin 116 (GND) at same location as pin 139 (GND); Pin 116 (GND) at same location as pin 140 (GND); Pin 116 (GND) at same location as pin 145 (GND); Pin 116 (GND) at same location as pin 146 (GND); Pin 116 (GND) at same location as pin 151 (GND); Pin 116 (GND) at same location as pin 152 (GND); Pin 116 (GND) at same location as pin 157 (GND); Pin 116 (GND) at same location as pin 158 (GND); Pin 116 (GND) at same location as pin 163 (GND); Pin 116 (GND) at same location as pin 164 (GND); Pin 116 (GND) at same location as pin 169 (GND); Pin 116 (GND) at same location as pin 170 (GND); Pin 116 (GND) at same location as pin 181 (GND); Pin 116 (GND) at same location as pin 182 (GND); Pin 116 (GND) at same location as pin 187 (GND); Pin 116 (GND) at same location as pin 188 (GND); Pin 116 (GND) at same location as pin 195 (GND); Pin 116 (GND) at same location as pin 196 (GND); Pin 121 (GND) at same location as pin 122 (GND); Pin 121 (GND) at same location as pin 127 (GND); Pin 121 (GND) at same location as pin 128 (GND); Pin 121 (GND) at same location as pin 133 (GND); Pin 121 (GND) at same location as pin 134 (GND); Pin 121 (GND) at same location as pin 139 (GND); Pin 121 (GND) at same location as pin 140 (GND); Pin 121 (GND) at same location as pin 145 (GND); Pin 121 (GND) at same location as pin 146 (GND); Pin 121 (GND) at same location as pin 151 (GND); Pin 121 (GND) at same location as pin 152 (GND); Pin 121 (GND) at same location as pin 157 (GND); Pin 121 (GND) at same location as pin 158 (GND); Pin 121 (GND) at same location as pin 163 (GND); Pin 121 (GND) at same location as pin 164 (GND); Pin 121 (GND) at same location as pin 169 (GND); Pin 121 (GND) at same location as pin 170 (GND); Pin 121 (GND) at same location as pin 181 (GND); Pin 121 (GND) at same location as pin 182 (GND); Pin 121 (GND) at same location as pin 187 (GND); Pin 121 (GND) at same location as pin 188 (GND); Pin 121 (GND) at same location as pin 195 (GND); Pin 121 (GND) at same location as pin 196 (GND); Pin 122 (GND) at same location as pin 127 (GND); Pin 122 (GND) at same location as pin 128 (GND); Pin 122 (GND) at same location as pin 133 (GND); Pin 122 (GND) at same location as pin 134 (GND); Pin 122 (GND) at same location as pin 139 (GND); Pin 122 (GND) at same location as pin 140 (GND); Pin 122 (GND) at same location as pin 145 (GND); Pin 122 (GND) at same location as pin 146 (GND); Pin 122 (GND) at same location as pin 151 (GND); Pin 122 (GND) at same location as pin 152 (GND); Pin 122 (GND) at same location as pin 157 (GND); Pin 122 (GND) at same location as pin 158 (GND); Pin 122 (GND) at same location as pin 163 (GND); Pin 122 (GND) at same location as pin 164 (GND); Pin 122 (GND) at same location as pin 169 (GND); Pin 122 (GND) at same location as pin 170 (GND); Pin 122 (GND) at same location as pin 181 (GND); Pin 122 (GND) at same location as pin 182 (GND); Pin 122 (GND) at same location as pin 187 (GND); Pin 122 (GND) at same location as pin 188 (GND); Pin 122 (GND) at same location as pin 195 (GND); Pin 122 (GND) at same location as pin 196 (GND); Pin 127 (GND) at same location as pin 128 (GND); Pin 127 (GND) at same location as pin 133 (GND); Pin 127 (GND) at same location as pin 134 (GND); Pin 127 (GND) at same location as pin 139 (GND); Pin 127 (GND) at same location as pin 140 (GND); Pin 127 (GND) at same location as pin 145 (GND); Pin 127 (GND) at same location as pin 146 (GND); Pin 127 (GND) at same location as pin 151 (GND); Pin 127 (GND) at same location as pin 152 (GND); Pin 127 (GND) at same location as pin 157 (GND); Pin 127 (GND) at same location as pin 158 (GND); Pin 127 (GND) at same location as pin 163 (GND); Pin 127 (GND) at same location as pin 164 (GND); Pin 127 (GND) at same location as pin 169 (GND); Pin 127 (GND) at same location as pin 170 (GND); Pin 127 (GND) at same location as pin 181 (GND); Pin 127 (GND) at same location as pin 182 (GND); Pin 127 (GND) at same location as pin 187 (GND); Pin 127 (GND) at same location as pin 188 (GND); Pin 127 (GND) at same location as pin 195 (GND); Pin 127 (GND) at same location as pin 196 (GND); Pin 128 (GND) at same location as pin 133 (GND); Pin 128 (GND) at same location as pin 134 (GND); Pin 128 (GND) at same location as pin 139 (GND); Pin 128 (GND) at same location as pin 140 (GND); Pin 128 (GND) at same location as pin 145 (GND); Pin 128 (GND) at same location as pin 146 (GND); Pin 128 (GND) at same location as pin 151 (GND); Pin 128 (GND) at same location as pin 152 (GND); Pin 128 (GND) at same location as pin 157 (GND); Pin 128 (GND) at same location as pin 158 (GND); Pin 128 (GND) at same location as pin 163 (GND); Pin 128 (GND) at same location as pin 164 (GND); Pin 128 (GND) at same location as pin 169 (GND); Pin 128 (GND) at same location as pin 170 (GND); Pin 128 (GND) at same location as pin 181 (GND); Pin 128 (GND) at same location as pin 182 (GND); Pin 128 (GND) at same location as pin 187 (GND); Pin 128 (GND) at same location as pin 188 (GND); Pin 128 (GND) at same location as pin 195 (GND); Pin 128 (GND) at same location as pin 196 (GND); Pin 133 (GND) at same location as pin 134 (GND); Pin 133 (GND) at same location as pin 139 (GND); Pin 133 (GND) at same location as pin 140 (GND); Pin 133 (GND) at same location as pin 145 (GND); Pin 133 (GND) at same location as pin 146 (GND); Pin 133 (GND) at same location as pin 151 (GND); Pin 133 (GND) at same location as pin 152 (GND); Pin 133 (GND) at same location as pin 157 (GND); Pin 133 (GND) at same location as pin 158 (GND); Pin 133 (GND) at same location as pin 163 (GND); Pin 133 (GND) at same location as pin 164 (GND); Pin 133 (GND) at same location as pin 169 (GND); Pin 133 (GND) at same location as pin 170 (GND); Pin 133 (GND) at same location as pin 181 (GND); Pin 133 (GND) at same location as pin 182 (GND); Pin 133 (GND) at same location as pin 187 (GND); Pin 133 (GND) at same location as pin 188 (GND); Pin 133 (GND) at same location as pin 195 (GND); Pin 133 (GND) at same location as pin 196 (GND); Pin 134 (GND) at same location as pin 139 (GND); Pin 134 (GND) at same location as pin 140 (GND); Pin 134 (GND) at same location as pin 145 (GND); Pin 134 (GND) at same location as pin 146 (GND); Pin 134 (GND) at same location as pin 151 (GND); Pin 134 (GND) at same location as pin 152 (GND); Pin 134 (GND) at same location as pin 157 (GND); Pin 134 (GND) at same location as pin 158 (GND); Pin 134 (GND) at same location as pin 163 (GND); Pin 134 (GND) at same location as pin 164 (GND); Pin 134 (GND) at same location as pin 169 (GND); Pin 134 (GND) at same location as pin 170 (GND); Pin 134 (GND) at same location as pin 181 (GND); Pin 134 (GND) at same location as pin 182 (GND); Pin 134 (GND) at same location as pin 187 (GND); Pin 134 (GND) at same location as pin 188 (GND); Pin 134 (GND) at same location as pin 195 (GND); Pin 134 (GND) at same location as pin 196 (GND); Pin 139 (GND) at same location as pin 140 (GND); Pin 139 (GND) at same location as pin 145 (GND); Pin 139 (GND) at same location as pin 146 (GND); Pin 139 (GND) at same location as pin 151 (GND); Pin 139 (GND) at same location as pin 152 (GND); Pin 139 (GND) at same location as pin 157 (GND); Pin 139 (GND) at same location as pin 158 (GND); Pin 139 (GND) at same location as pin 163 (GND); Pin 139 (GND) at same location as pin 164 (GND); Pin 139 (GND) at same location as pin 169 (GND); Pin 139 (GND) at same location as pin 170 (GND); Pin 139 (GND) at same location as pin 181 (GND); Pin 139 (GND) at same location as pin 182 (GND); Pin 139 (GND) at same location as pin 187 (GND); Pin 139 (GND) at same location as pin 188 (GND); Pin 139 (GND) at same location as pin 195 (GND); Pin 139 (GND) at same location as pin 196 (GND); Pin 140 (GND) at same location as pin 145 (GND); Pin 140 (GND) at same location as pin 146 (GND); Pin 140 (GND) at same location as pin 151 (GND); Pin 140 (GND) at same location as pin 152 (GND); Pin 140 (GND) at same location as pin 157 (GND); Pin 140 (GND) at same location as pin 158 (GND); Pin 140 (GND) at same location as pin 163 (GND); Pin 140 (GND) at same location as pin 164 (GND); Pin 140 (GND) at same location as pin 169 (GND); Pin 140 (GND) at same location as pin 170 (GND); Pin 140 (GND) at same location as pin 181 (GND); Pin 140 (GND) at same location as pin 182 (GND); Pin 140 (GND) at same location as pin 187 (GND); Pin 140 (GND) at same location as pin 188 (GND); Pin 140 (GND) at same location as pin 195 (GND); Pin 140 (GND) at same location as pin 196 (GND); Pin 145 (GND) at same location as pin 146 (GND); Pin 145 (GND) at same location as pin 151 (GND); Pin 145 (GND) at same location as pin 152 (GND); Pin 145 (GND) at same location as pin 157 (GND); Pin 145 (GND) at same location as pin 158 (GND); Pin 145 (GND) at same location as pin 163 (GND); Pin 145 (GND) at same location as pin 164 (GND); Pin 145 (GND) at same location as pin 169 (GND); Pin 145 (GND) at same location as pin 170 (GND); Pin 145 (GND) at same location as pin 181 (GND); Pin 145 (GND) at same location as pin 182 (GND); Pin 145 (GND) at same location as pin 187 (GND); Pin 145 (GND) at same location as pin 188 (GND); Pin 145 (GND) at same location as pin 195 (GND); Pin 145 (GND) at same location as pin 196 (GND); Pin 146 (GND) at same location as pin 151 (GND); Pin 146 (GND) at same location as pin 152 (GND); Pin 146 (GND) at same location as pin 157 (GND); Pin 146 (GND) at same location as pin 158 (GND); Pin 146 (GND) at same location as pin 163 (GND); Pin 146 (GND) at same location as pin 164 (GND); Pin 146 (GND) at same location as pin 169 (GND); Pin 146 (GND) at same location as pin 170 (GND); Pin 146 (GND) at same location as pin 181 (GND); Pin 146 (GND) at same location as pin 182 (GND); Pin 146 (GND) at same location as pin 187 (GND); Pin 146 (GND) at same location as pin 188 (GND); Pin 146 (GND) at same location as pin 195 (GND); Pin 146 (GND) at same location as pin 196 (GND); Pin 151 (GND) at same location as pin 152 (GND); Pin 151 (GND) at same location as pin 157 (GND); Pin 151 (GND) at same location as pin 158 (GND); Pin 151 (GND) at same location as pin 163 (GND); Pin 151 (GND) at same location as pin 164 (GND); Pin 151 (GND) at same location as pin 169 (GND); Pin 151 (GND) at same location as pin 170 (GND); Pin 151 (GND) at same location as pin 181 (GND); Pin 151 (GND) at same location as pin 182 (GND); Pin 151 (GND) at same location as pin 187 (GND); Pin 151 (GND) at same location as pin 188 (GND); Pin 151 (GND) at same location as pin 195 (GND); Pin 151 (GND) at same location as pin 196 (GND); Pin 152 (GND) at same location as pin 157 (GND); Pin 152 (GND) at same location as pin 158 (GND); Pin 152 (GND) at same location as pin 163 (GND); Pin 152 (GND) at same location as pin 164 (GND); Pin 152 (GND) at same location as pin 169 (GND); Pin 152 (GND) at same location as pin 170 (GND); Pin 152 (GND) at same location as pin 181 (GND); Pin 152 (GND) at same location as pin 182 (GND); Pin 152 (GND) at same location as pin 187 (GND); Pin 152 (GND) at same location as pin 188 (GND); Pin 152 (GND) at same location as pin 195 (GND); Pin 152 (GND) at same location as pin 196 (GND); Pin 157 (GND) at same location as pin 158 (GND); Pin 157 (GND) at same location as pin 163 (GND); Pin 157 (GND) at same location as pin 164 (GND); Pin 157 (GND) at same location as pin 169 (GND); Pin 157 (GND) at same location as pin 170 (GND); Pin 157 (GND) at same location as pin 181 (GND); Pin 157 (GND) at same location as pin 182 (GND); Pin 157 (GND) at same location as pin 187 (GND); Pin 157 (GND) at same location as pin 188 (GND); Pin 157 (GND) at same location as pin 195 (GND); Pin 157 (GND) at same location as pin 196 (GND); Pin 158 (GND) at same location as pin 163 (GND); Pin 158 (GND) at same location as pin 164 (GND); Pin 158 (GND) at same location as pin 169 (GND); Pin 158 (GND) at same location as pin 170 (GND); Pin 158 (GND) at same location as pin 181 (GND); Pin 158 (GND) at same location as pin 182 (GND); Pin 158 (GND) at same location as pin 187 (GND); Pin 158 (GND) at same location as pin 188 (GND); Pin 158 (GND) at same location as pin 195 (GND); Pin 158 (GND) at same location as pin 196 (GND); Pin 163 (GND) at same location as pin 164 (GND); Pin 163 (GND) at same location as pin 169 (GND); Pin 163 (GND) at same location as pin 170 (GND); Pin 163 (GND) at same location as pin 181 (GND); Pin 163 (GND) at same location as pin 182 (GND); Pin 163 (GND) at same location as pin 187 (GND); Pin 163 (GND) at same location as pin 188 (GND); Pin 163 (GND) at same location as pin 195 (GND); Pin 163 (GND) at same location as pin 196 (GND); Pin 164 (GND) at same location as pin 169 (GND); Pin 164 (GND) at same location as pin 170 (GND); Pin 164 (GND) at same location as pin 181 (GND); Pin 164 (GND) at same location as pin 182 (GND); Pin 164 (GND) at same location as pin 187 (GND); Pin 164 (GND) at same location as pin 188 (GND); Pin 164 (GND) at same location as pin 195 (GND); Pin 164 (GND) at same location as pin 196 (GND); Pin 169 (GND) at same location as pin 170 (GND); Pin 169 (GND) at same location as pin 181 (GND); Pin 169 (GND) at same location as pin 182 (GND); Pin 169 (GND) at same location as pin 187 (GND); Pin 169 (GND) at same location as pin 188 (GND); Pin 169 (GND) at same location as pin 195 (GND); Pin 169 (GND) at same location as pin 196 (GND); Pin 170 (GND) at same location as pin 181 (GND); Pin 170 (GND) at same location as pin 182 (GND); Pin 170 (GND) at same location as pin 187 (GND); Pin 170 (GND) at same location as pin 188 (GND); Pin 170 (GND) at same location as pin 195 (GND); Pin 170 (GND) at same location as pin 196 (GND); Pin 181 (GND) at same location as pin 182 (GND); Pin 181 (GND) at same location as pin 187 (GND); Pin 181 (GND) at same location as pin 188 (GND); Pin 181 (GND) at same location as pin 195 (GND); Pin 181 (GND) at same location as pin 196 (GND); Pin 182 (GND) at same location as pin 187 (GND); Pin 182 (GND) at same location as pin 188 (GND); Pin 182 (GND) at same location as pin 195 (GND); Pin 182 (GND) at same location as pin 196 (GND); Pin 187 (GND) at same location as pin 188 (GND); Pin 187 (GND) at same location as pin 195 (GND); Pin 187 (GND) at same location as pin 196 (GND); Pin 188 (GND) at same location as pin 195 (GND); Pin 188 (GND) at same location as pin 196 (GND); Pin 189 (VDAC) at same location as pin 190 (VDAC); Pin 191 (3V3) at same location as pin 192 (3V3); Pin 191 (3V3) at same location as pin 193 (3V3); Pin 191 (3V3) at same location as pin 194 (3V3); Pin 192 (3V3) at same location as pin 193 (3V3); Pin 192 (3V3) at same location as pin 194 (3V3); Pin 193 (3V3) at same location as pin 194 (3V3); Pin 195 (GND) at same location as pin 196 (GND); Pin 197 (VBAT) at same location as pin 198 (VBAT); Pin 197 (VBAT) at same location as pin 199 (VBAT); Pin 197 (VBAT) at same location as pin 200 (VBAT); Pin 198 (VBAT) at same location as pin 199 (VBAT); Pin 198 (VBAT) at same location as pin 200 (VBAT); Pin 199 (VBAT) at same location as pin 200 (VBAT); Power-named pins not typed as Power - library pin types incomplete [GND=Passive, GND=Passive, GND=Passive, GND=Passive, GND=Passive, +61 more]
RT9742QGJ5RT9742QGJ5-U8, U11, U12, U13, U145P:1 Pwr:2 I:1 OC:1 Power-named pins not typed as Power - library pin types incomplete [GND=Passive]
TXB0108PWTXB0108PWR-U620P:1 Pwr:2 Bi:16 I:1 Power-named pins not typed as Power - library pin types incomplete [GND=Passive]

15.3.1 Validation Heuristics

All pins same type: Generic library with no electrical rules

High % passive pins on IC: Incomplete type information

No power pins: May indicate separate power symbol

Low type diversity: Very underspecified library symbol

Power-named pins not typed as Power: Library pin types incomplete

15.4 Symbol vs Datasheet Pin Table

Each symbol's pin numbers are compared with the pin table of its datasheet. A datasheet pin the symbol lacks is a warning only when the datasheet calls it electrical; a pin the datasheet marks NC or mechanical, or a symbol pin the table does not list, is shown for information. An exposed pad is never counted as a mismatch, whether the symbol names it or numbers it one past the last pin. Where it was numbered, the row suggests giving it a name, because a bare number does not tell a reader what the pin is.

118 parts compared with their datasheet: 116 agree, 2 differ.
Observation
RefDesU2
Part NumberRPi-CM4S_RA
RPi-CM4S_RA
Pinssymbol 202 / datasheet 200
Symbol pin S1 is not in the datasheet pin table
Symbol pin S2 is not in the datasheet pin table
RefDesU7
Part NumberSN74LVC1G17DCKR
74LVC1G17DCK3
Pinssymbol 5 / datasheet 6
Datasheet pin 6 (VCC) is not on the symbol - the symbol carries VCC as pin 5 (numbering or package differs)

15.5 Shielded Connector Symbol Quality

Shielded connectors with missing pin names0
All shielded connectors have proper pin names for EMC analysis.

15.6 I/O Bank Power

U2 RPi-CM4S_RA: 4 I/O banks checked against the vendor package file; 192 of 192 symbol pin names agree with it
U9 LAN9512I-JZX: 0 I/O banks checked against the vendor package file; 59 of 59 symbol pin names agree with it

15.7 Footprints and Other Models

Components with model data76
Component Model Assignments
RefDesIndustry NamePinsModel TypeModel
D12RClamp0524PATCT10Footprintdaymoon:SLP2510P8
D13RClamp0524PATCT10Footprintdaymoon:SLP2510P8
D15RClamp0524PATCT10Footprintdaymoon:SLP2510P8
D22PDS760Q-133Footprintdaymoon:D_POWERDI5
H1M3.2Pad1Footprintdaymoon:MountingHole_3.2mm_M3_Pad
H2M3.2Pad1Footprintdaymoon:MountingHole_3.2mm_M3_Pad
H3M3.2Pad1Footprintdaymoon:MountingHole_3.2mm_M3_Pad
H4M3.2Pad1Footprintdaymoon:MountingHole_3.2mm_M3_Pad
H5M2.6Pad1Footprintdaymoon:MountingHole_2.6mm_Pad_5.2mm
H6M2.6Pad1Footprintdaymoon:MountingHole_2.6mm_Pad_5.2mm
H7-1Footprintdaymoon:HOLE_2.5MM_1.5MM
H8-1Footprintdaymoon:HOLE_2.5MM_1.5MM
J1S1G203Footprintdaymoon:PinHeader_1x03_P2.54mm_Vertical
J2S2G20C40Footprintdaymoon:PinHeader_2x20_P2.54mm_Vertical
J318620556Footprintdaymoon:PC_1862055
J4ARJM11D7-009-AB-EW213Footprintdaymoon:RJ45-POE_ARJM11D7-009
J5MEM2052-00-195-00-A13Footprintdaymoon:GCT_MEM2052-00-195-00-A
J668511913492320Footprintdaymoon:685119134923
J7USB4205-GF-A17Footprintdaymoon:GCT_USB4205-GF-A_REVA
J85787745-112Footprintdaymoon:TE_5787745-1
J9USB4085-GF-A17Footprintdaymoon:GCT_USB4085-GF-A_REVA4
K1IM03GR8Footprintdaymoon:Relay_2P2T_10x6mm_TE_IMxxG
Q12N7002W3Footprintdaymoon:SOT-323_SC-70
Q22N7002W3Footprintdaymoon:SOT-323_SC-70
Q3BSS84AK,2153Footprintdaymoon:SOT-23
Q42N7002W3Footprintdaymoon:SOT-323_SC-70
Q52N7002W3Footprintdaymoon:SOT-323_SC-70
Q62N7002W3Footprintdaymoon:SOT-323_SC-70
Q7AONR213075Footprintdaymoon:DFN-8_FET_3x3mm
S1PTS810SJM250SMT4Footprintdaymoon:MIKROSPINAC_PTS810
TP1-1Footprintdaymoon:TestPoint_D1.27
TP3GPIO301Footprintdaymoon:TestPoint_D1.27
TP4GPIO311Footprintdaymoon:TestPoint_D1.27
TP5GPIO321Footprintdaymoon:TestPoint_D1.27
TP6GPIO331Footprintdaymoon:TestPoint_D1.27
TP7GPIO341Footprintdaymoon:TestPoint_D1.27
TP8GPIO351Footprintdaymoon:TestPoint_D1.27
TP9GPIO361Footprintdaymoon:TestPoint_D1.27
TP10GPIO371Footprintdaymoon:TestPoint_D1.27
TP11GPIO381Footprintdaymoon:TestPoint_D1.27
TP12GPIO391Footprintdaymoon:TestPoint_D1.27
TP13GPIO401Footprintdaymoon:TestPoint_D1.27
TP14GPIO411Footprintdaymoon:TestPoint_D1.27
TP15GPIO421Footprintdaymoon:TestPoint_D1.27
TP16GPIO431Footprintdaymoon:TestPoint_D1.27
TP17GPIO441Footprintdaymoon:TestPoint_D1.27
TP18GPIO451Footprintdaymoon:TestPoint_D1.27
TP19RELAY11Footprintdaymoon:TestPoint_D1.27
TP203V31Footprintdaymoon:TestPoint_D1.27
TP21-1Footprintdaymoon:TestPoint_D1.27
TP22-1Footprintdaymoon:TestPoint_D1.27
TP23HDMI_5V1Footprintdaymoon:TestPoint_D1.27
TP24-1Footprintdaymoon:TestPoint_D1.27
TP25-1Footprintdaymoon:TestPoint_D1.27
TP26-1Footprintdaymoon:TestPoint_D1.27
TP27-1Footprintdaymoon:TestPoint_D1.27
TP283V3FB1Footprintdaymoon:TestPoint_D1.27
TP293V31Footprintdaymoon:TestPoint_D1.27
TP303V31Footprintdaymoon:TestPoint_D1.27
U2RPi-CM4S_RA202Footprintdaymoon:SO_DIMM_200p_TE_1473149-4
U3TXS0108EQPWRQ120Footprintdaymoon:TSSOP-20_4.4x6.5mm_P0.65mm
U4TXS0108EQPWRQ120Footprintdaymoon:TSSOP-20_4.4x6.5mm_P0.65mm
U5TXS0108EQPWRQ120Footprintdaymoon:TSSOP-20_4.4x6.5mm_P0.65mm
U6TXB0108PWR20Footprintdaymoon:TSSOP-20_4.4x6.5mm_P0.65mm
U7SN74LVC1G17DCKR5Footprintdaymoon:SOT-353_SC-70-5
U8RT9742QGJ55Footprintdaymoon:TSOT-23-5
U9LAN9512I-JZX65Footprintdaymoon:QFN-64-1EP_9x9mm_P0.5mm_EP7.3x7.3mm
U1093LC66AT-I/OT6Footprintdaymoon:SOT-23-6
U11RT9742QGJ55Footprintdaymoon:TSOT-23-5
U12RT9742QGJ55Footprintdaymoon:TSOT-23-5
U13RT9742QGJ55Footprintdaymoon:TSOT-23-5
U14RT9742QGJ55Footprintdaymoon:TSOT-23-5
U16FSUSB42MUX10Footprintdaymoon:MSOP-10_3x3mm_P0.5mm
U19HUSB23811Footprintdaymoon:WDFN-10-1EP_3x3mm_P0.5mm_EP1.8x2.5mm
U20LMR14050SDDA9Footprintdaymoon:HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm_ThermalVias
Y1FY25001174Footprintdaymoon:Crystal_SMD_5032-4Pin_5.0x3.2mm

15.8 IC Pin Electrical Properties

Unique IC symbols10
Total IC instances16
IC Library Symbols
Industry NameLibrary NameRefDesNotes
SN74LVC1G17DCKR74LVC1G17DCK3U7
93LC66AT-I/OT93LC66AT-IU10
FSUSB42MUXFSUSB42MUXU16
HUSB238HUSB238U19
LAN9512I-JZXLAN9512iU9
LMR14050SDDALMR14050U20
RPi-CM4S_RARPi-CM4S_RAU2
RT9742QGJ5RT9742QGJ5U8, U11, U12, U13, U14
TXB0108PWRTXB0108PWU6
TXS0108EQPWRQ1TXS0108EU3, U4, U5

15.8.1 74LVC1G17DCK3 (SN74LVC1G17DCKR)

PinPin NameElectricalNotes
1NCPassive
2Input
3GNDPassive
4Output
5VCCPower In

15.8.2 93LC66AT-I (93LC66AT-I/OT)

PinPin NameElectricalNotes
1DOHigh Impedance
2GNDPassive
3DIInput
4SCLKInput
5CSInput
6VCCPower In

15.8.3 FSUSB42MUX (FSUSB42MUX)

PinPin NameElectricalNotes
1VCCPower In
2SELInput
3D+Bidirectional
4D-Bidirectional
5GNDPower In
6HSD1-Bidirectional
7HSD1+Bidirectional
8HSD2-Bidirectional
9HSD2+Bidirectional
10OEInput

15.8.4 HUSB238 (HUSB238)

PinPin NameElectricalNotes
1VINPower In
2D+Bidirectional
3D-Bidirectional
4CC1Bidirectional
5CC2Bidirectional
6SDABidirectional
7SCLInput
8VSETInput
9ISETInput
10GATEOpen Collector
11GNDPassive

15.8.5 LAN9512i (LAN9512I-JZX)

PinPin NameElectricalNotes
1USBDM2Bidirectional
2USBDP2Bidirectional
3USBDM3Bidirectional
4USBDP3Bidirectional
5VDD33APower In
6NCUnknown
7NCUnknown
8NCUnknown
9NCUnknown
10VDD33APassive
11VBUS_DETInput
12RESETInput
13TEST1Input
14PRTCTL2Bidirectional
15VDD18COREPower In
16PRTCTL3Bidirectional
17NCUnknown
18NCUnknown
19VDD33IOPower In
20FDX_LED/GPIO0Bidirectional
21LNKA_LED/GPIO1Bidirectional
22SPD_LED/GPIO2Bidirectional
23EECLKOutput
24EECSOutput
25EEDOOutput
26EEDIInput
27VDD33IOPassive
28TRSTInput
29TMSInput
30TDIInput
31TDOOutput
32TCKInput
33VDD33IOPassive
34TEST2Input
35GPIO3Bidirectional
36GPIO4Bidirectional
37GPIO5Bidirectional
38VDD18COREPassive
39VDD33IOPassive
40TEST3Input
41AUTOMDIX_ENInput
42GPIO6Bidirectional
43GPIO7Bidirectional
44CLK24_ENInput
45CLK24_OUTOutput
46VDD33IOPassive
47TEST4Input
48VDD18ETHPLLPower In
49VDD33APassive
50EXRESInput
51VDD33APassive
52RXPInput
53RXNInput
54VDD33APassive
55TXPOutput
56TXNOutput
57VDD33APassive
58USBDM0Bidirectional
59USBDP0Bidirectional
60XOInput
61XIInput
62VDD18USBPLLPower Out
63USBRBIASInput
64VDD33APassive
65GNDPassive

15.8.6 LMR14050 (LMR14050SDDA)

PinPin NameElectricalNotes
1BOOTOutput
2VINPower In
3ENInput
4RT/SYNCInput
5FBInput
6SSOutput
7GNDPassive
8SWOutput
9PADPassive

15.8.7 RPi-CM4S_RA (RPi-CM4S_RA)

PinPin NameElectricalNotes
1GNDPassive
2EMMC_DISABLEInput
3GPIO0Bidirectional
4SDX_VDDPassive
5GPIO1Power Out
6SDX_VDDPower Out
7GNDPassive
8GNDPassive
9GPIO2Bidirectional
10SDX_CLKOutput
11GPIO3Bidirectional
12SDX_CMDOutput
13GNDPassive
14GNDPassive
15GPIO4Bidirectional
16SDX_D0Bidirectional
17GPIO5Bidirectional
18SDX_D1Bidirectional
19GNDPassive
20GNDPassive
21GPIO6Bidirectional
22SDX_D2Bidirectional
23GPIO7Bidirectional
24SDX_D3Bidirectional
25GNDPassive
26GNDPassive
27GPIO8Bidirectional
28GPIO28Bidirectional
29GPIO9Bidirectional
30GPIO29Bidirectional
31GNDPassive
32GNDPassive
33GPIO10Bidirectional
34GPIO30Bidirectional
35GPIO11Bidirectional
36GPIO31Bidirectional
37GNDPassive
38EEPROM_WPPassive
39GPIO0-27_VDDPassive
40GPIO0-27_VDDPower In
41GPIO28-45_VDDPassive
42GPIO28-45_VDDPower In
43GNDPassive
44GNDPassive
45GPIO12Bidirectional
46GPIO32Bidirectional
47GPIO13Bidirectional
48GPIO33Bidirectional
49GNDPassive
50GNDPassive
51GPIO14Bidirectional
52GPIO34Bidirectional
53GPIO15Bidirectional
54GPIO35Bidirectional
55GNDPassive
56GNDPassive
57GPIO16Bidirectional
58GPIO36Bidirectional
59GPIO17Bidirectional
60GPIO37Bidirectional
61GNDPassive
62GNDPassive
63GPIO18Bidirectional
64GPIO38Bidirectional
65GPIO19Bidirectional
66GPIO39Bidirectional
67GNDPassive
68GNDPassive
69GPIO20Bidirectional
70GPIO40Bidirectional
71GPIO21Bidirectional
72GPIO41Bidirectional
73GNDPassive
74GNDPassive
75GPIO22Bidirectional
76GPIO42Bidirectional
77GPIO23Bidirectional
78GPIO43Bidirectional
79GNDPassive
80GNDPassive
81GPIO24Bidirectional
82GPIO44Bidirectional
83GPIO25Bidirectional
84GPIO45Bidirectional
85GNDPassive
86GNDPassive
87GPIO26Bidirectional
88HDMI_HPD_N_1V8Input
89GPIO27Bidirectional
90EMMC_EN_N_1V8Output
91GNDPassive
92GNDPassive
93DSI0_DN1Output
94DSI1_DP0Output
95DSI0_DP1Output
96DSI1_DN0Output
97GNDPassive
98GNDPassive
99DSI0_DN0Output
100DSI1_CPOutput
101DSI0_DP0Output
102DSI1_CNOutput
103GNDPassive
104GNDPassive
105DSI0_CNOutput
106DSI1_DP3Output
107DSI0_CPOutput
108DSI1_DN3Output
109GNDPassive
110GNDPassive
111HDMI_CLK_NOutput
112DSI1_DP2Output
113HDMI_CLK_POutput
114DSI1_DN2Output
115GNDPassive
116GNDPassive
117HDMI_D0_NOutput
118DSI1_DP1Output
119HDMI_D0_POutput
120DSI1_DN1Output
121GNDPassive
122GNDPassive
123HDMI_D1_NOutput
124NCUnknown
125HDMI_D1_POutput
126NCUnknown
127GNDPassive
128GNDPassive
129HDMI_D2_NOutput
130NCUnknown
131HDMI_D2_POutput
132NCUnknown
133GNDPassive
134GNDPassive
135CAM1_DP3Input
136CAM0_DP0Input
137CAM1_DN3Input
138CAM0_DN0Input
139GNDPassive
140GNDPassive
141CAM1_DP2Input
142CAM0_CPInput
143CAM1_DN2Input
144CAM0_CNInput
145GNDPassive
146GNDPassive
147CAM1_CPInput
148CAM0_DP1Input
149CAM1_CNInput
150CAM0_DN1Input
151GNDPassive
152GNDPassive
153CAM1_DP1Input
154NCUnknown
155CAM1_DN1Input
156NCUnknown
157GNDPassive
158GNDPassive
159CAM1_DP0Input
160NCUnknown
161CAM1_DN0Input
162NCUnknown
163GNDPassive
164GNDPassive
165USB_DPBidirectional
166TVDACOutput
167USB_DMBidirectional
168USB_OTGIDPassive
169GNDPassive
170GNDPassive
171HDMI_CECBidirectional
172VC_TRSTInput
173HDMI_SDABidirectional
174VC_TDIInput
175HDMI_SCLBidirectional
176VC_TMSInput
177RUNInput
178VC_TDOOutput
179VDD_CORE_(DO_NOT_CONNECT)Unknown
180VC_TCKInput
181GNDPassive
182GNDPassive
183NCUnknown
184NCUnknown
185NCUnknown
186NCUnknown
187GNDPassive
188GNDPassive
189VDACPassive
190VDACPower In
1913V3Passive
1923V3Passive
1933V3Passive
1943V3Power In
195GNDPassive
196GNDPassive
197VBATPassive
198VBATPassive
199VBATPassive
200VBATPower In
S1PADPassive
S2PADPassive

15.8.8 RT9742QGJ5 (RT9742QGJ5)

PinPin NameElectricalNotes
1VOUTPower Out
2GNDPassive
3FLGOpen Collector
4ENInput
5VINPower In

15.8.9 TXB0108PW (TXB0108PWR)

PinPin NameElectricalNotes
1A1Bidirectional
2VCCAPower In
3A2Bidirectional
4A3Bidirectional
5A4Bidirectional
6A5Bidirectional
7A6Bidirectional
8A7Bidirectional
9A8Bidirectional
10OEInput
11GNDPassive
12B8Bidirectional
13B7Bidirectional
14B6Bidirectional
15B5Bidirectional
16B4Bidirectional
17B3Bidirectional
18B2Bidirectional
19VCCBPower In
20B1Bidirectional

15.8.10 TXS0108E (TXS0108EQPWRQ1)

PinPin NameElectricalNotes
1A1Bidirectional
2VCCAPower In
3A2Bidirectional
4A3Bidirectional
5A4Bidirectional
6A5Bidirectional
7A6Bidirectional
8A7Bidirectional
9A8Bidirectional
10OEInput
11GNDPower In
12B8Bidirectional
13B7Bidirectional
14B6Bidirectional
15B5Bidirectional
16B4Bidirectional
17B3Bidirectional
18B2Bidirectional
19VCCBPower In
20B1Bidirectional