PCB Power Integrity: DC PI of the STM32MP215F-DK (MB2059) PDN with Two Power Analyzers
KiPI and FYPA are two open-source power-integrity analyzers, and both are very good. KiPI, maintained by Drew Maatman (github.com/drewsum/KiPI), is KiCad-focused and also reads ODB++, so it became the basis for debugging and validating the Tomachie flow into these tools. FYPA, maintained by anarthrous-eda (github.com/anarthrous-eda/FYPA), is Altium-focused.
We used the MB2059 PCB from STMicroelectronics because it comes with both an Altium .PcbDoc and ODB++ output. We fed the ODB++ into KiPI with the Tomachie pdn.json, and FYPA used the .PcbDoc with the same Tomachie pdn.json.
The purpose of the exercise was not to determine whether one is better than the other, but to get validation and to find errors in the two tools as well as in Tomachie. As a result, we contributed fixes upstream to both: six merged pull requests to KiPI and one to FYPA, and we share the results here. Despite using different solvers and different PCB data (ODB++ and .PcbDoc), the two now agree within 0.2 mV on every rail.
Tomachie read the MB2059 schematic and its datasheets and wrote one power-tree file: every rail, its regulator, the regulator’s output tolerance, each load’s pins and maximum current, and the minimum supply voltage each load’s datasheet allows. KiPI and FYPA then solved that same file on the board’s own copper.
Worst case throughout: every regulator at the low end of its datasheet output band, every load at its maximum current, the USB input at its minimum. The question per rail is whether the voltage at the load’s pins stays above that load’s datasheet minimum.
STM32MP215F-DK (MB2059) Full Report
DC PI results, rail by rail
| Rail | Set (V) | Regulator low end (V) | Worst load | Load minimum (V) | KiPI (V) | FYPA (V) | KiPI − FYPA (mV) | Margin (mV) | Verdict |
|---|---|---|---|---|---|---|---|---|---|
| VDDCORE | 0.82 | 0.8077 | U7 STM32MP215 | 0.792 | 0.8034 | 0.8034 | 0.0 | +11.4 | PASS |
| VDDCPU | 0.80 | 0.7880 | U7 STM32MP215 | 0.768 | 0.7861 | 0.7861 | 0.0 | +18.1 | PASS |
| VDD2_DDR | 1.10 | 1.0835 | U7 STM32MP215 | 1.060 | 1.0793 | 1.0795 | −0.2 | +19.3 | PASS |
| VDD1_DDR | 1.80 | 1.7280 | U8 LPDDR4 | 1.700 | 1.7273 | 1.7271 | +0.2 | +27.1 | PASS |
| VDDA1V8 | 1.80 | 1.7280 | U7 STM32MP215 | 1.710 | 1.7262 | 1.7260 | +0.2 | +16.0 | PASS FYPA: low margin |
| VDDA1V8_AON | 1.80 | 1.7280 | U7 STM32MP215 | 1.710 | 1.7272 | 1.7271 | +0.1 | +17.1 | PASS FYPA: low margin |
| VDDIO | 3.30 | 3.2300 | U7 STM32MP215 | 2.700 | 3.2282 | 3.2281 | +0.1 | +528.1 | PASS |
| 3V3 | 3.30 | 3.1530 | U15 LAN8742A | 3.000 | 3.1043 | 3.1042 | +0.1 | +104.2 | PASS |
Margin = the lower of the two solved voltages minus the load’s datasheet minimum. FYPA flags a load whose margin is under 1 % of the rail’s nominal (its default); KiPI reports the voltage and headroom without a warning band.
Load minimums: STM32MP215 Table 17 p. 87; Micron MT53E LPDDR4 VDD1 / VDD2; LAN8742A 3.3 V operation. Regulator bands: STPMIC2 output accuracy (±1.5 % bucks, ±4 % LDO1, ±2 % LDO2 / 5 / 6), ST1S31 for 3V3.
What the table shows
The two power analyzers agree to within 0.2 mV on every rail. They share no solver code; the agreement comes from both reading the same power tree and the same copper.
Most of each margin is taken by the regulator tolerance, not the copper. The 1.8 V LDO is specified at ±4 %, so its low end (1.728 V) sits only 18 mV above the STM32MP215’s 1.71 V minimum before any copper. The board copper takes about 2 mV of that (0.5 mV of it in the ground return), leaving 16–17 mV: under FYPA’s 1 % line, a correct flag on the regulator choice. VDDCORE has the smallest margin in millivolts (11.4 mV) and passes both, because that is 1.4 % of its 0.82 V.
The largest copper drop on the board is on 3V3: the LAN8742A Ethernet PHY draws 139 mA at its worst operating point (10BASE-T with traffic, transmit current through the magnetics, datasheet Table 5-5 p. 105), of which 93 mA flows through the ferrite L4 to its analog supply pins. That path drops 48 mV, leaving 3.104 V at U15 against the 3.0 V minimum. Every load on 3V3 carries a datasheet current: 213.6 mA in total.
DC PI first, then AC PI
This is DC PI: the voltage drop at worst-case current, which every rail has to pass first. AC PI looks at the PDN’s impedance over frequency against a target impedance, for load steps and decoupling. KiPI can also sweep the PDN impedance; AC PI on this board is the next step.
Reports
- KiPI report, maximum current · 36 MB, self-contained HTML
- KiPI report, typical current · 36 MB
- FYPA report, maximum current · 1.7 MB
- FYPA report, typical current · 1.7 MB
- All four reports · zip, 32 MB
KiPI, maintained by Drew Maatman: the open-source KiCad power integrity analyzer
FYPA, maintained by anarthrous-eda: the open-source Altium DC power integrity tool